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Limitation for machine code on bootrom.v
by yondes on Mar 28, 2018
yondes
Posts: 1
Joined: Sep 26, 2017
Last seen: Feb 10, 2023
Hello,

Is there a limititation for a number of machine code raws in bootrom.v. If so, how can i increase the number of raws by manipulating hdl codes?
I want to run baremetal c code. Its machine codes can be a little bit long. I aim to not use spi flash, instead i want to put all my code on bootrom.v. Thanks in advance.

Best regards,
Yusuf Öndeş
RE: Limitation for machine code on bootrom.v
by robfinch on Mar 30, 2018
robfinch
Posts: 27
Joined: Sep 29, 2005
Last seen: Sep 12, 2023
I don’t know much about OpenRISC, but
There should be a statement like:
reg [31:0] bootrom [0:N];
You would have to adjust N to be the desired size.
There is also likely a $readmem() hidden somewhere to load the memory contents.
If the target is an FPGA device the limitation is likely the amount of block ram available. For instance if there is only 64k block ram available then the code would be limited to 64k.
For projects I’ve worked on with C code the read-only data and the pre-initialized data also had to be stored in block ram. This can use up block ram really fast especially if there are arrays of data.
Unless you are using a really large FPGA there probably isn’t room for much more than boot software in the block rams. C code tends to be several times larger than what could be hand coded in assembly language. I think it’s more common to place significant code in a flash memory device (eg SD card) then load it with a boot menu than it is to directly encode everything in block ram.
RE: Limitation for machine code on bootrom.v
by olof on Apr 3, 2018
olof
Posts: 218
Joined: Feb 10, 2010
Last seen: Dec 17, 2018
Hi Yusuf,

It's hard to tell exactly which bootrom you mean, but if you are talking about one of the SoCs supported by FuseSoC, such as https://github.com/openrisc/orpsoc-cores/tree/master/systems/de0_nano then it is possible to set a larger size for the bootrom with this parameter https://github.com/openrisc/orpsoc-cores/blob/master/systems/de0_nano/rtl/verilog/orpsoc_top.v#L484

Hope this helps,
Olof
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