Parallel CRC Generator

Project maintainers


Name: parallelcrcgen
Created: Jul 9, 2009
Updated: Jul 30, 2014
SVN Updated: May 1, 2011
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 4 reported / 0 solved
Star15you like it: star it!

Other project properties

Development status:Stable
Additional info:Specification done
WishBone compliant: No
WishBone version: n/a
License: LGPL


  CRC Generator is a command-line application that generates Verilog or VHDL code for a parallel CRC of any data width between 1 and 1024 and polynomial width between 1 and 1024. The CRC can be custom or protocol specific, for example PCI Express, USB5, USB16, 802.3, SATA.
  The code is written in C and is cross-platform compatible

  There is an online version of the tool at
It's more convenient to access, but the online tool is slower to generate the code for CRC with large data and polynomial widths.