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[/] [a-z80/] [trunk/] [host/] [zxspectrum_de1/] [zxspectrum_de1.sv] - Blame information for rev 13

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1 8 gdevic
//============================================================================
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// Sinclair ZX Spectrum host board
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//
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//  Copyright (C) 2014-2016  Goran Devic
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//
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//  This program is free software; you can redistribute it and/or modify it
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//  under the terms of the GNU General Public License as published by the Free
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//  Software Foundation; either version 2 of the License, or (at your option)
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//  any later version.
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//
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//  This program is distributed in the hope that it will be useful, but WITHOUT
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//  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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//  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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//  more details.
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//
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//  You should have received a copy of the GNU General Public License along
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//  with this program; if not, write to the Free Software Foundation, Inc.,
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//  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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//============================================================================
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module zxspectrum_board
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(
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    //-------- Clocks and reset -----------------
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    input wire CLOCK_27,            // Input clock 27 MHz
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    input wire CLOCK_24,            // Input clock 24 MHz
25 10 gdevic
    input wire KEY0,                // RESET button; on DE1, keys are active low!
26 8 gdevic
    input wire KEY1,                // NMI button
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    //-------- PS/2 Keyboard --------------------
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    input wire PS2_CLK,
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    input wire PS2_DAT,
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    //-------- Audio (Tape player) --------------
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    inout wire I2C_SCLK,
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    inout wire I2C_SDAT,
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    output wire AUD_XCK,
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    output wire AUD_ADCLRCK,
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    output wire AUD_DACLRCK,
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    output wire AUD_BCLK,
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    output wire AUD_DACDAT,
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    input wire AUD_ADCDAT,
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    //-------- VGA connector --------------------
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    output wire [3:0] VGA_R,
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    output wire [3:0] VGA_G,
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    output wire [3:0] VGA_B,
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    output reg VGA_HS,
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    output reg VGA_VS,
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    //-------- Flash memory interface -----------
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    output wire [21:0] FL_ADDR,
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    input wire [7:0] FL_DQ,
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    output wire FL_CE_N,
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    output wire FL_OE_N,
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    output wire FL_WE_N,
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    output wire FL_RST_N,
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    //-------- SRAM memory interface ------------
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    output wire [17:0] SRAM_ADDR,
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    inout reg [15:0] SRAM_DQ,
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    output wire SRAM_CE_N,
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    output wire SRAM_OE_N,
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    output wire SRAM_WE_N,
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    output wire SRAM_UB_N,
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    output wire SRAM_LB_N,
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66 11 gdevic
    //-------- Atari joystick mapped as Kempston
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    input wire [4:0] kempston,      // Input with weak pull-up
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    output wire kempston_gnd,       // Helps mapping to DB9 cable
69 8 gdevic
    output wire [4:0] LEDG,         // Show the joystick state
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    //-------- Misc and debug -------------------
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    input wire SW0,                 // ROM selection
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    input wire SW1,                 // Enable/disable interrupts
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    input wire SW2,                 // Turbo speed (3.5 MHz x 2 = 7.0 MHz)
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    output wire [2:0] LEDR,         // Shows the switch selection
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    output wire [31:0] GPIO_1,      // Exports CPU chip pins
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    output wire [2:0] LEDGTOP       // Show additional information visually
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);
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`default_nettype none
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wire reset;
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wire locked;
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assign reset = locked & KEY0;
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// Export selected pins to the extension connector
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assign GPIO_1[15:0] = A[15:0];
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assign GPIO_1[23:16] = D[7:0];
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assign GPIO_1[31:24] = {nM1,nMREQ,nIORQ,nRD,nWR,nRFSH,nHALT,nBUSACK};
89 11 gdevic
assign kempston_gnd = 0;
90 8 gdevic
 
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// Top 3 green LEDs show various states:
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assign LEDGTOP[2] = 0;              // Reserved for future use
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assign LEDGTOP[1] = beeper;         // Show the beeper state
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assign LEDGTOP[0] = pressed;        // Show when a key is being pressed
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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// Internal buses and address map selection logic
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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wire [15:0] A;                  // Global address bus
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wire [7:0] D;                   // CPU data bus
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wire [7:0] ram_data;            // Internal 16K RAM data
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wire RamWE;
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assign RamWE = A[15:14]==2'b01 && nIORQ==1 && nRD==1 && nWR==0;
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wire ExtRamWE;                  // Extended (and external) 32K RAM
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assign ExtRamWE = A[15]==1 && nIORQ==1 && nRD==1 && nWR==0;
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assign SRAM_DQ[15:0] = ExtRamWE? {8'b0,D[7:0]} : {16{1'bz}};
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wire [7:0] ula_data;            // ULA
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wire io_we;
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assign io_we = nIORQ==0 && nRD==1 && nWR==0;
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// Memory map:
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//   0000 - 3FFF  16K ROM (mapped to the external Flash memory)
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//   4000 - 7FFF  16K dual-port RAM
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//   8000 - FFFF  32K RAM (mapped to the external SRAM memory)
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always @(*) // always_comb
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begin
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    case ({nIORQ,nRD,nWR})
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        // -------------------------------- Memory read --------------------------------
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        3'b101: begin
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                casez (A[15:14])
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                    2'b00:  D[7:0] = FL_DQ;
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                    2'b01:  D[7:0] = ram_data;
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                    2'b1?:  D[7:0] = SRAM_DQ[7:0];
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                endcase
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            end
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        // ---------------------------------- IO read ----------------------------------
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        3'b001: begin
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                // Normally data supplied by the ULA
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                D[7:0] = ula_data;
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134 11 gdevic
                // Kempston joystick at the IO address 0x1F; active bits are high:
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                //                   FIRE         UP           DOWN         LEFT         RIGHT
136 8 gdevic
                if (A[7:0]==8'h1F) begin
137 11 gdevic
                    D[7:0] = { 3'b0, !kempston[4],!kempston[0],!kempston[1],!kempston[2],!kempston[3] };
138 8 gdevic
                end
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            end
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    default:
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        D[7:0] = {8{1'bz}};
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    endcase
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end
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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// 16K of the original ZX Spectrum ROM is in the flash at the address 0
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// 16K of The GOSH WONDERFUL ZX Spectrum ROM is in the flash following it
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//    http://www.wearmouth.demon.co.uk/gw03/gw03info.htm
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// SW0 selectes which ROM is going to be used by feeding the address bit 14
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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assign FL_ADDR[13:0] = A[13:0];
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assign FL_ADDR[14] = SW0;
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assign LEDR[0] = SW0;           // Glow red when using alternate ROM
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assign FL_ADDR[21:15] = 0;
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assign FL_RST_N = KEY0;
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assign FL_CE_N = 0;
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assign FL_OE_N = 0;
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assign FL_WE_N = 1;
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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// Instantiate 16K dual-port RAM
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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wire clk_vram;
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// "A" port is the CPU side, "B" port is the VGA image generator in the ULA
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ram16 ram16_(
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    .clock      (clk_vram),     // RAM connects to the higher, pixel clock rate
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    .address_a  (A[13:0]),      // Address in to the RAM from the CPU side
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    .data_a     (D),            // Data in to the RAM from the CPU side
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    .q_a        (ram_data),     // Data out from the RAM into the data bus selector
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    .wren_a     (RamWE),
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    .address_b  ({1'b0, vram_address}),
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    .data_b     (8'b0),
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    .q_b        (vram_data),
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    .wren_b     ('0));
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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// 32K of ZX Spectrum extended RAM is using the external SRAM memory
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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assign SRAM_ADDR[14:0] = A[14:0];
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assign SRAM_ADDR[17:15] = 0;
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assign SRAM_CE_N = 0;
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assign SRAM_OE_N = 0;
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assign SRAM_WE_N = !ExtRamWE;
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assign SRAM_UB_N = 1;
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assign SRAM_LB_N = 0;
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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// Instantiate ULA
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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wire clk_cpu;                   // Global CPU clock of 3.5 MHz
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assign LEDR[2] = SW2;           // Glow red when in turbo mode (7.0 MHz)
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wire [12:0] vram_address;       // ULA video block requests a byte from the video RAM
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wire [7:0] vram_data;           // ULA video block reads a byte from the video RAM
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wire vs_nintr;                  // Generates a vertical retrace interrupt
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wire pressed;                   // Show that a key is being pressed
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wire beeper;                    // Show the beeper state
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ula ula_(
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    //-------- Clocks and reset -----------------
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    .CLOCK_27 (CLOCK_27),       // Input clock 27 MHz
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    .CLOCK_24 (CLOCK_24),       // Input clock 24 MHz
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    .turbo (SW2),               // Turbo speed (3.5 MHz x 2 = 7.0 MHz)
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    .clk_vram (clk_vram),
206 10 gdevic
    .nreset (reset),            // KEY0 is reset; on DE1, keys are active low!
207 8 gdevic
    .locked (locked),           // PLL is locked signal
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    //-------- CPU control ----------------------
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    .clk_cpu (clk_cpu),         // Generates CPU clock of 3.5 MHz
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    .vs_nintr (vs_nintr),       // Generates a vertical retrace interrupt
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    //-------- Address and data buses -----------
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    .A (A),                     // Input address bus
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    .D (D),                     // Input data bus
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    .ula_data (ula_data),       // Output data
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    .io_we (io_we),             // Write enable to data register through IO
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    .vram_address (vram_address),// ULA video block requests a byte from the video RAM
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    .vram_data (vram_data),     // ULA video block reads a byte from the video RAM
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    //-------- PS/2 Keyboard --------------------
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    .PS2_CLK (PS2_CLK),
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    .PS2_DAT (PS2_DAT),
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    .pressed (pressed),
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227
    //-------- Audio (Tape player) --------------
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    .I2C_SCLK (I2C_SCLK),
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    .I2C_SDAT (I2C_SDAT),
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    .AUD_XCK (AUD_XCK),
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    .AUD_ADCLRCK (AUD_ADCLRCK),
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    .AUD_DACLRCK (AUD_DACLRCK),
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    .AUD_BCLK (AUD_BCLK),
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    .AUD_DACDAT (AUD_DACDAT),
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    .AUD_ADCDAT (AUD_ADCDAT),
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    .beeper (beeper),
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    //-------- VGA connector --------------------
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    .VGA_R (VGA_R),
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    .VGA_G (VGA_G),
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    .VGA_B (VGA_B),
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    .VGA_HS (VGA_HS),
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    .VGA_VS (VGA_VS)
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);
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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// Instantiate A-Z80 CPU
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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wire nM1;
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wire nMREQ;
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wire nIORQ;
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wire nRD;
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wire nWR;
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wire nRFSH;
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wire nHALT;
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wire nBUSACK;
257
 
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wire nWAIT = 1;
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wire nINT = (SW1==0)? vs_nintr : '1;// SW1 disables interrupts and, hence, keyboard
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assign LEDR[1] = SW1;               // Glow red when interrupts are *disabled*
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wire nNMI = KEY1;                   // Pressing KEY1 issues a NMI
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wire nBUSRQ = 1;
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264
z80_top_direct_n z80_(
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    .nM1 (nM1),
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    .nMREQ (nMREQ),
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    .nIORQ (nIORQ),
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    .nRD (nRD),
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    .nWR (nWR),
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    .nRFSH (nRFSH),
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    .nHALT (nHALT),
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    .nBUSACK (nBUSACK),
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    .nWAIT (nWAIT),
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    .nINT (nINT),
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    .nNMI (nNMI),
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    .nRESET (reset),
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    .nBUSRQ (nBUSRQ),
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    .CLK (clk_cpu),
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    .A (A),
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    .D (D)
283
);
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//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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// Lit green LEDs to show activity on a Kempston compatible joystick
287
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
288 11 gdevic
assign LEDG[0] = !kempston[0]; // UP
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assign LEDG[1] = !kempston[1]; // DOWN
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assign LEDG[2] = !kempston[2]; // LEFT
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assign LEDG[3] = !kempston[3]; // RIGHT
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assign LEDG[4] = !kempston[4]; // FIRE
293 8 gdevic
 
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endmodule

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