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tariq786 |
/////////////////////////////////////////////////////////////////////
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//// ////
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//// AES Cipher Top Level ////
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//// ////
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//// ////
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//// Author: Rudolf Usselmann ////
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//// rudi@asics.ws ////
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//// ////
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//// ////
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//// Downloaded from: http://www.opencores.org/cores/aes_core/ ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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//// ////
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//// Copyright (C) 2000-2002 Rudolf Usselmann ////
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//// www.asics.ws ////
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//// rudi@asics.ws ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer.////
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//// ////
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//// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY ////
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//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED ////
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//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ////
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//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR ////
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//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, ////
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//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ////
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//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE ////
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//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR ////
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//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ////
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//// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ////
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//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT ////
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//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ////
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//// POSSIBILITY OF SUCH DAMAGE. ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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//// Modified to achieve 5 cycles - stage functionality ////
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//// By Tariq Bashir Ahmad ////
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//// tariq.bashir@gmail.com ////
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//// http://www.ecs.umass.edu/~tbashir ////
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`timescale 1 ns/1 ps
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module aes_cipher_top(clk, rst, ld, done, key, text_in, text_out,aes_en);
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input clk, rst;
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input ld;
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output done;
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input [127:0] key;
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input [127:0] text_in;
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output [127:0] text_out;
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input aes_en;
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////////////////////////////////////////////////////////////////////
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//
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// Local Wires
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//
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wire [31:0] w0, w1, w2, w3, w4, w5, w6, w7;
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/*wire [127:0] key_odd,key_even;
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*/
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reg [127:0] text_in_r;
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reg [127:0] text_out;
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reg [127:0] text_out_temp;
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reg [7:0] sa00, sa01, sa02, sa03;
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reg [7:0] sa10, sa11, sa12, sa13;
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reg [7:0] sa20, sa21, sa22, sa23;
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reg [7:0] sa30, sa31, sa32, sa33;
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wire [7:0] sa00_next, sa01_next, sa02_next, sa03_next;
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wire [7:0] sa10_next, sa11_next, sa12_next, sa13_next;
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wire [7:0] sa20_next, sa21_next, sa22_next, sa23_next;
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wire [7:0] sa30_next, sa31_next, sa32_next, sa33_next;
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wire [7:0] sa00_sub, sa01_sub, sa02_sub, sa03_sub;
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wire [7:0] sa10_sub, sa11_sub, sa12_sub, sa13_sub;
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wire [7:0] sa20_sub, sa21_sub, sa22_sub, sa23_sub;
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wire [7:0] sa30_sub, sa31_sub, sa32_sub, sa33_sub;
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wire [7:0] sa00_sr, sa01_sr, sa02_sr, sa03_sr;
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wire [7:0] sa10_sr, sa11_sr, sa12_sr, sa13_sr;
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wire [7:0] sa20_sr, sa21_sr, sa22_sr, sa23_sr;
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wire [7:0] sa30_sr, sa31_sr, sa32_sr, sa33_sr;
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wire [7:0] sa00_mc, sa01_mc, sa02_mc, sa03_mc;
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wire [7:0] sa10_mc, sa11_mc, sa12_mc, sa13_mc;
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wire [7:0] sa20_mc, sa21_mc, sa22_mc, sa23_mc;
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wire [7:0] sa30_mc, sa31_mc, sa32_mc, sa33_mc;
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wire [7:0] sa00_next_round2, sa01_next_round2, sa02_next_round2, sa03_next_round2;
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wire [7:0] sa10_next_round2, sa11_next_round2, sa12_next_round2, sa13_next_round2;
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wire [7:0] sa20_next_round2, sa21_next_round2, sa22_next_round2, sa23_next_round2;
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wire [7:0] sa30_next_round2, sa31_next_round2, sa32_next_round2, sa33_next_round2;
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wire [7:0] sa00_sub_round2, sa01_sub_round2, sa02_sub_round2, sa03_sub_round2;
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wire [7:0] sa10_sub_round2, sa11_sub_round2, sa12_sub_round2, sa13_sub_round2;
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wire [7:0] sa20_sub_round2, sa21_sub_round2, sa22_sub_round2, sa23_sub_round2;
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wire [7:0] sa30_sub_round2, sa31_sub_round2, sa32_sub_round2, sa33_sub_round2;
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wire [7:0] sa00_sr_round2, sa01_sr_round2, sa02_sr_round2, sa03_sr_round2;
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wire [7:0] sa10_sr_round2, sa11_sr_round2, sa12_sr_round2, sa13_sr_round2;
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wire [7:0] sa20_sr_round2, sa21_sr_round2, sa22_sr_round2, sa23_sr_round2;
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wire [7:0] sa30_sr_round2, sa31_sr_round2, sa32_sr_round2, sa33_sr_round2;
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wire [7:0] sa00_mc_round2, sa01_mc_round2, sa02_mc_round2, sa03_mc_round2;
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wire [7:0] sa10_mc_round2, sa11_mc_round2, sa12_mc_round2, sa13_mc_round2;
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wire [7:0] sa20_mc_round2, sa21_mc_round2, sa22_mc_round2, sa23_mc_round2;
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wire [7:0] sa30_mc_round2, sa31_mc_round2, sa32_mc_round2, sa33_mc_round2;
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reg done, ld_r;
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reg [3:0] dcnt;
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reg done2;
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////////////////////////////////////////////////////////////////////
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//
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// Misc Logic
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//
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always @(posedge clk)
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if(aes_en)
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begin
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if(rst) begin dcnt <= 4'h0; end
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else
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if(ld) begin dcnt <= 4'h6; end
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else
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if(|dcnt) begin dcnt <= dcnt - 4'h1; end
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end
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always @(posedge clk) done <= !(|dcnt[3:1]) & dcnt[0] & !ld;
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always @(posedge clk) if(ld) text_in_r <= text_in;
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always @(posedge clk) ld_r <= ld;
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////////////////////////////////////////////////////////////////////
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// key expansion
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aes_key_expand_128 u0(
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.clk( clk ),
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.kld( ld_r ),
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.key( key ),
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.w0( w0 ),
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.w1( w1 ),
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.w2( w2 ),
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.w3( w3 ),
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.w4_reg( w4 ),
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.w5_reg( w5 ),
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.w6_reg( w6 ),
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.w7_reg( w7 )
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);
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/*assign key_odd = {w0,w1,w2,w3};
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assign key_even = {w4,w5,w6,w7};
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*/
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/*assign {w0,w1,w2,w3} = 128'h0;
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assign {w4,w5,w6,w7} = 128'h62636363626363636263636362636363;
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*/
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// Initial Permutation (AddRoundKey)
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//
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/*
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always @(posedge clk)
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begin
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w0 <= w0_net;
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w1 <= w1_net;
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w2 <= w2_net;
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w3 <= w3_net;
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w4 <= w4_net;
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w5 <= w5_net;
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w6 <= w6_net;
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w7 <= w7_net;
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end
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*/
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always @(posedge clk)
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begin
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sa33 <= ld_r ? text_in_r[007:000] ^ w3[07:00] : sa33_mc_round2 ^ w3[07:00];
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sa23 <= ld_r ? text_in_r[015:008] ^ w3[15:08] : sa23_mc_round2 ^ w3[15:08];
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sa13 <= ld_r ? text_in_r[023:016] ^ w3[23:16] : sa13_mc_round2 ^ w3[23:16];
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sa03 <= ld_r ? text_in_r[031:024] ^ w3[31:24] : sa03_mc_round2 ^ w3[31:24];
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sa32 <= ld_r ? text_in_r[039:032] ^ w2[07:00] : sa32_mc_round2 ^ w2[07:00];
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sa22 <= ld_r ? text_in_r[047:040] ^ w2[15:08] : sa22_mc_round2 ^ w2[15:08];
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sa12 <= ld_r ? text_in_r[055:048] ^ w2[23:16] : sa12_mc_round2 ^ w2[23:16];
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sa02 <= ld_r ? text_in_r[063:056] ^ w2[31:24] : sa02_mc_round2 ^ w2[31:24];
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sa31 <= ld_r ? text_in_r[071:064] ^ w1[07:00] : sa31_mc_round2 ^ w1[07:00];
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sa21 <= ld_r ? text_in_r[079:072] ^ w1[15:08] : sa21_mc_round2 ^ w1[15:08];
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sa11 <= ld_r ? text_in_r[087:080] ^ w1[23:16] : sa11_mc_round2 ^ w1[23:16];
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sa01 <= ld_r ? text_in_r[095:088] ^ w1[31:24] : sa01_mc_round2 ^ w1[31:24];
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sa30 <= ld_r ? text_in_r[103:096] ^ w0[07:00] : sa30_mc_round2 ^ w0[07:00];
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sa20 <= ld_r ? text_in_r[111:104] ^ w0[15:08] : sa20_mc_round2 ^ w0[15:08];
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sa10 <= ld_r ? text_in_r[119:112] ^ w0[23:16] : sa10_mc_round2 ^ w0[23:16];
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sa00 <= ld_r ? text_in_r[127:120] ^ w0[31:24] : sa00_mc_round2 ^ w0[31:24];
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/*$strobe($time,": roundkeyodd = %h\n",{w0,w1,w2,w3});
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$strobe($time,": state is %h\n",{sa00, sa01, sa02, sa03,
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sa10, sa11, sa12, sa13,
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sa20, sa21, sa22, sa23,
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sa30, sa31, sa32, sa33});*/
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end
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////////////////////////////////////////////////////////////////////
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//
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// Modules instantiation
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//
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//sbox lookup
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aes_sbox us00( .a( sa00 ), .d( sa00_sub ));
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aes_sbox us01( .a( sa01 ), .d( sa01_sub ));
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aes_sbox us02( .a( sa02 ), .d( sa02_sub ));
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aes_sbox us03( .a( sa03 ), .d( sa03_sub ));
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aes_sbox us10( .a( sa10 ), .d( sa10_sub ));
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aes_sbox us11( .a( sa11 ), .d( sa11_sub ));
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aes_sbox us12( .a( sa12 ), .d( sa12_sub ));
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aes_sbox us13( .a( sa13 ), .d( sa13_sub ));
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aes_sbox us20( .a( sa20 ), .d( sa20_sub ));
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aes_sbox us21( .a( sa21 ), .d( sa21_sub ));
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aes_sbox us22( .a( sa22 ), .d( sa22_sub ));
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aes_sbox us23( .a( sa23 ), .d( sa23_sub ));
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aes_sbox us30( .a( sa30 ), .d( sa30_sub ));
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aes_sbox us31( .a( sa31 ), .d( sa31_sub ));
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aes_sbox us32( .a( sa32 ), .d( sa32_sub ));
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aes_sbox us33( .a( sa33 ), .d( sa33_sub ));
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////////////////////////////////////////////////////////////////////
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//
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// Round Permutations
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//
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assign sa00_sr = sa00_sub; //
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assign sa01_sr = sa01_sub; //no shift
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assign sa02_sr = sa02_sub; //
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assign sa03_sr = sa03_sub; //
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assign sa10_sr = sa11_sub; //
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assign sa11_sr = sa12_sub; // left shift by 1
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assign sa12_sr = sa13_sub; //
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assign sa13_sr = sa10_sub; //
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assign sa20_sr = sa22_sub; //
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assign sa21_sr = sa23_sub; // left shift by 2
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assign sa22_sr = sa20_sub; //
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assign sa23_sr = sa21_sub; //
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assign sa30_sr = sa33_sub; //
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assign sa31_sr = sa30_sub; // left shift by 3
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assign sa32_sr = sa31_sub; //
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assign sa33_sr = sa32_sub; //
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// mix column operation
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assign {sa00_mc, sa10_mc, sa20_mc, sa30_mc} = mix_col(sa00_sr,sa10_sr,sa20_sr,sa30_sr);
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assign {sa01_mc, sa11_mc, sa21_mc, sa31_mc} = mix_col(sa01_sr,sa11_sr,sa21_sr,sa31_sr);
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assign {sa02_mc, sa12_mc, sa22_mc, sa32_mc} = mix_col(sa02_sr,sa12_sr,sa22_sr,sa32_sr);
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assign {sa03_mc, sa13_mc, sa23_mc, sa33_mc} = mix_col(sa03_sr,sa13_sr,sa23_sr,sa33_sr);
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//// add round key
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assign sa00_next_round2 = sa00_mc ^ w4[31:24];
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assign sa01_next_round2 = sa01_mc ^ w5[31:24];
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assign sa02_next_round2 = sa02_mc ^ w6[31:24];
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assign sa03_next_round2 = sa03_mc ^ w7[31:24];
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assign sa10_next_round2 = sa10_mc ^ w4[23:16];
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assign sa11_next_round2 = sa11_mc ^ w5[23:16];
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assign sa12_next_round2 = sa12_mc ^ w6[23:16];
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assign sa13_next_round2 = sa13_mc ^ w7[23:16];
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assign sa20_next_round2 = sa20_mc ^ w4[15:08];
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assign sa21_next_round2 = sa21_mc ^ w5[15:08];
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assign sa22_next_round2 = sa22_mc ^ w6[15:08];
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assign sa23_next_round2 = sa23_mc ^ w7[15:08];
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assign sa30_next_round2 = sa30_mc ^ w4[07:00];
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assign sa31_next_round2 = sa31_mc ^ w5[07:00];
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assign sa32_next_round2 = sa32_mc ^ w6[07:00];
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assign sa33_next_round2 = sa33_mc ^ w7[07:00];
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always @(posedge clk)
|
287 |
|
|
if(aes_en && ~rst)
|
288 |
|
|
begin
|
289 |
|
|
|
290 |
|
|
/* $strobe($time,": roundkeyodd = %h, text_out_odd is %h\n",{w0,w1,w2,w3},text_out_temp);
|
291 |
|
|
$strobe($time,": roundkeyeven is %h\n",{w4,w5,w6,w7}); */
|
292 |
|
|
text_out_temp[127:120] <= sa00_sr ^ w4[31:24];
|
293 |
|
|
text_out_temp[095:088] <= sa01_sr ^ w5[31:24];
|
294 |
|
|
text_out_temp[063:056] <= sa02_sr ^ w6[31:24];
|
295 |
|
|
text_out_temp[031:024] <= sa03_sr ^ w7[31:24];
|
296 |
|
|
text_out_temp[119:112] <= sa10_sr ^ w4[23:16];
|
297 |
|
|
text_out_temp[087:080] <= sa11_sr ^ w5[23:16];
|
298 |
|
|
text_out_temp[055:048] <= sa12_sr ^ w6[23:16];
|
299 |
|
|
text_out_temp[023:016] <= sa13_sr ^ w7[23:16];
|
300 |
|
|
text_out_temp[111:104] <= sa20_sr ^ w4[15:08];
|
301 |
|
|
text_out_temp[079:072] <= sa21_sr ^ w5[15:08];
|
302 |
|
|
text_out_temp[047:040] <= sa22_sr ^ w6[15:08];
|
303 |
|
|
text_out_temp[015:008] <= sa23_sr ^ w7[15:08];
|
304 |
|
|
text_out_temp[103:096] <= sa30_sr ^ w4[07:00];
|
305 |
|
|
text_out_temp[071:064] <= sa31_sr ^ w5[07:00];
|
306 |
|
|
text_out_temp[039:032] <= sa32_sr ^ w6[07:00];
|
307 |
|
|
text_out_temp[007:000] <= sa33_sr ^ w7[07:00];
|
308 |
|
|
end
|
309 |
|
|
|
310 |
|
|
|
311 |
|
|
|
312 |
|
|
|
313 |
|
|
////////////////////// round i + 1 //////////////////////////////////
|
314 |
|
|
//sbox lookup
|
315 |
|
|
aes_sbox us00_round2( .a( sa00_next_round2 ), .d( sa00_sub_round2 ));
|
316 |
|
|
aes_sbox us01_round2( .a( sa01_next_round2 ), .d( sa01_sub_round2 ));
|
317 |
|
|
aes_sbox us02_round2( .a( sa02_next_round2 ), .d( sa02_sub_round2 ));
|
318 |
|
|
aes_sbox us03_round2( .a( sa03_next_round2 ), .d( sa03_sub_round2 ));
|
319 |
|
|
aes_sbox us10_round2( .a( sa10_next_round2 ), .d( sa10_sub_round2 ));
|
320 |
|
|
aes_sbox us11_round2( .a( sa11_next_round2 ), .d( sa11_sub_round2 ));
|
321 |
|
|
aes_sbox us12_round2( .a( sa12_next_round2 ), .d( sa12_sub_round2 ));
|
322 |
|
|
aes_sbox us13_round2( .a( sa13_next_round2 ), .d( sa13_sub_round2 ));
|
323 |
|
|
aes_sbox us20_round2( .a( sa20_next_round2 ), .d( sa20_sub_round2 ));
|
324 |
|
|
aes_sbox us21_round2( .a( sa21_next_round2 ), .d( sa21_sub_round2 ));
|
325 |
|
|
aes_sbox us22_round2( .a( sa22_next_round2 ), .d( sa22_sub_round2 ));
|
326 |
|
|
aes_sbox us23_round2( .a( sa23_next_round2 ), .d( sa23_sub_round2 ));
|
327 |
|
|
aes_sbox us30_round2( .a( sa30_next_round2 ), .d( sa30_sub_round2 ));
|
328 |
|
|
aes_sbox us31_round2( .a( sa31_next_round2 ), .d( sa31_sub_round2 ));
|
329 |
|
|
aes_sbox us32_round2( .a( sa32_next_round2 ), .d( sa32_sub_round2 ));
|
330 |
|
|
aes_sbox us33_round2( .a( sa33_next_round2 ), .d( sa33_sub_round2 ));
|
331 |
|
|
|
332 |
|
|
|
333 |
|
|
// Round Permutations
|
334 |
|
|
//
|
335 |
|
|
|
336 |
|
|
assign sa00_sr_round2 = sa00_sub_round2; //
|
337 |
|
|
assign sa01_sr_round2 = sa01_sub_round2; //no shift
|
338 |
|
|
assign sa02_sr_round2 = sa02_sub_round2; //
|
339 |
|
|
assign sa03_sr_round2 = sa03_sub_round2; //
|
340 |
|
|
|
341 |
|
|
assign sa10_sr_round2 = sa11_sub_round2; //
|
342 |
|
|
assign sa11_sr_round2 = sa12_sub_round2; // left shift by 1
|
343 |
|
|
assign sa12_sr_round2 = sa13_sub_round2; //
|
344 |
|
|
assign sa13_sr_round2 = sa10_sub_round2; //
|
345 |
|
|
|
346 |
|
|
assign sa20_sr_round2 = sa22_sub_round2; //
|
347 |
|
|
assign sa21_sr_round2 = sa23_sub_round2; // left shift by 2
|
348 |
|
|
assign sa22_sr_round2 = sa20_sub_round2; //
|
349 |
|
|
assign sa23_sr_round2 = sa21_sub_round2; //
|
350 |
|
|
|
351 |
|
|
assign sa30_sr_round2 = sa33_sub_round2; //
|
352 |
|
|
assign sa31_sr_round2 = sa30_sub_round2; // left shift by 3
|
353 |
|
|
assign sa32_sr_round2 = sa31_sub_round2; //
|
354 |
|
|
assign sa33_sr_round2 = sa32_sub_round2; //
|
355 |
|
|
|
356 |
|
|
// mix column operation
|
357 |
|
|
assign {sa00_mc_round2, sa10_mc_round2, sa20_mc_round2, sa30_mc_round2} = mix_col(sa00_sr_round2,sa10_sr_round2,sa20_sr_round2,sa30_sr_round2);
|
358 |
|
|
assign {sa01_mc_round2, sa11_mc_round2, sa21_mc_round2, sa31_mc_round2} = mix_col(sa01_sr_round2,sa11_sr_round2,sa21_sr_round2,sa31_sr_round2);
|
359 |
|
|
assign {sa02_mc_round2, sa12_mc_round2, sa22_mc_round2, sa32_mc_round2} = mix_col(sa02_sr_round2,sa12_sr_round2,sa22_sr_round2,sa32_sr_round2);
|
360 |
|
|
assign {sa03_mc_round2, sa13_mc_round2, sa23_mc_round2, sa33_mc_round2} = mix_col(sa03_sr_round2,sa13_sr_round2,sa23_sr_round2,sa33_sr_round2);
|
361 |
|
|
|
362 |
|
|
////////////////////////////////////////////////////////////////////
|
363 |
|
|
//
|
364 |
|
|
// Final text output
|
365 |
|
|
//
|
366 |
|
|
|
367 |
|
|
|
368 |
|
|
always @(posedge clk)
|
369 |
|
|
if(aes_en && ~rst)
|
370 |
|
|
begin
|
371 |
|
|
/* $strobe($time,": round_key2 is %h\n",{w4,w5,w6,w7});
|
372 |
|
|
$strobe($time,": roundkeyeven = %h, text_out_even is %h\n",{w4,w5,w6,w7},text_out);*/
|
373 |
|
|
text_out[127:120] <= sa00_sr_round2 ^ w0[31:24];
|
374 |
|
|
text_out[095:088] <= sa01_sr_round2 ^ w1[31:24];
|
375 |
|
|
text_out[063:056] <= sa02_sr_round2 ^ w2[31:24];
|
376 |
|
|
text_out[031:024] <= sa03_sr_round2 ^ w3[31:24];
|
377 |
|
|
text_out[119:112] <= sa10_sr_round2 ^ w0[23:16];
|
378 |
|
|
text_out[087:080] <= sa11_sr_round2 ^ w1[23:16];
|
379 |
|
|
text_out[055:048] <= sa12_sr_round2 ^ w2[23:16];
|
380 |
|
|
text_out[023:016] <= sa13_sr_round2 ^ w3[23:16];
|
381 |
|
|
text_out[111:104] <= sa20_sr_round2 ^ w0[15:08];
|
382 |
|
|
text_out[079:072] <= sa21_sr_round2 ^ w1[15:08];
|
383 |
|
|
text_out[047:040] <= sa22_sr_round2 ^ w2[15:08];
|
384 |
|
|
text_out[015:008] <= sa23_sr_round2 ^ w3[15:08];
|
385 |
|
|
text_out[103:096] <= sa30_sr_round2 ^ w0[07:00];
|
386 |
|
|
text_out[071:064] <= sa31_sr_round2 ^ w1[07:00];
|
387 |
|
|
text_out[039:032] <= sa32_sr_round2 ^ w2[07:00];
|
388 |
|
|
text_out[007:000] <= sa33_sr_round2 ^ w3[07:00];
|
389 |
|
|
end
|
390 |
|
|
|
391 |
|
|
|
392 |
|
|
always @(posedge clk)
|
393 |
|
|
begin
|
394 |
|
|
/* $strobe($time,": text_out_temp is %h\n",text_out_temp);
|
395 |
|
|
|
396 |
|
|
|
397 |
|
|
*/ /*
|
398 |
|
|
$strobe($time,": subbytes is %h\n",{sa00_sub, sa01_sub, sa02_sub, sa03_sub,
|
399 |
|
|
sa10_sub, sa11_sub, sa12_sub, sa13_sub,
|
400 |
|
|
sa20_sub, sa21_sub, sa22_sub, sa23_sub,
|
401 |
|
|
sa30_sub, sa31_sub, sa32_sub, sa33_sub});
|
402 |
|
|
|
403 |
|
|
$strobe($time,": shiftrows is %h\n",{sa00_sr, sa01_sr, sa02_sr, sa03_sr,
|
404 |
|
|
sa10_sr, sa11_sr, sa12_sr, sa13_sr,
|
405 |
|
|
sa20_sr, sa21_sr, sa22_sr, sa23_sr,
|
406 |
|
|
sa30_sr, sa31_sr, sa32_sr, sa33_sr});
|
407 |
|
|
|
408 |
|
|
$strobe($time,": mixcolumn is %h\n",{sa00_mc, sa01_mc, sa02_mc, sa03_mc,
|
409 |
|
|
sa10_mc, sa11_mc, sa12_mc, sa13_mc,
|
410 |
|
|
sa20_mc, sa21_mc, sa22_mc, sa23_mc,
|
411 |
|
|
sa30_mc, sa31_mc, sa32_mc, sa33_mc});
|
412 |
|
|
|
413 |
|
|
$strobe($time,": sa_next_into_even is %h\n",{sa00_next_round2, sa01_next_round2, sa02_next_round2, sa03_next_round2,
|
414 |
|
|
sa10_next_round2, sa11_next_round2, sa12_next_round2, sa13_next_round2,
|
415 |
|
|
sa20_next_round2, sa21_next_round2, sa22_next_round2, sa23_next_round2,
|
416 |
|
|
sa30_next_round2, sa31_next_round2, sa32_next_round2, sa33_next_round2});
|
417 |
|
|
|
418 |
|
|
$strobe($time,": subbytes_e is %h\n",{sa00_sub_round2, sa01_sub_round2, sa02_sub_round2, sa03_sub_round2,
|
419 |
|
|
sa10_sub_round2, sa11_sub_round2, sa12_sub_round2, sa13_sub_round2,
|
420 |
|
|
sa20_sub_round2, sa21_sub_round2, sa22_sub_round2, sa23_sub_round2,
|
421 |
|
|
sa30_sub_round2, sa31_sub_round2, sa32_sub_round2, sa33_sub_round2});
|
422 |
|
|
|
423 |
|
|
$strobe($time,": shiftrows_e is %h\n",{sa00_sr_round2, sa01_sr_round2, sa02_sr_round2, sa03_sr_round2,
|
424 |
|
|
sa10_sr_round2, sa11_sr_round2, sa12_sr_round2, sa13_sr_round2,
|
425 |
|
|
sa20_sr_round2, sa21_sr_round2, sa22_sr_round2, sa23_sr_round2,
|
426 |
|
|
sa30_sr_round2, sa31_sr_round2, sa32_sr_round2, sa33_sr_round2});
|
427 |
|
|
|
428 |
|
|
$strobe($time,": mixcolumn_e is %h\n",{sa00_mc_round2, sa01_mc_round2, sa02_mc_round2, sa03_mc_round2,
|
429 |
|
|
sa10_mc_round2, sa11_mc_round2, sa12_mc_round2, sa13_mc_round2,
|
430 |
|
|
sa20_mc_round2, sa21_mc_round2, sa22_mc_round2, sa23_mc_round2,
|
431 |
|
|
sa30_mc_round2, sa31_mc_round2, sa32_mc_round2, sa33_mc_round2});
|
432 |
|
|
*/
|
433 |
|
|
end
|
434 |
|
|
|
435 |
|
|
|
436 |
|
|
/*
|
437 |
|
|
always @(posedge clk)
|
438 |
|
|
begin
|
439 |
|
|
if(done)
|
440 |
|
|
begin
|
441 |
|
|
text_out_64 <= text_out[127:64];
|
442 |
|
|
// done2 <= 1;
|
443 |
|
|
end
|
444 |
|
|
else if(~done)
|
445 |
|
|
text_out_64 <= text_out[63:0];
|
446 |
|
|
end
|
447 |
|
|
*/
|
448 |
|
|
|
449 |
|
|
/*
|
450 |
|
|
always @(posedge clk)
|
451 |
|
|
begin
|
452 |
|
|
if(done2)
|
453 |
|
|
begin
|
454 |
|
|
text_out_64 <= text_out[63:0];
|
455 |
|
|
end
|
456 |
|
|
end
|
457 |
|
|
*/
|
458 |
|
|
////////////////////////////////////////////////////////////////////
|
459 |
|
|
//
|
460 |
|
|
// Generic Functions
|
461 |
|
|
//
|
462 |
|
|
|
463 |
|
|
function [31:0] mix_col;
|
464 |
|
|
input [7:0] s0,s1,s2,s3;
|
465 |
|
|
//reg [7:0] s0_o,s1_o,s2_o,s3_o;
|
466 |
|
|
begin
|
467 |
|
|
mix_col[31:24]=xtime(s0)^xtime(s1)^s1^s2^s3;
|
468 |
|
|
mix_col[23:16]=s0^xtime(s1)^xtime(s2)^s2^s3;
|
469 |
|
|
mix_col[15:08]=s0^s1^xtime(s2)^xtime(s3)^s3;
|
470 |
|
|
mix_col[07:00]=xtime(s0)^s0^s1^s2^xtime(s3);
|
471 |
|
|
end
|
472 |
|
|
endfunction
|
473 |
|
|
|
474 |
|
|
function [7:0] xtime;
|
475 |
|
|
input [7:0] b; xtime={b[6:0],1'b0}^(8'h1b&{8{b[7]}});
|
476 |
|
|
endfunction
|
477 |
|
|
|
478 |
|
|
|
479 |
|
|
|
480 |
|
|
endmodule
|
481 |
|
|
|
482 |
|
|
|
483 |
|
|
|