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[/] [amber/] [trunk/] [hw/] [tests/] [uart_rxint.S] - Blame information for rev 2

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1 2 csantifort
/*****************************************************************
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//                                                              //
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//  Amber 2 System UART Test                                    //
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//                                                              //
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//  This file is part of the Amber project                      //
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//  http://www.opencores.org/project,amber                      //
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//                                                              //
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//  Description                                                 //
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//  Tests the UART receive interrupt function                   //
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//  Some text is sent from the test_uart to the uart            //
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//  and an interrupt generated.                                 //
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//                                                              //
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//  Author(s):                                                  //
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//      - Conor Santifort, csantifort.amber@gmail.com           //
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//                                                              //
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//////////////////////////////////////////////////////////////////
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//                                                              //
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// Copyright (C) 2010 Authors and OPENCORES.ORG                 //
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//                                                              //
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// This source file may be used and distributed without         //
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// restriction provided that this copyright statement is not    //
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// removed from the file and that any derivative work contains  //
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// the original copyright notice and the associated disclaimer. //
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//                                                              //
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// This source file is free software; you can redistribute it   //
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// and/or modify it under the terms of the GNU Lesser General   //
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// Public License as published by the Free Software Foundation; //
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// either version 2.1 of the License, or (at your option) any   //
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// later version.                                               //
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//                                                              //
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// This source is distributed in the hope that it will be       //
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// useful, but WITHOUT ANY WARRANTY; without even the implied   //
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// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      //
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// PURPOSE.  See the GNU Lesser General Public License for more //
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// details.                                                     //
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//                                                              //
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// You should have received a copy of the GNU Lesser General    //
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// Public License along with this source; if not, download it   //
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// from http://www.opencores.org/lgpl.shtml                     //
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//                                                              //
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*****************************************************************/
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#include "amber_registers.h"
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        .section .text
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        .globl  main
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main:
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        /* 0x00 Reset Interrupt vector address */
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        b       start
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        /* 0x04 Undefined Instruction Interrupt vector address */
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        b       testfail
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        /* 0x08 SWI Interrupt vector address */
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        b       testfail
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        /* 0x0c Prefetch abort Interrupt vector address */
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        b       testfail
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        /* 0x10 Data abort Interrupt vector address */
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        b       testfail
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        b       testfail
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        /* 0x18 IRQ vector address */
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        b       service_irq
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        /* 0x1c FIRQ vector address */
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        b       testfail
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start:
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        /* Switch to User Mode */
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        /* and unset interrupt mask bits */
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        mov     r0,   #0x00000000
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        teqp    pc, r0
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        @ Configure the Amber UART to use the FIFO to receive
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        ldr     r4, AdrUART0LCRH
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        mov     r5, #0x10
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        str     r5, [r4]
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        @ Configure the Amber UART to enable the receive interrupt
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        ldr     r4, AdrUART0CR
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        mov     r5, #0x10
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        str     r5, [r4]
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        @ Configure the interrupt controller to enable the UART0 interrupt
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        ldr     r4, AdrIC_IRQ0_ENABLESET
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        mov     r5, #0x2
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        str     r5, [r4]
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        @ Load some bytes into the testbench uart
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        @ so it can transmit them to the Amber UART
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        ldr     r4, AdrTEST_UART_TXD
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        ldr     r5, =Message
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        ldr     r9, =Message
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        ldr     r7, =EndMessage
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        ldr     r8, AdrTEST_UART_STATUS
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        @ transmit a byte from test uart
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        ldrb    r6, [r5], #1
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        str     r6, [r4]
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        @ test_uart transmit enable
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        ldr     r0, AdrTEST_UART_CONTROL
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        mov     r1, #1
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        str     r1, [r0]
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main_loop:
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        @ wait if test_uart tx fifo full
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1:      ldr     r0, [r8]
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        ands    r0, r0, #2
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        bne     1b
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        @ transmit a byte from test uart
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        ldrb    r6, [r5], #1
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        str     r6, [r4]
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        @ full message transmitted?
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        cmp     r5, r7
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        bne     main_loop
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        @ while test_uart tx fifo empty == 0
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2:      ldr     r0, [r8]
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        ands    r0, r0, #1
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        beq     2b
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        @ wait until uart tx fifo empty == 1
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        ldr     r3, AdrUART0FR @ flags
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3:      ldr     r1, [r3]
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        ands    r1, r1, #0x80
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        beq     3b
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        b       testpass
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@ ------------------------------------------
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@ ------------------------------------------
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service_irq:
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        ldr     r2, AdrUART0DR @ rx/tx byte
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        ldr     r3, AdrUART0FR @ flags
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1:      ldr     r0, [r3]
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        ands    r0, r0, #0x10
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        @ Jump straight back to normal execution if rx fifo empty
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        subnes  pc, lr, #4
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        ldrb    r0, [r2]        @ uart rx byte
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        ldrb    r1, [r9], #1    @ transmitted text
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        cmp     r0, r1
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        movne   r10, #20
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        bne     testfail
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        @ check if there are more bytes in rx buffer
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        b       1b
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testfail:
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        ldr     r11, AdrTEST_STATUS
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        str     r10, [r11]
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        b       testfail
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testpass:
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        ldr     r11, AdrTEST_STATUS
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        mov     r10, #17
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        str     r10, [r11]
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        b       testpass
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@ ------------------------------------------
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@ ------------------------------------------
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/* Write 17 to this address to generate a Test Passed message */
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AdrTEST_STATUS:         .word  ADR_AMBER_TEST_STATUS
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AdrTEST_IRQ_TIMER:      .word  ADR_AMBER_TEST_IRQ_TIMER
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AdrTEST_RANDOM_NUM:     .word  ADR_AMBER_TEST_RANDOM_NUM
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AdrTEST_UART_CONTROL:   .word  ADR_AMBER_TEST_UART_CONTROL
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AdrTEST_UART_STATUS:    .word  ADR_AMBER_TEST_UART_STATUS
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AdrTEST_UART_TXD:       .word  ADR_AMBER_TEST_UART_TXD
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AdrIC_IRQ0_ENABLESET:   .word  ADR_AMBER_IC_IRQ0_ENABLESET
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AdrUART0LCRH:           .word  ADR_AMBER_UART0_LCRH
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AdrUART0CR:             .word  ADR_AMBER_UART0_CR
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AdrUART0DR:             .word  ADR_AMBER_UART0_DR
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AdrUART0FR:             .word  ADR_AMBER_UART0_FR
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Message:                .ascii "\nThis message is brought to you by UART0\nIsnt that cool\nThats all folks\n"
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EndMessage:             .word  0

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