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[/] [claw/] [trunk/] [or1200_cpu/] [Wave_Forms_For_The_Whole_Thing/] [register_file_top_module.ps] - Blame information for rev 4

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1 2 conte 
%!PS-Adobe-3.0
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%%Creator: Model Technology ModelSim SE vsim 5.7e Simulator 2003.07 Jul  8 2003
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%%Title: /afs/eos.ncsu.edu/service/ece/research/tinker/bviyer/vol1/OR_1200_Multithreading_Implementation/verilog_with_my_changes/or1200_cpu/Wave_Forms_For_The_Whole_Thing/register_file_top_module.ps
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%%CreationDate: 2004-08-14 01:25:01 AM
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%%DocumentData: Clean8Bit
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%%DocumentNeededResources: font Helvetica
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%%Orientation: Landscape
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%%PageOrder: ascend
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%%Pages: 8
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%%EndComments
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%%Page: 1 1
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gsave
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90 rotate 0.12 dup neg scale
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% dump string table
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/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
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/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
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/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
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/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
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/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
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/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
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/ARC {5 -2 roll SX 5 2 roll arc} def
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/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3320 def/REdge 5699 def/LabelWidth 3283 def
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/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
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/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dw) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/aw) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/clk) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rst) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/supv) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/wb_freeze) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/flushpipe) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_read) MLW
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(...0_cpu/or1200_cpu/or1200_rf_top/current_thread_read_out) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_write) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw2) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw2) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/id_freeze) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra2) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb2) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda2) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb2) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_cs) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_write) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_addr) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_i) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_1) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_2) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_3) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_4) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_5) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_6) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_7) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_8) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_1) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_2) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_3) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_4) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_5) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_6) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_7) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_8) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_1) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_2) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_3) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_4) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_5) MLW
80 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_6) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_7) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_8) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_1) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_2) MLW
85 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_3) MLW
86 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_4) MLW
87 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_5) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_6) MLW
89 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_7) MLW
90 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_8) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_1) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_2) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_3) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_4) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_5) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_6) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_7) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_8) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_1) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_2) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_3) MLW
102 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_4) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_5) MLW
104 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_6) MLW
105 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_7) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_8) MLW
107 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_1) MLW
108 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_2) MLW
109 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_3) MLW
110 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_4) MLW
111 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_5) MLW
112 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_6) MLW
113 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_7) MLW
114 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_8) MLW
115 
% draw waveform shading
116 
[] 0 SD
117 
2.995 setlinewidth
118 
 
119 
 
120 
 
121 
3320 329 MT 3320 329 LT 6297 329 LT ST
122 
3320 410 MT 3320 410 LT 6297 410 LT ST
123 
(00000020) 3334 370 WT pop 0 originOffset 37 add RSS
124 
3320 473 MT 3320 473 LT 6297 473 LT ST
125 
3320 554 MT 3320 554 LT 6297 554 LT ST
126 
(00000005) 3334 514 WT pop 0 originOffset 37 add RSS
127 
3320 658 MT 3320 698 LS
128 
3320 698 MT 3518 698 LS
129 
3518 698 MT 3518 618 LS
130 
3518 618 MT 3717 618 LS
131 
3717 618 MT 3717 698 LS
132 
3717 698 MT 3915 698 LS
133 
3915 698 MT 3915 618 LS
134 
3915 618 MT 4114 618 LS
135 
4114 618 MT 4114 698 LS
136 
4114 698 MT 4312 698 LS
137 
4312 698 MT 4312 618 LS
138 
4312 618 MT 4511 618 LS
139 
4511 618 MT 4511 698 LS
140 
4511 698 MT 4709 698 LS
141 
4709 698 MT 4709 618 LS
142 
4709 618 MT 4908 618 LS
143 
4908 618 MT 4908 698 LS
144 
4908 698 MT 5106 698 LS
145 
5106 698 MT 5106 618 LS
146 
5106 618 MT 5305 618 LS
147 
5305 618 MT 5305 698 LS
148 
5305 698 MT 5503 698 LS
149 
5503 698 MT 5503 618 LS
150 
5503 618 MT 5702 618 LS
151 
5702 618 MT 5702 698 LS
152 
5702 698 MT 5900 698 LS
153 
5900 698 MT 5900 618 LS
154 
5900 618 MT 6099 618 LS
155 
6099 618 MT 6099 698 LS
156 
6099 698 MT 6297 698 LS
157 
3320 802 MT 3320 842 LS
158 
3320 842 MT 3518 842 LS
159 
3518 842 MT 3518 762 LS
160 
3518 762 MT 3717 762 LS
161 
3717 762 MT 3717 842 LS
162 
3717 842 MT 6297 842 LS
163 
3320 946 MT 3518 946 LS
164 
3518 946 MT 3518 906 LS
165 
3518 906 MT 6297 906 LS
166 
3320 1090 MT 4114 1090 LS
167 
4114 1090 MT 4114 1130 LS
168 
4114 1130 MT 6297 1130 LS
169 
3320 1234 MT 3518 1234 LS
170 
3518 1234 MT 3518 1234 LT 3525 1193 LT 4305 1193 LT 4312 1234 LT ST
171 
3518 1234 MT 3518 1234 LT 3525 1274 LT 4305 1274 LT 4312 1234 LT ST
172 
(00) 3532 1234 WT pop 0 originOffset 37 add RSS
173 
4312 1234 MT 4312 1234 LT 4319 1193 LT 4702 1193 LT 4709 1234 LT ST
174 
4312 1234 MT 4312 1234 LT 4319 1274 LT 4702 1274 LT 4709 1234 LT ST
175 
(02) 4326 1234 WT pop 0 originOffset 37 add RSS
176 
4709 1234 MT 4709 1234 LT 4716 1193 LT 6297 1193 LT ST
177 
4709 1234 MT 4709 1234 LT 4716 1274 LT 6297 1274 LT ST
178 
(03) 4723 1234 WT pop 0 originOffset 37 add RSS
179 
3320 1378 MT 3518 1378 LS
180 
3518 1378 MT 3518 1378 LT 3525 1337 LT 4305 1337 LT 4312 1378 LT ST
181 
3518 1378 MT 3518 1378 LT 3525 1418 LT 4305 1418 LT 4312 1378 LT ST
182 
(00000000) 3532 1378 WT pop 0 originOffset 37 add RSS
183 
4312 1378 MT 6297 1378 LS
184 
3320 1522 MT 3518 1522 LS
185 
3518 1522 MT 3518 1562 LS
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3518 1562 MT 6297 1562 LS
187 
3320 1666 MT 4114 1666 LS
188 
4114 1666 MT 4114 1706 LS
189 
4114 1706 MT 4312 1706 LS
190 
4312 1706 MT 4312 1666 LS
191 
4312 1666 MT 6297 1666 LS
192 
3320 1810 MT 3518 1810 LS
193 
3518 1810 MT 3518 1810 LT 3525 1769 LT 5099 1769 LT 5106 1810 LT ST
194 
3518 1810 MT 3518 1810 LT 3525 1850 LT 5099 1850 LT 5106 1810 LT ST
195 
(0) 3532 1810 WT pop 0 originOffset 37 add RSS
196 
5106 1810 MT 5106 1810 LT 5113 1769 LT 5496 1769 LT 5503 1810 LT ST
197 
5106 1810 MT 5106 1810 LT 5113 1850 LT 5496 1850 LT 5503 1810 LT ST
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(1) 5120 1810 WT pop 0 originOffset 37 add RSS
199 
5503 1810 MT 5503 1810 LT 5510 1769 LT 5893 1769 LT 5900 1810 LT ST
200 
5503 1810 MT 5503 1810 LT 5510 1850 LT 5893 1850 LT 5900 1810 LT ST
201 
(2) 5517 1810 WT pop 0 originOffset 37 add RSS
202 
5900 1810 MT 5900 1810 LT 5907 1769 LT 6297 1769 LT ST
203 
5900 1810 MT 5900 1810 LT 5907 1850 LT 6297 1850 LT ST
204 
(3) 5914 1810 WT pop 0 originOffset 37 add RSS
205 
3320 1954 MT 3518 1954 LS
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3518 1954 MT 3518 1954 LT 3525 1913 LT 5099 1913 LT 5106 1954 LT ST
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3518 1954 MT 3518 1954 LT 3525 1994 LT 5099 1994 LT 5106 1954 LT ST
208 
(0) 3532 1954 WT pop 0 originOffset 37 add RSS
209 
5106 1954 MT 5106 1954 LT 5113 1913 LT 5496 1913 LT 5503 1954 LT ST
210 
5106 1954 MT 5106 1954 LT 5113 1994 LT 5496 1994 LT 5503 1954 LT ST
211 
(1) 5120 1954 WT pop 0 originOffset 37 add RSS
212 
5503 1954 MT 5503 1954 LT 5510 1913 LT 5893 1913 LT 5900 1954 LT ST
213 
5503 1954 MT 5503 1954 LT 5510 1994 LT 5893 1994 LT 5900 1954 LT ST
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(2) 5517 1954 WT pop 0 originOffset 37 add RSS
215 
5900 1954 MT 5900 1954 LT 5907 1913 LT 6297 1913 LT ST
216 
5900 1954 MT 5900 1954 LT 5907 1994 LT 6297 1994 LT ST
217 
(3) 5914 1954 WT pop 0 originOffset 37 add RSS
218 
3320 2098 MT 3518 2098 LS
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3518 2098 MT 3518 2098 LT 3525 2057 LT 5496 2057 LT 5503 2098 LT ST
220 
3518 2098 MT 3518 2098 LT 3525 2138 LT 5496 2138 LT 5503 2098 LT ST
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(0) 3532 2098 WT pop 0 originOffset 37 add RSS
222 
5503 2098 MT 5503 2098 LT 5510 2057 LT 5893 2057 LT 5900 2098 LT ST
223 
5503 2098 MT 5503 2098 LT 5510 2138 LT 5893 2138 LT 5900 2098 LT ST
224 
(1) 5517 2098 WT pop 0 originOffset 37 add RSS
225 
5900 2098 MT 5900 2098 LT 5907 2057 LT 6297 2057 LT ST
226 
5900 2098 MT 5900 2098 LT 5907 2138 LT 6297 2138 LT ST
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(2) 5914 2098 WT pop 0 originOffset 37 add RSS
228 
3320 2242 MT 3518 2242 LS
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3518 2242 MT 3518 2242 LT 3525 2201 LT 4305 2201 LT 4312 2242 LT ST
230 
3518 2242 MT 3518 2242 LT 3525 2282 LT 4305 2282 LT 4312 2242 LT ST
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(00) 3532 2242 WT pop 0 originOffset 37 add RSS
232 
4312 2242 MT 4312 2242 LT 4319 2201 LT 4702 2201 LT 4709 2242 LT ST
233 
4312 2242 MT 4312 2242 LT 4319 2282 LT 4702 2282 LT 4709 2242 LT ST
234 
(02) 4326 2242 WT pop 0 originOffset 37 add RSS
235 
4709 2242 MT 4709 2242 LT 4716 2201 LT 6297 2201 LT ST
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4709 2242 MT 4709 2242 LT 4716 2282 LT 6297 2282 LT ST
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(03) 4723 2242 WT pop 0 originOffset 37 add RSS
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3320 2386 MT 3518 2386 LS
239 
3518 2386 MT 3518 2386 LT 3525 2345 LT 4305 2345 LT 4312 2386 LT ST
240 
3518 2386 MT 3518 2386 LT 3525 2426 LT 4305 2426 LT 4312 2386 LT ST
241 
(00000000) 3532 2386 WT pop 0 originOffset 37 add RSS
242 
4312 2386 MT 6297 2386 LS
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3320 2530 MT 3518 2530 LS
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3518 2530 MT 3518 2570 LS
245 
3518 2570 MT 6297 2570 LS
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3320 2674 MT 4114 2674 LS
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4114 2674 MT 4114 2714 LS
248 
4114 2714 MT 6297 2714 LS
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3320 2818 MT 4114 2818 LS
250 
4114 2818 MT 4114 2818 LT 4121 2777 LT 6297 2777 LT ST
251 
4114 2818 MT 4114 2818 LT 4121 2858 LT 6297 2858 LT ST
252 
(01) 4128 2818 WT pop 0 originOffset 37 add RSS
253 
3320 2962 MT 4114 2962 LS
254 
4114 2962 MT 4114 2962 LT 4121 2921 LT 6297 2921 LT ST
255 
4114 2962 MT 4114 2962 LT 4121 3002 LT 6297 3002 LT ST
256 
(00) 4128 2962 WT pop 0 originOffset 37 add RSS
257 
3320 3106 MT 6297 3106 LS
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3320 3250 MT 6297 3250 LS
259 
3320 3394 MT 4114 3394 LS
260 
4114 3394 MT 4114 3434 LS
261 
4114 3434 MT 6297 3434 LS
262 
3320 3538 MT 4114 3538 LS
263 
4114 3538 MT 4114 3578 LS
264 
4114 3578 MT 6297 3578 LS
265 
3320 3682 MT 4114 3682 LS
266 
4114 3682 MT 4114 3682 LT 4121 3641 LT 6297 3641 LT ST
267 
4114 3682 MT 4114 3682 LT 4121 3722 LT 6297 3722 LT ST
268 
(01) 4128 3682 WT pop 0 originOffset 37 add RSS
269 
3320 3826 MT 4114 3826 LS
270 
4114 3826 MT 4114 3826 LT 4121 3785 LT 6297 3785 LT ST
271 
4114 3826 MT 4114 3826 LT 4121 3866 LT 6297 3866 LT ST
272 
(00) 4128 3826 WT pop 0 originOffset 37 add RSS
273 
3320 3970 MT 6297 3970 LS
274 
3320 4114 MT 6297 4114 LS
275 
3320 4258 MT 4114 4258 LS
276 
4114 4258 MT 4114 4298 LS
277 
4114 4298 MT 6297 4298 LS
278 
3320 4402 MT 4114 4402 LS
279 
4114 4402 MT 4114 4442 LS
280 
4114 4442 MT 6297 4442 LS
281 
% draw timeline
282 
3360 4533 MT 3360 4570 LS
283 
3399 4533 MT 3399 4570 LS
284 
3439 4533 MT 3439 4570 LS
285 
3479 4533 MT 3479 4570 LS
286 
3519 4533 MT 3519 4570 LS
287 
3558 4533 MT 3558 4570 LS
288 
3598 4533 MT 3598 4570 LS
289 
3638 4533 MT 3638 4570 LS
290 
3677 4533 MT 3677 4570 LS
291 
(0) 3320 4649 WT TS RSS
292 
3757 4533 MT 3757 4570 LS
293 
3796 4533 MT 3796 4570 LS
294 
3836 4533 MT 3836 4570 LS
295 
3876 4533 MT 3876 4570 LS
296 
3916 4533 MT 3916 4570 LS
297 
3955 4533 MT 3955 4570 LS
298 
3995 4533 MT 3995 4570 LS
299 
4035 4533 MT 4035 4570 LS
300 
4074 4533 MT 4074 4570 LS
301 
3717 4506 MT 3717 4570 LS
302 
4154 4533 MT 4154 4570 LS
303 
4193 4533 MT 4193 4570 LS
304 
4233 4533 MT 4233 4570 LS
305 
4273 4533 MT 4273 4570 LS
306 
4313 4533 MT 4313 4570 LS
307 
4352 4533 MT 4352 4570 LS
308 
4392 4533 MT 4392 4570 LS
309 
4432 4533 MT 4432 4570 LS
310 
4471 4533 MT 4471 4570 LS
311 
4114 4506 MT 4114 4570 LS
312 
(20) 4114 4649 WT TS RSS
313 
4551 4533 MT 4551 4570 LS
314 
4590 4533 MT 4590 4570 LS
315 
4630 4533 MT 4630 4570 LS
316 
4670 4533 MT 4670 4570 LS
317 
4710 4533 MT 4710 4570 LS
318 
4749 4533 MT 4749 4570 LS
319 
4789 4533 MT 4789 4570 LS
320 
4829 4533 MT 4829 4570 LS
321 
4868 4533 MT 4868 4570 LS
322 
4511 4506 MT 4511 4570 LS
323 
4948 4533 MT 4948 4570 LS
324 
4987 4533 MT 4987 4570 LS
325 
5027 4533 MT 5027 4570 LS
326 
5067 4533 MT 5067 4570 LS
327 
5107 4533 MT 5107 4570 LS
328 
5146 4533 MT 5146 4570 LS
329 
5186 4533 MT 5186 4570 LS
330 
5226 4533 MT 5226 4570 LS
331 
5265 4533 MT 5265 4570 LS
332 
4908 4506 MT 4908 4570 LS
333 
(40) 4908 4649 WT TS RSS
334 
5345 4533 MT 5345 4570 LS
335 
5384 4533 MT 5384 4570 LS
336 
5424 4533 MT 5424 4570 LS
337 
5464 4533 MT 5464 4570 LS
338 
5504 4533 MT 5504 4570 LS
339 
5543 4533 MT 5543 4570 LS
340 
5583 4533 MT 5583 4570 LS
341 
5623 4533 MT 5623 4570 LS
342 
5662 4533 MT 5662 4570 LS
343 
5305 4506 MT 5305 4570 LS
344 
5742 4533 MT 5742 4570 LS
345 
5781 4533 MT 5781 4570 LS
346 
5821 4533 MT 5821 4570 LS
347 
5861 4533 MT 5861 4570 LS
348 
5901 4533 MT 5901 4570 LS
349 
5940 4533 MT 5940 4570 LS
350 
5980 4533 MT 5980 4570 LS
351 
6020 4533 MT 6020 4570 LS
352 
6059 4533 MT 6059 4570 LS
353 
5702 4506 MT 5702 4570 LS
354 
(60) 5702 4649 WT TS RSS
355 
6139 4533 MT 6139 4570 LS
356 
6178 4533 MT 6178 4570 LS
357 
6218 4533 MT 6218 4570 LS
358 
6258 4533 MT 6258 4570 LS
359 
6298 4533 MT 6298 4570 LS
360 
6337 4533 MT 6337 4570 LS
361 
6377 4533 MT 6377 4570 LS
362 
6417 4533 MT 6417 4570 LS
363 
6456 4533 MT 6456 4570 LS
364 
6099 4506 MT 6099 4570 LS
365 
% draw grid
366 
3717 300 MT 3717 4506 LS
367 
4114 300 MT 4114 4506 LS
368 
4511 300 MT 4511 4506 LS
369 
4908 300 MT 4908 4506 LS
370 
5305 300 MT 5305 4506 LS
371 
5702 300 MT 5702 4506 LS
372 
6099 300 MT 6099 4506 LS
373 
% draw waveforms
374 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dw) 3283 409 WT TSE RSS
375 
3710 300 MT 3724 300 LS
376 
4107 300 MT 4121 300 LS
377 
4504 300 MT 4518 300 LS
378 
4901 300 MT 4915 300 LS
379 
5298 300 MT 5312 300 LS
380 
5695 300 MT 5709 300 LS
381 
6092 300 MT 6106 300 LS
382 
3320 329 MT 3320 329 LT 6297 329 LT ST
383 
3320 410 MT 3320 410 LT 6297 410 LT ST
384 
(00000020) 3334 370 WT pop 0 originOffset 37 add RSS
385 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/aw) 3283 553 WT TSE RSS
386 
3710 444 MT 3724 444 LS
387 
4107 444 MT 4121 444 LS
388 
4504 444 MT 4518 444 LS
389 
4901 444 MT 4915 444 LS
390 
5298 444 MT 5312 444 LS
391 
5695 444 MT 5709 444 LS
392 
6092 444 MT 6106 444 LS
393 
3320 473 MT 3320 473 LT 6297 473 LT ST
394 
3320 554 MT 3320 554 LT 6297 554 LT ST
395 
(00000005) 3334 514 WT pop 0 originOffset 37 add RSS
396 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/clk) 3283 697 WT TSE RSS
397 
3710 588 MT 3724 588 LS
398 
4107 588 MT 4121 588 LS
399 
4504 588 MT 4518 588 LS
400 
4901 588 MT 4915 588 LS
401 
5298 588 MT 5312 588 LS
402 
5695 588 MT 5709 588 LS
403 
6092 588 MT 6106 588 LS
404 
3320 658 MT 3320 698 LS
405 
3320 698 MT 3518 698 LS
406 
3518 698 MT 3518 618 LS
407 
3518 618 MT 3717 618 LS
408 
3717 618 MT 3717 698 LS
409 
3717 698 MT 3915 698 LS
410 
3915 698 MT 3915 618 LS
411 
3915 618 MT 4114 618 LS
412 
4114 618 MT 4114 698 LS
413 
4114 698 MT 4312 698 LS
414 
4312 698 MT 4312 618 LS
415 
4312 618 MT 4511 618 LS
416 
4511 618 MT 4511 698 LS
417 
4511 698 MT 4709 698 LS
418 
4709 698 MT 4709 618 LS
419 
4709 618 MT 4908 618 LS
420 
4908 618 MT 4908 698 LS
421 
4908 698 MT 5106 698 LS
422 
5106 698 MT 5106 618 LS
423 
5106 618 MT 5305 618 LS
424 
5305 618 MT 5305 698 LS
425 
5305 698 MT 5503 698 LS
426 
5503 698 MT 5503 618 LS
427 
5503 618 MT 5702 618 LS
428 
5702 618 MT 5702 698 LS
429 
5702 698 MT 5900 698 LS
430 
5900 698 MT 5900 618 LS
431 
5900 618 MT 6099 618 LS
432 
6099 618 MT 6099 698 LS
433 
6099 698 MT 6297 698 LS
434 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rst) 3283 841 WT TSE RSS
435 
3710 732 MT 3724 732 LS
436 
4107 732 MT 4121 732 LS
437 
4504 732 MT 4518 732 LS
438 
4901 732 MT 4915 732 LS
439 
5298 732 MT 5312 732 LS
440 
5695 732 MT 5709 732 LS
441 
6092 732 MT 6106 732 LS
442 
3320 802 MT 3320 842 LS
443 
3320 842 MT 3518 842 LS
444 
3518 842 MT 3518 762 LS
445 
3518 762 MT 3717 762 LS
446 
3717 762 MT 3717 842 LS
447 
3717 842 MT 6297 842 LS
448 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/supv) 3283 985 WT TSE RSS
449 
3710 876 MT 3724 876 LS
450 
4107 876 MT 4121 876 LS
451 
4504 876 MT 4518 876 LS
452 
4901 876 MT 4915 876 LS
453 
5298 876 MT 5312 876 LS
454 
5695 876 MT 5709 876 LS
455 
6092 876 MT 6106 876 LS
456 
3320 946 MT 3518 946 LS
457 
3518 946 MT 3518 906 LS
458 
3518 906 MT 6297 906 LS
459 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/wb_freeze) 3283 1129 WT TSE RSS
460 
3710 1020 MT 3724 1020 LS
461 
4107 1020 MT 4121 1020 LS
462 
4504 1020 MT 4518 1020 LS
463 
4901 1020 MT 4915 1020 LS
464 
5298 1020 MT 5312 1020 LS
465 
5695 1020 MT 5709 1020 LS
466 
6092 1020 MT 6106 1020 LS
467 
3320 1090 MT 4114 1090 LS
468 
4114 1090 MT 4114 1130 LS
469 
4114 1130 MT 6297 1130 LS
470 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw) 3283 1273 WT TSE RSS
471 
3710 1164 MT 3724 1164 LS
472 
4107 1164 MT 4121 1164 LS
473 
4504 1164 MT 4518 1164 LS
474 
4901 1164 MT 4915 1164 LS
475 
5298 1164 MT 5312 1164 LS
476 
5695 1164 MT 5709 1164 LS
477 
6092 1164 MT 6106 1164 LS
478 
3320 1234 MT 3518 1234 LS
479 
3518 1234 MT 3518 1234 LT 3525 1193 LT 4305 1193 LT 4312 1234 LT ST
480 
3518 1234 MT 3518 1234 LT 3525 1274 LT 4305 1274 LT 4312 1234 LT ST
481 
(00) 3532 1234 WT pop 0 originOffset 37 add RSS
482 
4312 1234 MT 4312 1234 LT 4319 1193 LT 4702 1193 LT 4709 1234 LT ST
483 
4312 1234 MT 4312 1234 LT 4319 1274 LT 4702 1274 LT 4709 1234 LT ST
484 
(02) 4326 1234 WT pop 0 originOffset 37 add RSS
485 
4709 1234 MT 4709 1234 LT 4716 1193 LT 6297 1193 LT ST
486 
4709 1234 MT 4709 1234 LT 4716 1274 LT 6297 1274 LT ST
487 
(03) 4723 1234 WT pop 0 originOffset 37 add RSS
488 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw) 3283 1417 WT TSE RSS
489 
3710 1308 MT 3724 1308 LS
490 
4107 1308 MT 4121 1308 LS
491 
4504 1308 MT 4518 1308 LS
492 
4901 1308 MT 4915 1308 LS
493 
5298 1308 MT 5312 1308 LS
494 
5695 1308 MT 5709 1308 LS
495 
6092 1308 MT 6106 1308 LS
496 
3320 1378 MT 3518 1378 LS
497 
3518 1378 MT 3518 1378 LT 3525 1337 LT 4305 1337 LT 4312 1378 LT ST
498 
3518 1378 MT 3518 1378 LT 3525 1418 LT 4305 1418 LT 4312 1378 LT ST
499 
(00000000) 3532 1378 WT pop 0 originOffset 37 add RSS
500 
4312 1378 MT 6297 1378 LS
501 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we) 3283 1561 WT TSE RSS
502 
3710 1452 MT 3724 1452 LS
503 
4107 1452 MT 4121 1452 LS
504 
4504 1452 MT 4518 1452 LS
505 
4901 1452 MT 4915 1452 LS
506 
5298 1452 MT 5312 1452 LS
507 
5695 1452 MT 5709 1452 LS
508 
6092 1452 MT 6106 1452 LS
509 
3320 1522 MT 3518 1522 LS
510 
3518 1522 MT 3518 1562 LS
511 
3518 1562 MT 6297 1562 LS
512 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/flushpipe) 3283 1705 WT TSE RSS
513 
3710 1596 MT 3724 1596 LS
514 
4107 1596 MT 4121 1596 LS
515 
4504 1596 MT 4518 1596 LS
516 
4901 1596 MT 4915 1596 LS
517 
5298 1596 MT 5312 1596 LS
518 
5695 1596 MT 5709 1596 LS
519 
6092 1596 MT 6106 1596 LS
520 
3320 1666 MT 4114 1666 LS
521 
4114 1666 MT 4114 1706 LS
522 
4114 1706 MT 4312 1706 LS
523 
4312 1706 MT 4312 1666 LS
524 
4312 1666 MT 6297 1666 LS
525 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_read) 3283 1849 WT TSE RSS
526 
3710 1740 MT 3724 1740 LS
527 
4107 1740 MT 4121 1740 LS
528 
4504 1740 MT 4518 1740 LS
529 
4901 1740 MT 4915 1740 LS
530 
5298 1740 MT 5312 1740 LS
531 
5695 1740 MT 5709 1740 LS
532 
6092 1740 MT 6106 1740 LS
533 
3320 1810 MT 3518 1810 LS
534 
3518 1810 MT 3518 1810 LT 3525 1769 LT 5099 1769 LT 5106 1810 LT ST
535 
3518 1810 MT 3518 1810 LT 3525 1850 LT 5099 1850 LT 5106 1810 LT ST
536 
(0) 3532 1810 WT pop 0 originOffset 37 add RSS
537 
5106 1810 MT 5106 1810 LT 5113 1769 LT 5496 1769 LT 5503 1810 LT ST
538 
5106 1810 MT 5106 1810 LT 5113 1850 LT 5496 1850 LT 5503 1810 LT ST
539 
(1) 5120 1810 WT pop 0 originOffset 37 add RSS
540 
5503 1810 MT 5503 1810 LT 5510 1769 LT 5893 1769 LT 5900 1810 LT ST
541 
5503 1810 MT 5503 1810 LT 5510 1850 LT 5893 1850 LT 5900 1810 LT ST
542 
(2) 5517 1810 WT pop 0 originOffset 37 add RSS
543 
5900 1810 MT 5900 1810 LT 5907 1769 LT 6297 1769 LT ST
544 
5900 1810 MT 5900 1810 LT 5907 1850 LT 6297 1850 LT ST
545 
(3) 5914 1810 WT pop 0 originOffset 37 add RSS
546 
(...0_cpu/or1200_cpu/or1200_rf_top/current_thread_read_out) 3283 1993 WT TSE RSS
547 
3710 1884 MT 3724 1884 LS
548 
4107 1884 MT 4121 1884 LS
549 
4504 1884 MT 4518 1884 LS
550 
4901 1884 MT 4915 1884 LS
551 
5298 1884 MT 5312 1884 LS
552 
5695 1884 MT 5709 1884 LS
553 
6092 1884 MT 6106 1884 LS
554 
3320 1954 MT 3518 1954 LS
555 
3518 1954 MT 3518 1954 LT 3525 1913 LT 5099 1913 LT 5106 1954 LT ST
556 
3518 1954 MT 3518 1954 LT 3525 1994 LT 5099 1994 LT 5106 1954 LT ST
557 
(0) 3532 1954 WT pop 0 originOffset 37 add RSS
558 
5106 1954 MT 5106 1954 LT 5113 1913 LT 5496 1913 LT 5503 1954 LT ST
559 
5106 1954 MT 5106 1954 LT 5113 1994 LT 5496 1994 LT 5503 1954 LT ST
560 
(1) 5120 1954 WT pop 0 originOffset 37 add RSS
561 
5503 1954 MT 5503 1954 LT 5510 1913 LT 5893 1913 LT 5900 1954 LT ST
562 
5503 1954 MT 5503 1954 LT 5510 1994 LT 5893 1994 LT 5900 1954 LT ST
563 
(2) 5517 1954 WT pop 0 originOffset 37 add RSS
564 
5900 1954 MT 5900 1954 LT 5907 1913 LT 6297 1913 LT ST
565 
5900 1954 MT 5900 1954 LT 5907 1994 LT 6297 1994 LT ST
566 
(3) 5914 1954 WT pop 0 originOffset 37 add RSS
567 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_write) 3283 2137 WT TSE RSS
568 
3710 2028 MT 3724 2028 LS
569 
4107 2028 MT 4121 2028 LS
570 
4504 2028 MT 4518 2028 LS
571 
4901 2028 MT 4915 2028 LS
572 
5298 2028 MT 5312 2028 LS
573 
5695 2028 MT 5709 2028 LS
574 
6092 2028 MT 6106 2028 LS
575 
3320 2098 MT 3518 2098 LS
576 
3518 2098 MT 3518 2098 LT 3525 2057 LT 5496 2057 LT 5503 2098 LT ST
577 
3518 2098 MT 3518 2098 LT 3525 2138 LT 5496 2138 LT 5503 2098 LT ST
578 
(0) 3532 2098 WT pop 0 originOffset 37 add RSS
579 
5503 2098 MT 5503 2098 LT 5510 2057 LT 5893 2057 LT 5900 2098 LT ST
580 
5503 2098 MT 5503 2098 LT 5510 2138 LT 5893 2138 LT 5900 2098 LT ST
581 
(1) 5517 2098 WT pop 0 originOffset 37 add RSS
582 
5900 2098 MT 5900 2098 LT 5907 2057 LT 6297 2057 LT ST
583 
5900 2098 MT 5900 2098 LT 5907 2138 LT 6297 2138 LT ST
584 
(2) 5914 2098 WT pop 0 originOffset 37 add RSS
585 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw2) 3283 2281 WT TSE RSS
586 
3710 2172 MT 3724 2172 LS
587 
4107 2172 MT 4121 2172 LS
588 
4504 2172 MT 4518 2172 LS
589 
4901 2172 MT 4915 2172 LS
590 
5298 2172 MT 5312 2172 LS
591 
5695 2172 MT 5709 2172 LS
592 
6092 2172 MT 6106 2172 LS
593 
3320 2242 MT 3518 2242 LS
594 
3518 2242 MT 3518 2242 LT 3525 2201 LT 4305 2201 LT 4312 2242 LT ST
595 
3518 2242 MT 3518 2242 LT 3525 2282 LT 4305 2282 LT 4312 2242 LT ST
596 
(00) 3532 2242 WT pop 0 originOffset 37 add RSS
597 
4312 2242 MT 4312 2242 LT 4319 2201 LT 4702 2201 LT 4709 2242 LT ST
598 
4312 2242 MT 4312 2242 LT 4319 2282 LT 4702 2282 LT 4709 2242 LT ST
599 
(02) 4326 2242 WT pop 0 originOffset 37 add RSS
600 
4709 2242 MT 4709 2242 LT 4716 2201 LT 6297 2201 LT ST
601 
4709 2242 MT 4709 2242 LT 4716 2282 LT 6297 2282 LT ST
602 
(03) 4723 2242 WT pop 0 originOffset 37 add RSS
603 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw2) 3283 2425 WT TSE RSS
604 
3710 2316 MT 3724 2316 LS
605 
4107 2316 MT 4121 2316 LS
606 
4504 2316 MT 4518 2316 LS
607 
4901 2316 MT 4915 2316 LS
608 
5298 2316 MT 5312 2316 LS
609 
5695 2316 MT 5709 2316 LS
610 
6092 2316 MT 6106 2316 LS
611 
3320 2386 MT 3518 2386 LS
612 
3518 2386 MT 3518 2386 LT 3525 2345 LT 4305 2345 LT 4312 2386 LT ST
613 
3518 2386 MT 3518 2386 LT 3525 2426 LT 4305 2426 LT 4312 2386 LT ST
614 
(00000000) 3532 2386 WT pop 0 originOffset 37 add RSS
615 
4312 2386 MT 6297 2386 LS
616 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2) 3283 2569 WT TSE RSS
617 
3710 2460 MT 3724 2460 LS
618 
4107 2460 MT 4121 2460 LS
619 
4504 2460 MT 4518 2460 LS
620 
4901 2460 MT 4915 2460 LS
621 
5298 2460 MT 5312 2460 LS
622 
5695 2460 MT 5709 2460 LS
623 
6092 2460 MT 6106 2460 LS
624 
3320 2530 MT 3518 2530 LS
625 
3518 2530 MT 3518 2570 LS
626 
3518 2570 MT 6297 2570 LS
627 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/id_freeze) 3283 2713 WT TSE RSS
628 
3710 2604 MT 3724 2604 LS
629 
4107 2604 MT 4121 2604 LS
630 
4504 2604 MT 4518 2604 LS
631 
4901 2604 MT 4915 2604 LS
632 
5298 2604 MT 5312 2604 LS
633 
5695 2604 MT 5709 2604 LS
634 
6092 2604 MT 6106 2604 LS
635 
3320 2674 MT 4114 2674 LS
636 
4114 2674 MT 4114 2714 LS
637 
4114 2714 MT 6297 2714 LS
638 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra) 3283 2857 WT TSE RSS
639 
3710 2748 MT 3724 2748 LS
640 
4107 2748 MT 4121 2748 LS
641 
4504 2748 MT 4518 2748 LS
642 
4901 2748 MT 4915 2748 LS
643 
5298 2748 MT 5312 2748 LS
644 
5695 2748 MT 5709 2748 LS
645 
6092 2748 MT 6106 2748 LS
646 
3320 2818 MT 4114 2818 LS
647 
4114 2818 MT 4114 2818 LT 4121 2777 LT 6297 2777 LT ST
648 
4114 2818 MT 4114 2818 LT 4121 2858 LT 6297 2858 LT ST
649 
(01) 4128 2818 WT pop 0 originOffset 37 add RSS
650 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb) 3283 3001 WT TSE RSS
651 
3710 2892 MT 3724 2892 LS
652 
4107 2892 MT 4121 2892 LS
653 
4504 2892 MT 4518 2892 LS
654 
4901 2892 MT 4915 2892 LS
655 
5298 2892 MT 5312 2892 LS
656 
5695 2892 MT 5709 2892 LS
657 
6092 2892 MT 6106 2892 LS
658 
3320 2962 MT 4114 2962 LS
659 
4114 2962 MT 4114 2962 LT 4121 2921 LT 6297 2921 LT ST
660 
4114 2962 MT 4114 2962 LT 4121 3002 LT 6297 3002 LT ST
661 
(00) 4128 2962 WT pop 0 originOffset 37 add RSS
662 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa) 3283 3145 WT TSE RSS
663 
3710 3036 MT 3724 3036 LS
664 
4107 3036 MT 4121 3036 LS
665 
4504 3036 MT 4518 3036 LS
666 
4901 3036 MT 4915 3036 LS
667 
5298 3036 MT 5312 3036 LS
668 
5695 3036 MT 5709 3036 LS
669 
6092 3036 MT 6106 3036 LS
670 
3320 3106 MT 6297 3106 LS
671 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab) 3283 3289 WT TSE RSS
672 
3710 3180 MT 3724 3180 LS
673 
4107 3180 MT 4121 3180 LS
674 
4504 3180 MT 4518 3180 LS
675 
4901 3180 MT 4915 3180 LS
676 
5298 3180 MT 5312 3180 LS
677 
5695 3180 MT 5709 3180 LS
678 
6092 3180 MT 6106 3180 LS
679 
3320 3250 MT 6297 3250 LS
680 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda) 3283 3433 WT TSE RSS
681 
3710 3324 MT 3724 3324 LS
682 
4107 3324 MT 4121 3324 LS
683 
4504 3324 MT 4518 3324 LS
684 
4901 3324 MT 4915 3324 LS
685 
5298 3324 MT 5312 3324 LS
686 
5695 3324 MT 5709 3324 LS
687 
6092 3324 MT 6106 3324 LS
688 
3320 3394 MT 4114 3394 LS
689 
4114 3394 MT 4114 3434 LS
690 
4114 3434 MT 6297 3434 LS
691 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb) 3283 3577 WT TSE RSS
692 
3710 3468 MT 3724 3468 LS
693 
4107 3468 MT 4121 3468 LS
694 
4504 3468 MT 4518 3468 LS
695 
4901 3468 MT 4915 3468 LS
696 
5298 3468 MT 5312 3468 LS
697 
5695 3468 MT 5709 3468 LS
698 
6092 3468 MT 6106 3468 LS
699 
3320 3538 MT 4114 3538 LS
700 
4114 3538 MT 4114 3578 LS
701 
4114 3578 MT 6297 3578 LS
702 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra2) 3283 3721 WT TSE RSS
703 
3710 3612 MT 3724 3612 LS
704 
4107 3612 MT 4121 3612 LS
705 
4504 3612 MT 4518 3612 LS
706 
4901 3612 MT 4915 3612 LS
707 
5298 3612 MT 5312 3612 LS
708 
5695 3612 MT 5709 3612 LS
709 
6092 3612 MT 6106 3612 LS
710 
3320 3682 MT 4114 3682 LS
711 
4114 3682 MT 4114 3682 LT 4121 3641 LT 6297 3641 LT ST
712 
4114 3682 MT 4114 3682 LT 4121 3722 LT 6297 3722 LT ST
713 
(01) 4128 3682 WT pop 0 originOffset 37 add RSS
714 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb2) 3283 3865 WT TSE RSS
715 
3710 3756 MT 3724 3756 LS
716 
4107 3756 MT 4121 3756 LS
717 
4504 3756 MT 4518 3756 LS
718 
4901 3756 MT 4915 3756 LS
719 
5298 3756 MT 5312 3756 LS
720 
5695 3756 MT 5709 3756 LS
721 
6092 3756 MT 6106 3756 LS
722 
3320 3826 MT 4114 3826 LS
723 
4114 3826 MT 4114 3826 LT 4121 3785 LT 6297 3785 LT ST
724 
4114 3826 MT 4114 3826 LT 4121 3866 LT 6297 3866 LT ST
725 
(00) 4128 3826 WT pop 0 originOffset 37 add RSS
726 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2) 3283 4009 WT TSE RSS
727 
3710 3900 MT 3724 3900 LS
728 
4107 3900 MT 4121 3900 LS
729 
4504 3900 MT 4518 3900 LS
730 
4901 3900 MT 4915 3900 LS
731 
5298 3900 MT 5312 3900 LS
732 
5695 3900 MT 5709 3900 LS
733 
6092 3900 MT 6106 3900 LS
734 
3320 3970 MT 6297 3970 LS
735 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2) 3283 4153 WT TSE RSS
736 
3710 4044 MT 3724 4044 LS
737 
4107 4044 MT 4121 4044 LS
738 
4504 4044 MT 4518 4044 LS
739 
4901 4044 MT 4915 4044 LS
740 
5298 4044 MT 5312 4044 LS
741 
5695 4044 MT 5709 4044 LS
742 
6092 4044 MT 6106 4044 LS
743 
3320 4114 MT 6297 4114 LS
744 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda2) 3283 4297 WT TSE RSS
745 
3710 4188 MT 3724 4188 LS
746 
4107 4188 MT 4121 4188 LS
747 
4504 4188 MT 4518 4188 LS
748 
4901 4188 MT 4915 4188 LS
749 
5298 4188 MT 5312 4188 LS
750 
5695 4188 MT 5709 4188 LS
751 
6092 4188 MT 6106 4188 LS
752 
3320 4258 MT 4114 4258 LS
753 
4114 4258 MT 4114 4298 LS
754 
4114 4298 MT 6297 4298 LS
755 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb2) 3283 4441 WT TSE RSS
756 
3710 4332 MT 3724 4332 LS
757 
4107 4332 MT 4121 4332 LS
758 
4504 4332 MT 4518 4332 LS
759 
4901 4332 MT 4915 4332 LS
760 
5298 4332 MT 5312 4332 LS
761 
5695 4332 MT 5709 4332 LS
762 
6092 4332 MT 6106 4332 LS
763 
3320 4402 MT 4114 4402 LS
764 
4114 4402 MT 4114 4442 LS
765 
4114 4442 MT 6297 4442 LS
766 
% draw footer
767 
(Entity:tb_or1200_cpu  Architecture:  Date: Sat Aug 14 01:25:01 EDT 2004   Row: 1 Page: 1) 300 4799 WT TSW RSS
768 
grestore
769 
showpage
770 
%%Page: 2 2
771 
gsave
772 
90 rotate 0.12 dup neg scale
773 
% dump string table
774 
/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
775 
/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
776 
/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
777 
/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
778 
/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
779 
/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
780 
/ARC {5 -2 roll SX 5 2 roll arc} def
781 
/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3320 def/REdge 5699 def/LabelWidth 3283 def
782 
/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
783 
/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
784 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dw) MLW
785 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/aw) MLW
786 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/clk) MLW
787 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rst) MLW
788 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/supv) MLW
789 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/wb_freeze) MLW
790 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw) MLW
791 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw) MLW
792 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we) MLW
793 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/flushpipe) MLW
794 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_read) MLW
795 
(...0_cpu/or1200_cpu/or1200_rf_top/current_thread_read_out) MLW
796 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_write) MLW
797 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw2) MLW
798 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw2) MLW
799 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2) MLW
800 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/id_freeze) MLW
801 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra) MLW
802 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb) MLW
803 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa) MLW
804 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab) MLW
805 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda) MLW
806 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb) MLW
807 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra2) MLW
808 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb2) MLW
809 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2) MLW
810 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2) MLW
811 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda2) MLW
812 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb2) MLW
813 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_cs) MLW
814 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_write) MLW
815 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_addr) MLW
816 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_i) MLW
817 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o) MLW
818 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_1) MLW
819 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_2) MLW
820 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_3) MLW
821 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_4) MLW
822 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_5) MLW
823 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_6) MLW
824 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_7) MLW
825 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_8) MLW
826 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_1) MLW
827 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_2) MLW
828 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_3) MLW
829 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_4) MLW
830 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_5) MLW
831 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_6) MLW
832 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_7) MLW
833 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_8) MLW
834 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_1) MLW
835 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_2) MLW
836 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_3) MLW
837 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_4) MLW
838 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_5) MLW
839 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_6) MLW
840 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_7) MLW
841 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_8) MLW
842 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_1) MLW
843 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_2) MLW
844 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_3) MLW
845 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_4) MLW
846 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_5) MLW
847 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_6) MLW
848 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_7) MLW
849 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_8) MLW
850 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_1) MLW
851 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_2) MLW
852 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_3) MLW
853 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_4) MLW
854 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_5) MLW
855 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_6) MLW
856 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_7) MLW
857 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_8) MLW
858 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_1) MLW
859 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_2) MLW
860 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_3) MLW
861 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_4) MLW
862 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_5) MLW
863 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_6) MLW
864 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_7) MLW
865 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_8) MLW
866 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_1) MLW
867 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_2) MLW
868 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_3) MLW
869 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_4) MLW
870 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_5) MLW
871 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_6) MLW
872 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_7) MLW
873 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_8) MLW
874 
% draw waveform shading
875 
[] 0 SD
876 
2.995 setlinewidth
877 
 
878 
 
879 
 
880 
3320 370 MT 3518 370 LS
881 
3518 370 MT 3518 410 LS
882 
3518 410 MT 6297 410 LS
883 
3320 514 MT 6297 514 LS
884 
3320 658 MT 6297 658 LS
885 
3320 802 MT 6297 802 LS
886 
3320 946 MT 6297 946 LS
887 
3320 1090 MT 6297 1090 LS
888 
3320 1234 MT 6297 1234 LS
889 
3320 1378 MT 6297 1378 LS
890 
% draw timeline
891 
3360 4533 MT 3360 4570 LS
892 
3399 4533 MT 3399 4570 LS
893 
3439 4533 MT 3439 4570 LS
894 
3479 4533 MT 3479 4570 LS
895 
3519 4533 MT 3519 4570 LS
896 
3558 4533 MT 3558 4570 LS
897 
3598 4533 MT 3598 4570 LS
898 
3638 4533 MT 3638 4570 LS
899 
3677 4533 MT 3677 4570 LS
900 
(0) 3320 4649 WT TS RSS
901 
3757 4533 MT 3757 4570 LS
902 
3796 4533 MT 3796 4570 LS
903 
3836 4533 MT 3836 4570 LS
904 
3876 4533 MT 3876 4570 LS
905 
3916 4533 MT 3916 4570 LS
906 
3955 4533 MT 3955 4570 LS
907 
3995 4533 MT 3995 4570 LS
908 
4035 4533 MT 4035 4570 LS
909 
4074 4533 MT 4074 4570 LS
910 
3717 4506 MT 3717 4570 LS
911 
4154 4533 MT 4154 4570 LS
912 
4193 4533 MT 4193 4570 LS
913 
4233 4533 MT 4233 4570 LS
914 
4273 4533 MT 4273 4570 LS
915 
4313 4533 MT 4313 4570 LS
916 
4352 4533 MT 4352 4570 LS
917 
4392 4533 MT 4392 4570 LS
918 
4432 4533 MT 4432 4570 LS
919 
4471 4533 MT 4471 4570 LS
920 
4114 4506 MT 4114 4570 LS
921 
(20) 4114 4649 WT TS RSS
922 
4551 4533 MT 4551 4570 LS
923 
4590 4533 MT 4590 4570 LS
924 
4630 4533 MT 4630 4570 LS
925 
4670 4533 MT 4670 4570 LS
926 
4710 4533 MT 4710 4570 LS
927 
4749 4533 MT 4749 4570 LS
928 
4789 4533 MT 4789 4570 LS
929 
4829 4533 MT 4829 4570 LS
930 
4868 4533 MT 4868 4570 LS
931 
4511 4506 MT 4511 4570 LS
932 
4948 4533 MT 4948 4570 LS
933 
4987 4533 MT 4987 4570 LS
934 
5027 4533 MT 5027 4570 LS
935 
5067 4533 MT 5067 4570 LS
936 
5107 4533 MT 5107 4570 LS
937 
5146 4533 MT 5146 4570 LS
938 
5186 4533 MT 5186 4570 LS
939 
5226 4533 MT 5226 4570 LS
940 
5265 4533 MT 5265 4570 LS
941 
4908 4506 MT 4908 4570 LS
942 
(40) 4908 4649 WT TS RSS
943 
5345 4533 MT 5345 4570 LS
944 
5384 4533 MT 5384 4570 LS
945 
5424 4533 MT 5424 4570 LS
946 
5464 4533 MT 5464 4570 LS
947 
5504 4533 MT 5504 4570 LS
948 
5543 4533 MT 5543 4570 LS
949 
5583 4533 MT 5583 4570 LS
950 
5623 4533 MT 5623 4570 LS
951 
5662 4533 MT 5662 4570 LS
952 
5305 4506 MT 5305 4570 LS
953 
5742 4533 MT 5742 4570 LS
954 
5781 4533 MT 5781 4570 LS
955 
5821 4533 MT 5821 4570 LS
956 
5861 4533 MT 5861 4570 LS
957 
5901 4533 MT 5901 4570 LS
958 
5940 4533 MT 5940 4570 LS
959 
5980 4533 MT 5980 4570 LS
960 
6020 4533 MT 6020 4570 LS
961 
6059 4533 MT 6059 4570 LS
962 
5702 4506 MT 5702 4570 LS
963 
(60) 5702 4649 WT TS RSS
964 
6139 4533 MT 6139 4570 LS
965 
6178 4533 MT 6178 4570 LS
966 
6218 4533 MT 6218 4570 LS
967 
6258 4533 MT 6258 4570 LS
968 
6298 4533 MT 6298 4570 LS
969 
6337 4533 MT 6337 4570 LS
970 
6377 4533 MT 6377 4570 LS
971 
6417 4533 MT 6417 4570 LS
972 
6456 4533 MT 6456 4570 LS
973 
6099 4506 MT 6099 4570 LS
974 
% draw grid
975 
3717 300 MT 3717 4506 LS
976 
4114 300 MT 4114 4506 LS
977 
4511 300 MT 4511 4506 LS
978 
4908 300 MT 4908 4506 LS
979 
5305 300 MT 5305 4506 LS
980 
5702 300 MT 5702 4506 LS
981 
6099 300 MT 6099 4506 LS
982 
% draw waveforms
983 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_cs) 3283 409 WT TSE RSS
984 
3710 300 MT 3724 300 LS
985 
4107 300 MT 4121 300 LS
986 
4504 300 MT 4518 300 LS
987 
4901 300 MT 4915 300 LS
988 
5298 300 MT 5312 300 LS
989 
5695 300 MT 5709 300 LS
990 
6092 300 MT 6106 300 LS
991 
3320 370 MT 3518 370 LS
992 
3518 370 MT 3518 410 LS
993 
3518 410 MT 6297 410 LS
994 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_write) 3283 553 WT TSE RSS
995 
3710 444 MT 3724 444 LS
996 
4107 444 MT 4121 444 LS
997 
4504 444 MT 4518 444 LS
998 
4901 444 MT 4915 444 LS
999 
5298 444 MT 5312 444 LS
1000 
5695 444 MT 5709 444 LS
1001 
6092 444 MT 6106 444 LS
1002 
3320 514 MT 6297 514 LS
1003 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_addr) 3283 697 WT TSE RSS
1004 
3710 588 MT 3724 588 LS
1005 
4107 588 MT 4121 588 LS
1006 
4504 588 MT 4518 588 LS
1007 
4901 588 MT 4915 588 LS
1008 
5298 588 MT 5312 588 LS
1009 
5695 588 MT 5709 588 LS
1010 
6092 588 MT 6106 588 LS
1011 
3320 658 MT 6297 658 LS
1012 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_i) 3283 841 WT TSE RSS
1013 
3710 732 MT 3724 732 LS
1014 
4107 732 MT 4121 732 LS
1015 
4504 732 MT 4518 732 LS
1016 
4901 732 MT 4915 732 LS
1017 
5298 732 MT 5312 732 LS
1018 
5695 732 MT 5709 732 LS
1019 
6092 732 MT 6106 732 LS
1020 
3320 802 MT 6297 802 LS
1021 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o) 3283 985 WT TSE RSS
1022 
3710 876 MT 3724 876 LS
1023 
4107 876 MT 4121 876 LS
1024 
4504 876 MT 4518 876 LS
1025 
4901 876 MT 4915 876 LS
1026 
5298 876 MT 5312 876 LS
1027 
5695 876 MT 5709 876 LS
1028 
6092 876 MT 6106 876 LS
1029 
3320 946 MT 6297 946 LS
1030 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_1) 3283 1129 WT TSE RSS
1031 
3710 1020 MT 3724 1020 LS
1032 
4107 1020 MT 4121 1020 LS
1033 
4504 1020 MT 4518 1020 LS
1034 
4901 1020 MT 4915 1020 LS
1035 
5298 1020 MT 5312 1020 LS
1036 
5695 1020 MT 5709 1020 LS
1037 
6092 1020 MT 6106 1020 LS
1038 
3320 1090 MT 6297 1090 LS
1039 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_2) 3283 1273 WT TSE RSS
1040 
3710 1164 MT 3724 1164 LS
1041 
4107 1164 MT 4121 1164 LS
1042 
4504 1164 MT 4518 1164 LS
1043 
4901 1164 MT 4915 1164 LS
1044 
5298 1164 MT 5312 1164 LS
1045 
5695 1164 MT 5709 1164 LS
1046 
6092 1164 MT 6106 1164 LS
1047 
3320 1234 MT 6297 1234 LS
1048 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_3) 3283 1417 WT TSE RSS
1049 
3710 1308 MT 3724 1308 LS
1050 
4107 1308 MT 4121 1308 LS
1051 
4504 1308 MT 4518 1308 LS
1052 
4901 1308 MT 4915 1308 LS
1053 
5298 1308 MT 5312 1308 LS
1054 
5695 1308 MT 5709 1308 LS
1055 
6092 1308 MT 6106 1308 LS
1056 
3320 1378 MT 6297 1378 LS
1057 
% draw footer
1058 
(Entity:tb_or1200_cpu  Architecture:  Date: Sat Aug 14 01:25:01 EDT 2004   Row: 1 Page: 2) 300 4799 WT TSW RSS
1059 
grestore
1060 
showpage
1061 
%%Page: 3 3
1062 
gsave
1063 
90 rotate 0.12 dup neg scale
1064 
% dump string table
1065 
/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
1066 
/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
1067 
/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
1068 
/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
1069 
/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
1070 
/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
1071 
/ARC {5 -2 roll SX 5 2 roll arc} def
1072 
/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3320 def/REdge 5699 def/LabelWidth 3283 def
1073 
/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
1074 
/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
1075 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dw) MLW
1076 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/aw) MLW
1077 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/clk) MLW
1078 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rst) MLW
1079 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/supv) MLW
1080 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/wb_freeze) MLW
1081 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw) MLW
1082 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw) MLW
1083 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we) MLW
1084 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/flushpipe) MLW
1085 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_read) MLW
1086 
(...0_cpu/or1200_cpu/or1200_rf_top/current_thread_read_out) MLW
1087 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_write) MLW
1088 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw2) MLW
1089 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw2) MLW
1090 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2) MLW
1091 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/id_freeze) MLW
1092 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra) MLW
1093 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb) MLW
1094 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa) MLW
1095 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab) MLW
1096 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda) MLW
1097 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb) MLW
1098 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra2) MLW
1099 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb2) MLW
1100 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2) MLW
1101 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2) MLW
1102 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda2) MLW
1103 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb2) MLW
1104 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_cs) MLW
1105 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_write) MLW
1106 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_addr) MLW
1107 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_i) MLW
1108 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o) MLW
1109 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_1) MLW
1110 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_2) MLW
1111 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_3) MLW
1112 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_4) MLW
1113 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_5) MLW
1114 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_6) MLW
1115 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_7) MLW
1116 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_8) MLW
1117 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_1) MLW
1118 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_2) MLW
1119 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_3) MLW
1120 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_4) MLW
1121 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_5) MLW
1122 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_6) MLW
1123 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_7) MLW
1124 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_8) MLW
1125 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_1) MLW
1126 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_2) MLW
1127 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_3) MLW
1128 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_4) MLW
1129 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_5) MLW
1130 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_6) MLW
1131 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_7) MLW
1132 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_8) MLW
1133 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_1) MLW
1134 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_2) MLW
1135 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_3) MLW
1136 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_4) MLW
1137 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_5) MLW
1138 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_6) MLW
1139 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_7) MLW
1140 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_8) MLW
1141 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_1) MLW
1142 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_2) MLW
1143 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_3) MLW
1144 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_4) MLW
1145 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_5) MLW
1146 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_6) MLW
1147 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_7) MLW
1148 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_8) MLW
1149 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_1) MLW
1150 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_2) MLW
1151 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_3) MLW
1152 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_4) MLW
1153 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_5) MLW
1154 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_6) MLW
1155 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_7) MLW
1156 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_8) MLW
1157 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_1) MLW
1158 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_2) MLW
1159 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_3) MLW
1160 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_4) MLW
1161 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_5) MLW
1162 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_6) MLW
1163 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_7) MLW
1164 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_8) MLW
1165 
% draw waveform shading
1166 
[] 0 SD
1167 
2.995 setlinewidth
1168 
 
1169 
 
1170 
 
1171 
3320 329 MT 3320 329 LT 6297 329 LT ST
1172 
3320 410 MT 3320 410 LT 6297 410 LT ST
1173 
(00000020) 3334 370 WT pop 0 originOffset 37 add RSS
1174 
3320 473 MT 3320 473 LT 6297 473 LT ST
1175 
3320 554 MT 3320 554 LT 6297 554 LT ST
1176 
(00000005) 3334 514 WT pop 0 originOffset 37 add RSS
1177 
3320 698 MT 3320 618 LS
1178 
3320 618 MT 3518 618 LS
1179 
3518 618 MT 3518 698 LS
1180 
3518 698 MT 3717 698 LS
1181 
3717 698 MT 3717 618 LS
1182 
3717 618 MT 3915 618 LS
1183 
3915 618 MT 3915 698 LS
1184 
3915 698 MT 4114 698 LS
1185 
4114 698 MT 4114 618 LS
1186 
4114 618 MT 4312 618 LS
1187 
4312 618 MT 4312 698 LS
1188 
4312 698 MT 4511 698 LS
1189 
4511 698 MT 4511 618 LS
1190 
4511 618 MT 4709 618 LS
1191 
4709 618 MT 4709 698 LS
1192 
4709 698 MT 4908 698 LS
1193 
4908 698 MT 4908 618 LS
1194 
4908 618 MT 5106 618 LS
1195 
5106 618 MT 5106 698 LS
1196 
5106 698 MT 5305 698 LS
1197 
5305 698 MT 5305 618 LS
1198 
5305 618 MT 5503 618 LS
1199 
5503 618 MT 5503 698 LS
1200 
5503 698 MT 5702 698 LS
1201 
5702 698 MT 5702 618 LS
1202 
5702 618 MT 5900 618 LS
1203 
5900 618 MT 5900 698 LS
1204 
5900 698 MT 6099 698 LS
1205 
6099 698 MT 6099 618 LS
1206 
6099 618 MT 6297 618 LS
1207 
3320 842 MT 6297 842 LS
1208 
3320 906 MT 6297 906 LS
1209 
3320 1130 MT 6297 1130 LS
1210 
3320 1193 MT 3320 1193 LT 6297 1193 LT ST
1211 
3320 1274 MT 3320 1274 LT 6297 1274 LT ST
1212 
(03) 3334 1234 WT pop 0 originOffset 37 add RSS
1213 
3320 1378 MT 6297 1378 LS
1214 
3320 1562 MT 6297 1562 LS
1215 
3320 1666 MT 6297 1666 LS
1216 
3320 1769 MT 3320 1769 LT 3710 1769 LT 3717 1810 LT ST
1217 
3320 1850 MT 3320 1850 LT 3710 1850 LT 3717 1810 LT ST
1218 
(4) 3334 1810 WT pop 0 originOffset 37 add RSS
1219 
3717 1810 MT 3717 1810 LT 3724 1769 LT 4107 1769 LT 4114 1810 LT ST
1220 
3717 1810 MT 3717 1810 LT 3724 1850 LT 4107 1850 LT 4114 1810 LT ST
1221 
(5) 3731 1810 WT pop 0 originOffset 37 add RSS
1222 
4114 1810 MT 4114 1810 LT 4121 1769 LT 4504 1769 LT 4511 1810 LT ST
1223 
4114 1810 MT 4114 1810 LT 4121 1850 LT 4504 1850 LT 4511 1810 LT ST
1224 
(6) 4128 1810 WT pop 0 originOffset 37 add RSS
1225 
4511 1810 MT 4511 1810 LT 4518 1769 LT 4901 1769 LT 4908 1810 LT ST
1226 
4511 1810 MT 4511 1810 LT 4518 1850 LT 4901 1850 LT 4908 1810 LT ST
1227 
(7) 4525 1810 WT pop 0 originOffset 37 add RSS
1228 
4908 1810 MT 4908 1810 LT 4915 1769 LT 5298 1769 LT 5305 1810 LT ST
1229 
4908 1810 MT 4908 1810 LT 4915 1850 LT 5298 1850 LT 5305 1810 LT ST
1230 
(0) 4922 1810 WT pop 0 originOffset 37 add RSS
1231 
5305 1810 MT 5305 1810 LT 5312 1769 LT 5695 1769 LT 5702 1810 LT ST
1232 
5305 1810 MT 5305 1810 LT 5312 1850 LT 5695 1850 LT 5702 1810 LT ST
1233 
(1) 5319 1810 WT pop 0 originOffset 37 add RSS
1234 
5702 1810 MT 5702 1810 LT 5709 1769 LT 6092 1769 LT 6099 1810 LT ST
1235 
5702 1810 MT 5702 1810 LT 5709 1850 LT 6092 1850 LT 6099 1810 LT ST
1236 
(2) 5716 1810 WT pop 0 originOffset 37 add RSS
1237 
6099 1810 MT 6099 1810 LT 6106 1769 LT 6297 1769 LT ST
1238 
6099 1810 MT 6099 1810 LT 6106 1850 LT 6297 1850 LT ST
1239 
(3) 6113 1810 WT pop 0 originOffset 37 add RSS
1240 
3320 1913 MT 3320 1913 LT 3710 1913 LT 3717 1954 LT ST
1241 
3320 1994 MT 3320 1994 LT 3710 1994 LT 3717 1954 LT ST
1242 
(4) 3334 1954 WT pop 0 originOffset 37 add RSS
1243 
3717 1954 MT 3717 1954 LT 3724 1913 LT 4107 1913 LT 4114 1954 LT ST
1244 
3717 1954 MT 3717 1954 LT 3724 1994 LT 4107 1994 LT 4114 1954 LT ST
1245 
(5) 3731 1954 WT pop 0 originOffset 37 add RSS
1246 
4114 1954 MT 4114 1954 LT 4121 1913 LT 4504 1913 LT 4511 1954 LT ST
1247 
4114 1954 MT 4114 1954 LT 4121 1994 LT 4504 1994 LT 4511 1954 LT ST
1248 
(6) 4128 1954 WT pop 0 originOffset 37 add RSS
1249 
4511 1954 MT 4511 1954 LT 4518 1913 LT 4901 1913 LT 4908 1954 LT ST
1250 
4511 1954 MT 4511 1954 LT 4518 1994 LT 4901 1994 LT 4908 1954 LT ST
1251 
(7) 4525 1954 WT pop 0 originOffset 37 add RSS
1252 
4908 1954 MT 4908 1954 LT 4915 1913 LT 5298 1913 LT 5305 1954 LT ST
1253 
4908 1954 MT 4908 1954 LT 4915 1994 LT 5298 1994 LT 5305 1954 LT ST
1254 
(0) 4922 1954 WT pop 0 originOffset 37 add RSS
1255 
5305 1954 MT 5305 1954 LT 5312 1913 LT 5695 1913 LT 5702 1954 LT ST
1256 
5305 1954 MT 5305 1954 LT 5312 1994 LT 5695 1994 LT 5702 1954 LT ST
1257 
(1) 5319 1954 WT pop 0 originOffset 37 add RSS
1258 
5702 1954 MT 5702 1954 LT 5709 1913 LT 6092 1913 LT 6099 1954 LT ST
1259 
5702 1954 MT 5702 1954 LT 5709 1994 LT 6092 1994 LT 6099 1954 LT ST
1260 
(2) 5716 1954 WT pop 0 originOffset 37 add RSS
1261 
6099 1954 MT 6099 1954 LT 6106 1913 LT 6297 1913 LT ST
1262 
6099 1954 MT 6099 1954 LT 6106 1994 LT 6297 1994 LT ST
1263 
(3) 6113 1954 WT pop 0 originOffset 37 add RSS
1264 
3320 2057 MT 3320 2057 LT 3710 2057 LT 3717 2098 LT ST
1265 
3320 2138 MT 3320 2138 LT 3710 2138 LT 3717 2098 LT ST
1266 
(3) 3334 2098 WT pop 0 originOffset 37 add RSS
1267 
3717 2098 MT 3717 2098 LT 3724 2057 LT 4107 2057 LT 4114 2098 LT ST
1268 
3717 2098 MT 3717 2098 LT 3724 2138 LT 4107 2138 LT 4114 2098 LT ST
1269 
(4) 3731 2098 WT pop 0 originOffset 37 add RSS
1270 
4114 2098 MT 4114 2098 LT 4121 2057 LT 4504 2057 LT 4511 2098 LT ST
1271 
4114 2098 MT 4114 2098 LT 4121 2138 LT 4504 2138 LT 4511 2098 LT ST
1272 
(5) 4128 2098 WT pop 0 originOffset 37 add RSS
1273 
4511 2098 MT 4511 2098 LT 4518 2057 LT 4901 2057 LT 4908 2098 LT ST
1274 
4511 2098 MT 4511 2098 LT 4518 2138 LT 4901 2138 LT 4908 2098 LT ST
1275 
(6) 4525 2098 WT pop 0 originOffset 37 add RSS
1276 
4908 2098 MT 4908 2098 LT 4915 2057 LT 5298 2057 LT 5305 2098 LT ST
1277 
4908 2098 MT 4908 2098 LT 4915 2138 LT 5298 2138 LT 5305 2098 LT ST
1278 
(7) 4922 2098 WT pop 0 originOffset 37 add RSS
1279 
5305 2098 MT 5305 2098 LT 5312 2057 LT 5695 2057 LT 5702 2098 LT ST
1280 
5305 2098 MT 5305 2098 LT 5312 2138 LT 5695 2138 LT 5702 2098 LT ST
1281 
(0) 5319 2098 WT pop 0 originOffset 37 add RSS
1282 
5702 2098 MT 5702 2098 LT 5709 2057 LT 6092 2057 LT 6099 2098 LT ST
1283 
5702 2098 MT 5702 2098 LT 5709 2138 LT 6092 2138 LT 6099 2098 LT ST
1284 
(1) 5716 2098 WT pop 0 originOffset 37 add RSS
1285 
6099 2098 MT 6099 2098 LT 6106 2057 LT 6297 2057 LT ST
1286 
6099 2098 MT 6099 2098 LT 6106 2138 LT 6297 2138 LT ST
1287 
(2) 6113 2098 WT pop 0 originOffset 37 add RSS
1288 
3320 2201 MT 3320 2201 LT 6297 2201 LT ST
1289 
3320 2282 MT 3320 2282 LT 6297 2282 LT ST
1290 
(03) 3334 2242 WT pop 0 originOffset 37 add RSS
1291 
3320 2386 MT 6297 2386 LS
1292 
3320 2570 MT 6297 2570 LS
1293 
3320 2714 MT 6297 2714 LS
1294 
3320 2777 MT 3320 2777 LT 6297 2777 LT ST
1295 
3320 2858 MT 3320 2858 LT 6297 2858 LT ST
1296 
(01) 3334 2818 WT pop 0 originOffset 37 add RSS
1297 
3320 2921 MT 3320 2921 LT 6297 2921 LT ST
1298 
3320 3002 MT 3320 3002 LT 6297 3002 LT ST
1299 
(00) 3334 2962 WT pop 0 originOffset 37 add RSS
1300 
3320 3106 MT 6297 3106 LS
1301 
3320 3250 MT 6297 3250 LS
1302 
3320 3434 MT 6297 3434 LS
1303 
3320 3578 MT 6297 3578 LS
1304 
3320 3641 MT 3320 3641 LT 6297 3641 LT ST
1305 
3320 3722 MT 3320 3722 LT 6297 3722 LT ST
1306 
(01) 3334 3682 WT pop 0 originOffset 37 add RSS
1307 
3320 3785 MT 3320 3785 LT 6297 3785 LT ST
1308 
3320 3866 MT 3320 3866 LT 6297 3866 LT ST
1309 
(00) 3334 3826 WT pop 0 originOffset 37 add RSS
1310 
3320 3970 MT 6297 3970 LS
1311 
3320 4114 MT 6297 4114 LS
1312 
3320 4298 MT 6297 4298 LS
1313 
3320 4442 MT 6297 4442 LS
1314 
% draw timeline
1315 
3359 4533 MT 3359 4570 LS
1316 
3399 4533 MT 3399 4570 LS
1317 
3439 4533 MT 3439 4570 LS
1318 
3478 4533 MT 3478 4570 LS
1319 
3558 4533 MT 3558 4570 LS
1320 
3597 4533 MT 3597 4570 LS
1321 
3637 4533 MT 3637 4570 LS
1322 
3677 4533 MT 3677 4570 LS
1323 
3717 4533 MT 3717 4570 LS
1324 
3756 4533 MT 3756 4570 LS
1325 
3796 4533 MT 3796 4570 LS
1326 
3836 4533 MT 3836 4570 LS
1327 
3875 4533 MT 3875 4570 LS
1328 
3518 4506 MT 3518 4570 LS
1329 
(80) 3518 4649 WT TS RSS
1330 
3955 4533 MT 3955 4570 LS
1331 
3994 4533 MT 3994 4570 LS
1332 
4034 4533 MT 4034 4570 LS
1333 
4074 4533 MT 4074 4570 LS
1334 
4114 4533 MT 4114 4570 LS
1335 
4153 4533 MT 4153 4570 LS
1336 
4193 4533 MT 4193 4570 LS
1337 
4233 4533 MT 4233 4570 LS
1338 
4272 4533 MT 4272 4570 LS
1339 
3915 4506 MT 3915 4570 LS
1340 
4352 4533 MT 4352 4570 LS
1341 
4391 4533 MT 4391 4570 LS
1342 
4431 4533 MT 4431 4570 LS
1343 
4471 4533 MT 4471 4570 LS
1344 
4511 4533 MT 4511 4570 LS
1345 
4550 4533 MT 4550 4570 LS
1346 
4590 4533 MT 4590 4570 LS
1347 
4630 4533 MT 4630 4570 LS
1348 
4669 4533 MT 4669 4570 LS
1349 
4312 4506 MT 4312 4570 LS
1350 
(100) 4312 4649 WT TS RSS
1351 
4749 4533 MT 4749 4570 LS
1352 
4788 4533 MT 4788 4570 LS
1353 
4828 4533 MT 4828 4570 LS
1354 
4868 4533 MT 4868 4570 LS
1355 
4908 4533 MT 4908 4570 LS
1356 
4947 4533 MT 4947 4570 LS
1357 
4987 4533 MT 4987 4570 LS
1358 
5027 4533 MT 5027 4570 LS
1359 
5066 4533 MT 5066 4570 LS
1360 
4709 4506 MT 4709 4570 LS
1361 
5146 4533 MT 5146 4570 LS
1362 
5185 4533 MT 5185 4570 LS
1363 
5225 4533 MT 5225 4570 LS
1364 
5265 4533 MT 5265 4570 LS
1365 
5305 4533 MT 5305 4570 LS
1366 
5344 4533 MT 5344 4570 LS
1367 
5384 4533 MT 5384 4570 LS
1368 
5424 4533 MT 5424 4570 LS
1369 
5463 4533 MT 5463 4570 LS
1370 
5106 4506 MT 5106 4570 LS
1371 
(120) 5106 4649 WT TS RSS
1372 
5543 4533 MT 5543 4570 LS
1373 
5582 4533 MT 5582 4570 LS
1374 
5622 4533 MT 5622 4570 LS
1375 
5662 4533 MT 5662 4570 LS
1376 
5702 4533 MT 5702 4570 LS
1377 
5741 4533 MT 5741 4570 LS
1378 
5781 4533 MT 5781 4570 LS
1379 
5821 4533 MT 5821 4570 LS
1380 
5860 4533 MT 5860 4570 LS
1381 
5503 4506 MT 5503 4570 LS
1382 
5940 4533 MT 5940 4570 LS
1383 
5979 4533 MT 5979 4570 LS
1384 
6019 4533 MT 6019 4570 LS
1385 
6059 4533 MT 6059 4570 LS
1386 
6099 4533 MT 6099 4570 LS
1387 
6138 4533 MT 6138 4570 LS
1388 
6178 4533 MT 6178 4570 LS
1389 
6218 4533 MT 6218 4570 LS
1390 
6257 4533 MT 6257 4570 LS
1391 
5900 4506 MT 5900 4570 LS
1392 
(140) 5900 4649 WT TS RSS
1393 
6337 4533 MT 6337 4570 LS
1394 
6376 4533 MT 6376 4570 LS
1395 
6416 4533 MT 6416 4570 LS
1396 
6456 4533 MT 6456 4570 LS
1397 
6496 4533 MT 6496 4570 LS
1398 
6535 4533 MT 6535 4570 LS
1399 
6575 4533 MT 6575 4570 LS
1400 
6615 4533 MT 6615 4570 LS
1401 
6654 4533 MT 6654 4570 LS
1402 
6297 4506 MT 6297 4570 LS
1403 
% draw grid
1404 
3518 300 MT 3518 4506 LS
1405 
3915 300 MT 3915 4506 LS
1406 
4312 300 MT 4312 4506 LS
1407 
4709 300 MT 4709 4506 LS
1408 
5106 300 MT 5106 4506 LS
1409 
5503 300 MT 5503 4506 LS
1410 
5900 300 MT 5900 4506 LS
1411 
6297 300 MT 6297 4506 LS
1412 
% draw waveforms
1413 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dw) 3283 409 WT TSE RSS
1414 
3511 300 MT 3525 300 LS
1415 
3908 300 MT 3922 300 LS
1416 
4305 300 MT 4319 300 LS
1417 
4702 300 MT 4716 300 LS
1418 
5099 300 MT 5113 300 LS
1419 
5496 300 MT 5510 300 LS
1420 
5893 300 MT 5907 300 LS
1421 
6290 300 MT 6304 300 LS
1422 
3320 329 MT 3320 329 LT 6297 329 LT ST
1423 
3320 410 MT 3320 410 LT 6297 410 LT ST
1424 
(00000020) 3334 370 WT pop 0 originOffset 37 add RSS
1425 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/aw) 3283 553 WT TSE RSS
1426 
3511 444 MT 3525 444 LS
1427 
3908 444 MT 3922 444 LS
1428 
4305 444 MT 4319 444 LS
1429 
4702 444 MT 4716 444 LS
1430 
5099 444 MT 5113 444 LS
1431 
5496 444 MT 5510 444 LS
1432 
5893 444 MT 5907 444 LS
1433 
6290 444 MT 6304 444 LS
1434 
3320 473 MT 3320 473 LT 6297 473 LT ST
1435 
3320 554 MT 3320 554 LT 6297 554 LT ST
1436 
(00000005) 3334 514 WT pop 0 originOffset 37 add RSS
1437 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/clk) 3283 697 WT TSE RSS
1438 
3511 588 MT 3525 588 LS
1439 
3908 588 MT 3922 588 LS
1440 
4305 588 MT 4319 588 LS
1441 
4702 588 MT 4716 588 LS
1442 
5099 588 MT 5113 588 LS
1443 
5496 588 MT 5510 588 LS
1444 
5893 588 MT 5907 588 LS
1445 
6290 588 MT 6304 588 LS
1446 
3320 698 MT 3320 618 LS
1447 
3320 618 MT 3518 618 LS
1448 
3518 618 MT 3518 698 LS
1449 
3518 698 MT 3717 698 LS
1450 
3717 698 MT 3717 618 LS
1451 
3717 618 MT 3915 618 LS
1452 
3915 618 MT 3915 698 LS
1453 
3915 698 MT 4114 698 LS
1454 
4114 698 MT 4114 618 LS
1455 
4114 618 MT 4312 618 LS
1456 
4312 618 MT 4312 698 LS
1457 
4312 698 MT 4511 698 LS
1458 
4511 698 MT 4511 618 LS
1459 
4511 618 MT 4709 618 LS
1460 
4709 618 MT 4709 698 LS
1461 
4709 698 MT 4908 698 LS
1462 
4908 698 MT 4908 618 LS
1463 
4908 618 MT 5106 618 LS
1464 
5106 618 MT 5106 698 LS
1465 
5106 698 MT 5305 698 LS
1466 
5305 698 MT 5305 618 LS
1467 
5305 618 MT 5503 618 LS
1468 
5503 618 MT 5503 698 LS
1469 
5503 698 MT 5702 698 LS
1470 
5702 698 MT 5702 618 LS
1471 
5702 618 MT 5900 618 LS
1472 
5900 618 MT 5900 698 LS
1473 
5900 698 MT 6099 698 LS
1474 
6099 698 MT 6099 618 LS
1475 
6099 618 MT 6297 618 LS
1476 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rst) 3283 841 WT TSE RSS
1477 
3511 732 MT 3525 732 LS
1478 
3908 732 MT 3922 732 LS
1479 
4305 732 MT 4319 732 LS
1480 
4702 732 MT 4716 732 LS
1481 
5099 732 MT 5113 732 LS
1482 
5496 732 MT 5510 732 LS
1483 
5893 732 MT 5907 732 LS
1484 
6290 732 MT 6304 732 LS
1485 
3320 842 MT 6297 842 LS
1486 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/supv) 3283 985 WT TSE RSS
1487 
3511 876 MT 3525 876 LS
1488 
3908 876 MT 3922 876 LS
1489 
4305 876 MT 4319 876 LS
1490 
4702 876 MT 4716 876 LS
1491 
5099 876 MT 5113 876 LS
1492 
5496 876 MT 5510 876 LS
1493 
5893 876 MT 5907 876 LS
1494 
6290 876 MT 6304 876 LS
1495 
3320 906 MT 6297 906 LS
1496 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/wb_freeze) 3283 1129 WT TSE RSS
1497 
3511 1020 MT 3525 1020 LS
1498 
3908 1020 MT 3922 1020 LS
1499 
4305 1020 MT 4319 1020 LS
1500 
4702 1020 MT 4716 1020 LS
1501 
5099 1020 MT 5113 1020 LS
1502 
5496 1020 MT 5510 1020 LS
1503 
5893 1020 MT 5907 1020 LS
1504 
6290 1020 MT 6304 1020 LS
1505 
3320 1130 MT 6297 1130 LS
1506 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw) 3283 1273 WT TSE RSS
1507 
3511 1164 MT 3525 1164 LS
1508 
3908 1164 MT 3922 1164 LS
1509 
4305 1164 MT 4319 1164 LS
1510 
4702 1164 MT 4716 1164 LS
1511 
5099 1164 MT 5113 1164 LS
1512 
5496 1164 MT 5510 1164 LS
1513 
5893 1164 MT 5907 1164 LS
1514 
6290 1164 MT 6304 1164 LS
1515 
3320 1193 MT 3320 1193 LT 6297 1193 LT ST
1516 
3320 1274 MT 3320 1274 LT 6297 1274 LT ST
1517 
(03) 3334 1234 WT pop 0 originOffset 37 add RSS
1518 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw) 3283 1417 WT TSE RSS
1519 
3511 1308 MT 3525 1308 LS
1520 
3908 1308 MT 3922 1308 LS
1521 
4305 1308 MT 4319 1308 LS
1522 
4702 1308 MT 4716 1308 LS
1523 
5099 1308 MT 5113 1308 LS
1524 
5496 1308 MT 5510 1308 LS
1525 
5893 1308 MT 5907 1308 LS
1526 
6290 1308 MT 6304 1308 LS
1527 
3320 1378 MT 6297 1378 LS
1528 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we) 3283 1561 WT TSE RSS
1529 
3511 1452 MT 3525 1452 LS
1530 
3908 1452 MT 3922 1452 LS
1531 
4305 1452 MT 4319 1452 LS
1532 
4702 1452 MT 4716 1452 LS
1533 
5099 1452 MT 5113 1452 LS
1534 
5496 1452 MT 5510 1452 LS
1535 
5893 1452 MT 5907 1452 LS
1536 
6290 1452 MT 6304 1452 LS
1537 
3320 1562 MT 6297 1562 LS
1538 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/flushpipe) 3283 1705 WT TSE RSS
1539 
3511 1596 MT 3525 1596 LS
1540 
3908 1596 MT 3922 1596 LS
1541 
4305 1596 MT 4319 1596 LS
1542 
4702 1596 MT 4716 1596 LS
1543 
5099 1596 MT 5113 1596 LS
1544 
5496 1596 MT 5510 1596 LS
1545 
5893 1596 MT 5907 1596 LS
1546 
6290 1596 MT 6304 1596 LS
1547 
3320 1666 MT 6297 1666 LS
1548 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_read) 3283 1849 WT TSE RSS
1549 
3511 1740 MT 3525 1740 LS
1550 
3908 1740 MT 3922 1740 LS
1551 
4305 1740 MT 4319 1740 LS
1552 
4702 1740 MT 4716 1740 LS
1553 
5099 1740 MT 5113 1740 LS
1554 
5496 1740 MT 5510 1740 LS
1555 
5893 1740 MT 5907 1740 LS
1556 
6290 1740 MT 6304 1740 LS
1557 
3320 1769 MT 3320 1769 LT 3710 1769 LT 3717 1810 LT ST
1558 
3320 1850 MT 3320 1850 LT 3710 1850 LT 3717 1810 LT ST
1559 
(4) 3334 1810 WT pop 0 originOffset 37 add RSS
1560 
3717 1810 MT 3717 1810 LT 3724 1769 LT 4107 1769 LT 4114 1810 LT ST
1561 
3717 1810 MT 3717 1810 LT 3724 1850 LT 4107 1850 LT 4114 1810 LT ST
1562 
(5) 3731 1810 WT pop 0 originOffset 37 add RSS
1563 
4114 1810 MT 4114 1810 LT 4121 1769 LT 4504 1769 LT 4511 1810 LT ST
1564 
4114 1810 MT 4114 1810 LT 4121 1850 LT 4504 1850 LT 4511 1810 LT ST
1565 
(6) 4128 1810 WT pop 0 originOffset 37 add RSS
1566 
4511 1810 MT 4511 1810 LT 4518 1769 LT 4901 1769 LT 4908 1810 LT ST
1567 
4511 1810 MT 4511 1810 LT 4518 1850 LT 4901 1850 LT 4908 1810 LT ST
1568 
(7) 4525 1810 WT pop 0 originOffset 37 add RSS
1569 
4908 1810 MT 4908 1810 LT 4915 1769 LT 5298 1769 LT 5305 1810 LT ST
1570 
4908 1810 MT 4908 1810 LT 4915 1850 LT 5298 1850 LT 5305 1810 LT ST
1571 
(0) 4922 1810 WT pop 0 originOffset 37 add RSS
1572 
5305 1810 MT 5305 1810 LT 5312 1769 LT 5695 1769 LT 5702 1810 LT ST
1573 
5305 1810 MT 5305 1810 LT 5312 1850 LT 5695 1850 LT 5702 1810 LT ST
1574 
(1) 5319 1810 WT pop 0 originOffset 37 add RSS
1575 
5702 1810 MT 5702 1810 LT 5709 1769 LT 6092 1769 LT 6099 1810 LT ST
1576 
5702 1810 MT 5702 1810 LT 5709 1850 LT 6092 1850 LT 6099 1810 LT ST
1577 
(2) 5716 1810 WT pop 0 originOffset 37 add RSS
1578 
6099 1810 MT 6099 1810 LT 6106 1769 LT 6297 1769 LT ST
1579 
6099 1810 MT 6099 1810 LT 6106 1850 LT 6297 1850 LT ST
1580 
(3) 6113 1810 WT pop 0 originOffset 37 add RSS
1581 
(...0_cpu/or1200_cpu/or1200_rf_top/current_thread_read_out) 3283 1993 WT TSE RSS
1582 
3511 1884 MT 3525 1884 LS
1583 
3908 1884 MT 3922 1884 LS
1584 
4305 1884 MT 4319 1884 LS
1585 
4702 1884 MT 4716 1884 LS
1586 
5099 1884 MT 5113 1884 LS
1587 
5496 1884 MT 5510 1884 LS
1588 
5893 1884 MT 5907 1884 LS
1589 
6290 1884 MT 6304 1884 LS
1590 
3320 1913 MT 3320 1913 LT 3710 1913 LT 3717 1954 LT ST
1591 
3320 1994 MT 3320 1994 LT 3710 1994 LT 3717 1954 LT ST
1592 
(4) 3334 1954 WT pop 0 originOffset 37 add RSS
1593 
3717 1954 MT 3717 1954 LT 3724 1913 LT 4107 1913 LT 4114 1954 LT ST
1594 
3717 1954 MT 3717 1954 LT 3724 1994 LT 4107 1994 LT 4114 1954 LT ST
1595 
(5) 3731 1954 WT pop 0 originOffset 37 add RSS
1596 
4114 1954 MT 4114 1954 LT 4121 1913 LT 4504 1913 LT 4511 1954 LT ST
1597 
4114 1954 MT 4114 1954 LT 4121 1994 LT 4504 1994 LT 4511 1954 LT ST
1598 
(6) 4128 1954 WT pop 0 originOffset 37 add RSS
1599 
4511 1954 MT 4511 1954 LT 4518 1913 LT 4901 1913 LT 4908 1954 LT ST
1600 
4511 1954 MT 4511 1954 LT 4518 1994 LT 4901 1994 LT 4908 1954 LT ST
1601 
(7) 4525 1954 WT pop 0 originOffset 37 add RSS
1602 
4908 1954 MT 4908 1954 LT 4915 1913 LT 5298 1913 LT 5305 1954 LT ST
1603 
4908 1954 MT 4908 1954 LT 4915 1994 LT 5298 1994 LT 5305 1954 LT ST
1604 
(0) 4922 1954 WT pop 0 originOffset 37 add RSS
1605 
5305 1954 MT 5305 1954 LT 5312 1913 LT 5695 1913 LT 5702 1954 LT ST
1606 
5305 1954 MT 5305 1954 LT 5312 1994 LT 5695 1994 LT 5702 1954 LT ST
1607 
(1) 5319 1954 WT pop 0 originOffset 37 add RSS
1608 
5702 1954 MT 5702 1954 LT 5709 1913 LT 6092 1913 LT 6099 1954 LT ST
1609 
5702 1954 MT 5702 1954 LT 5709 1994 LT 6092 1994 LT 6099 1954 LT ST
1610 
(2) 5716 1954 WT pop 0 originOffset 37 add RSS
1611 
6099 1954 MT 6099 1954 LT 6106 1913 LT 6297 1913 LT ST
1612 
6099 1954 MT 6099 1954 LT 6106 1994 LT 6297 1994 LT ST
1613 
(3) 6113 1954 WT pop 0 originOffset 37 add RSS
1614 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_write) 3283 2137 WT TSE RSS
1615 
3511 2028 MT 3525 2028 LS
1616 
3908 2028 MT 3922 2028 LS
1617 
4305 2028 MT 4319 2028 LS
1618 
4702 2028 MT 4716 2028 LS
1619 
5099 2028 MT 5113 2028 LS
1620 
5496 2028 MT 5510 2028 LS
1621 
5893 2028 MT 5907 2028 LS
1622 
6290 2028 MT 6304 2028 LS
1623 
3320 2057 MT 3320 2057 LT 3710 2057 LT 3717 2098 LT ST
1624 
3320 2138 MT 3320 2138 LT 3710 2138 LT 3717 2098 LT ST
1625 
(3) 3334 2098 WT pop 0 originOffset 37 add RSS
1626 
3717 2098 MT 3717 2098 LT 3724 2057 LT 4107 2057 LT 4114 2098 LT ST
1627 
3717 2098 MT 3717 2098 LT 3724 2138 LT 4107 2138 LT 4114 2098 LT ST
1628 
(4) 3731 2098 WT pop 0 originOffset 37 add RSS
1629 
4114 2098 MT 4114 2098 LT 4121 2057 LT 4504 2057 LT 4511 2098 LT ST
1630 
4114 2098 MT 4114 2098 LT 4121 2138 LT 4504 2138 LT 4511 2098 LT ST
1631 
(5) 4128 2098 WT pop 0 originOffset 37 add RSS
1632 
4511 2098 MT 4511 2098 LT 4518 2057 LT 4901 2057 LT 4908 2098 LT ST
1633 
4511 2098 MT 4511 2098 LT 4518 2138 LT 4901 2138 LT 4908 2098 LT ST
1634 
(6) 4525 2098 WT pop 0 originOffset 37 add RSS
1635 
4908 2098 MT 4908 2098 LT 4915 2057 LT 5298 2057 LT 5305 2098 LT ST
1636 
4908 2098 MT 4908 2098 LT 4915 2138 LT 5298 2138 LT 5305 2098 LT ST
1637 
(7) 4922 2098 WT pop 0 originOffset 37 add RSS
1638 
5305 2098 MT 5305 2098 LT 5312 2057 LT 5695 2057 LT 5702 2098 LT ST
1639 
5305 2098 MT 5305 2098 LT 5312 2138 LT 5695 2138 LT 5702 2098 LT ST
1640 
(0) 5319 2098 WT pop 0 originOffset 37 add RSS
1641 
5702 2098 MT 5702 2098 LT 5709 2057 LT 6092 2057 LT 6099 2098 LT ST
1642 
5702 2098 MT 5702 2098 LT 5709 2138 LT 6092 2138 LT 6099 2098 LT ST
1643 
(1) 5716 2098 WT pop 0 originOffset 37 add RSS
1644 
6099 2098 MT 6099 2098 LT 6106 2057 LT 6297 2057 LT ST
1645 
6099 2098 MT 6099 2098 LT 6106 2138 LT 6297 2138 LT ST
1646 
(2) 6113 2098 WT pop 0 originOffset 37 add RSS
1647 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw2) 3283 2281 WT TSE RSS
1648 
3511 2172 MT 3525 2172 LS
1649 
3908 2172 MT 3922 2172 LS
1650 
4305 2172 MT 4319 2172 LS
1651 
4702 2172 MT 4716 2172 LS
1652 
5099 2172 MT 5113 2172 LS
1653 
5496 2172 MT 5510 2172 LS
1654 
5893 2172 MT 5907 2172 LS
1655 
6290 2172 MT 6304 2172 LS
1656 
3320 2201 MT 3320 2201 LT 6297 2201 LT ST
1657 
3320 2282 MT 3320 2282 LT 6297 2282 LT ST
1658 
(03) 3334 2242 WT pop 0 originOffset 37 add RSS
1659 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw2) 3283 2425 WT TSE RSS
1660 
3511 2316 MT 3525 2316 LS
1661 
3908 2316 MT 3922 2316 LS
1662 
4305 2316 MT 4319 2316 LS
1663 
4702 2316 MT 4716 2316 LS
1664 
5099 2316 MT 5113 2316 LS
1665 
5496 2316 MT 5510 2316 LS
1666 
5893 2316 MT 5907 2316 LS
1667 
6290 2316 MT 6304 2316 LS
1668 
3320 2386 MT 6297 2386 LS
1669 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2) 3283 2569 WT TSE RSS
1670 
3511 2460 MT 3525 2460 LS
1671 
3908 2460 MT 3922 2460 LS
1672 
4305 2460 MT 4319 2460 LS
1673 
4702 2460 MT 4716 2460 LS
1674 
5099 2460 MT 5113 2460 LS
1675 
5496 2460 MT 5510 2460 LS
1676 
5893 2460 MT 5907 2460 LS
1677 
6290 2460 MT 6304 2460 LS
1678 
3320 2570 MT 6297 2570 LS
1679 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/id_freeze) 3283 2713 WT TSE RSS
1680 
3511 2604 MT 3525 2604 LS
1681 
3908 2604 MT 3922 2604 LS
1682 
4305 2604 MT 4319 2604 LS
1683 
4702 2604 MT 4716 2604 LS
1684 
5099 2604 MT 5113 2604 LS
1685 
5496 2604 MT 5510 2604 LS
1686 
5893 2604 MT 5907 2604 LS
1687 
6290 2604 MT 6304 2604 LS
1688 
3320 2714 MT 6297 2714 LS
1689 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra) 3283 2857 WT TSE RSS
1690 
3511 2748 MT 3525 2748 LS
1691 
3908 2748 MT 3922 2748 LS
1692 
4305 2748 MT 4319 2748 LS
1693 
4702 2748 MT 4716 2748 LS
1694 
5099 2748 MT 5113 2748 LS
1695 
5496 2748 MT 5510 2748 LS
1696 
5893 2748 MT 5907 2748 LS
1697 
6290 2748 MT 6304 2748 LS
1698 
3320 2777 MT 3320 2777 LT 6297 2777 LT ST
1699 
3320 2858 MT 3320 2858 LT 6297 2858 LT ST
1700 
(01) 3334 2818 WT pop 0 originOffset 37 add RSS
1701 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb) 3283 3001 WT TSE RSS
1702 
3511 2892 MT 3525 2892 LS
1703 
3908 2892 MT 3922 2892 LS
1704 
4305 2892 MT 4319 2892 LS
1705 
4702 2892 MT 4716 2892 LS
1706 
5099 2892 MT 5113 2892 LS
1707 
5496 2892 MT 5510 2892 LS
1708 
5893 2892 MT 5907 2892 LS
1709 
6290 2892 MT 6304 2892 LS
1710 
3320 2921 MT 3320 2921 LT 6297 2921 LT ST
1711 
3320 3002 MT 3320 3002 LT 6297 3002 LT ST
1712 
(00) 3334 2962 WT pop 0 originOffset 37 add RSS
1713 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa) 3283 3145 WT TSE RSS
1714 
3511 3036 MT 3525 3036 LS
1715 
3908 3036 MT 3922 3036 LS
1716 
4305 3036 MT 4319 3036 LS
1717 
4702 3036 MT 4716 3036 LS
1718 
5099 3036 MT 5113 3036 LS
1719 
5496 3036 MT 5510 3036 LS
1720 
5893 3036 MT 5907 3036 LS
1721 
6290 3036 MT 6304 3036 LS
1722 
3320 3106 MT 6297 3106 LS
1723 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab) 3283 3289 WT TSE RSS
1724 
3511 3180 MT 3525 3180 LS
1725 
3908 3180 MT 3922 3180 LS
1726 
4305 3180 MT 4319 3180 LS
1727 
4702 3180 MT 4716 3180 LS
1728 
5099 3180 MT 5113 3180 LS
1729 
5496 3180 MT 5510 3180 LS
1730 
5893 3180 MT 5907 3180 LS
1731 
6290 3180 MT 6304 3180 LS
1732 
3320 3250 MT 6297 3250 LS
1733 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda) 3283 3433 WT TSE RSS
1734 
3511 3324 MT 3525 3324 LS
1735 
3908 3324 MT 3922 3324 LS
1736 
4305 3324 MT 4319 3324 LS
1737 
4702 3324 MT 4716 3324 LS
1738 
5099 3324 MT 5113 3324 LS
1739 
5496 3324 MT 5510 3324 LS
1740 
5893 3324 MT 5907 3324 LS
1741 
6290 3324 MT 6304 3324 LS
1742 
3320 3434 MT 6297 3434 LS
1743 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb) 3283 3577 WT TSE RSS
1744 
3511 3468 MT 3525 3468 LS
1745 
3908 3468 MT 3922 3468 LS
1746 
4305 3468 MT 4319 3468 LS
1747 
4702 3468 MT 4716 3468 LS
1748 
5099 3468 MT 5113 3468 LS
1749 
5496 3468 MT 5510 3468 LS
1750 
5893 3468 MT 5907 3468 LS
1751 
6290 3468 MT 6304 3468 LS
1752 
3320 3578 MT 6297 3578 LS
1753 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra2) 3283 3721 WT TSE RSS
1754 
3511 3612 MT 3525 3612 LS
1755 
3908 3612 MT 3922 3612 LS
1756 
4305 3612 MT 4319 3612 LS
1757 
4702 3612 MT 4716 3612 LS
1758 
5099 3612 MT 5113 3612 LS
1759 
5496 3612 MT 5510 3612 LS
1760 
5893 3612 MT 5907 3612 LS
1761 
6290 3612 MT 6304 3612 LS
1762 
3320 3641 MT 3320 3641 LT 6297 3641 LT ST
1763 
3320 3722 MT 3320 3722 LT 6297 3722 LT ST
1764 
(01) 3334 3682 WT pop 0 originOffset 37 add RSS
1765 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb2) 3283 3865 WT TSE RSS
1766 
3511 3756 MT 3525 3756 LS
1767 
3908 3756 MT 3922 3756 LS
1768 
4305 3756 MT 4319 3756 LS
1769 
4702 3756 MT 4716 3756 LS
1770 
5099 3756 MT 5113 3756 LS
1771 
5496 3756 MT 5510 3756 LS
1772 
5893 3756 MT 5907 3756 LS
1773 
6290 3756 MT 6304 3756 LS
1774 
3320 3785 MT 3320 3785 LT 6297 3785 LT ST
1775 
3320 3866 MT 3320 3866 LT 6297 3866 LT ST
1776 
(00) 3334 3826 WT pop 0 originOffset 37 add RSS
1777 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2) 3283 4009 WT TSE RSS
1778 
3511 3900 MT 3525 3900 LS
1779 
3908 3900 MT 3922 3900 LS
1780 
4305 3900 MT 4319 3900 LS
1781 
4702 3900 MT 4716 3900 LS
1782 
5099 3900 MT 5113 3900 LS
1783 
5496 3900 MT 5510 3900 LS
1784 
5893 3900 MT 5907 3900 LS
1785 
6290 3900 MT 6304 3900 LS
1786 
3320 3970 MT 6297 3970 LS
1787 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2) 3283 4153 WT TSE RSS
1788 
3511 4044 MT 3525 4044 LS
1789 
3908 4044 MT 3922 4044 LS
1790 
4305 4044 MT 4319 4044 LS
1791 
4702 4044 MT 4716 4044 LS
1792 
5099 4044 MT 5113 4044 LS
1793 
5496 4044 MT 5510 4044 LS
1794 
5893 4044 MT 5907 4044 LS
1795 
6290 4044 MT 6304 4044 LS
1796 
3320 4114 MT 6297 4114 LS
1797 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda2) 3283 4297 WT TSE RSS
1798 
3511 4188 MT 3525 4188 LS
1799 
3908 4188 MT 3922 4188 LS
1800 
4305 4188 MT 4319 4188 LS
1801 
4702 4188 MT 4716 4188 LS
1802 
5099 4188 MT 5113 4188 LS
1803 
5496 4188 MT 5510 4188 LS
1804 
5893 4188 MT 5907 4188 LS
1805 
6290 4188 MT 6304 4188 LS
1806 
3320 4298 MT 6297 4298 LS
1807 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb2) 3283 4441 WT TSE RSS
1808 
3511 4332 MT 3525 4332 LS
1809 
3908 4332 MT 3922 4332 LS
1810 
4305 4332 MT 4319 4332 LS
1811 
4702 4332 MT 4716 4332 LS
1812 
5099 4332 MT 5113 4332 LS
1813 
5496 4332 MT 5510 4332 LS
1814 
5893 4332 MT 5907 4332 LS
1815 
6290 4332 MT 6304 4332 LS
1816 
3320 4442 MT 6297 4442 LS
1817 
% draw footer
1818 
(Entity:tb_or1200_cpu  Architecture:  Date: Sat Aug 14 01:25:01 EDT 2004   Row: 2 Page: 3) 300 4799 WT TSW RSS
1819 
grestore
1820 
showpage
1821 
%%Page: 4 4
1822 
gsave
1823 
90 rotate 0.12 dup neg scale
1824 
% dump string table
1825 
/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
1826 
/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
1827 
/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
1828 
/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
1829 
/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
1830 
/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
1831 
/ARC {5 -2 roll SX 5 2 roll arc} def
1832 
/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3320 def/REdge 5699 def/LabelWidth 3283 def
1833 
/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
1834 
/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
1835 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dw) MLW
1836 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/aw) MLW
1837 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/clk) MLW
1838 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rst) MLW
1839 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/supv) MLW
1840 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/wb_freeze) MLW
1841 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw) MLW
1842 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw) MLW
1843 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we) MLW
1844 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/flushpipe) MLW
1845 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_read) MLW
1846 
(...0_cpu/or1200_cpu/or1200_rf_top/current_thread_read_out) MLW
1847 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_write) MLW
1848 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw2) MLW
1849 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw2) MLW
1850 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2) MLW
1851 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/id_freeze) MLW
1852 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra) MLW
1853 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb) MLW
1854 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa) MLW
1855 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab) MLW
1856 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda) MLW
1857 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb) MLW
1858 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra2) MLW
1859 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb2) MLW
1860 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2) MLW
1861 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2) MLW
1862 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda2) MLW
1863 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb2) MLW
1864 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_cs) MLW
1865 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_write) MLW
1866 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_addr) MLW
1867 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_i) MLW
1868 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o) MLW
1869 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_1) MLW
1870 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_2) MLW
1871 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_3) MLW
1872 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_4) MLW
1873 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_5) MLW
1874 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_6) MLW
1875 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_7) MLW
1876 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_8) MLW
1877 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_1) MLW
1878 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_2) MLW
1879 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_3) MLW
1880 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_4) MLW
1881 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_5) MLW
1882 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_6) MLW
1883 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_7) MLW
1884 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_8) MLW
1885 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_1) MLW
1886 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_2) MLW
1887 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_3) MLW
1888 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_4) MLW
1889 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_5) MLW
1890 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_6) MLW
1891 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_7) MLW
1892 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_8) MLW
1893 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_1) MLW
1894 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_2) MLW
1895 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_3) MLW
1896 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_4) MLW
1897 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_5) MLW
1898 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_6) MLW
1899 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_7) MLW
1900 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_8) MLW
1901 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_1) MLW
1902 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_2) MLW
1903 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_3) MLW
1904 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_4) MLW
1905 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_5) MLW
1906 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_6) MLW
1907 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_7) MLW
1908 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_8) MLW
1909 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_1) MLW
1910 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_2) MLW
1911 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_3) MLW
1912 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_4) MLW
1913 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_5) MLW
1914 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_6) MLW
1915 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_7) MLW
1916 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_8) MLW
1917 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_1) MLW
1918 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_2) MLW
1919 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_3) MLW
1920 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_4) MLW
1921 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_5) MLW
1922 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_6) MLW
1923 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_7) MLW
1924 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_8) MLW
1925 
% draw waveform shading
1926 
[] 0 SD
1927 
2.995 setlinewidth
1928 
 
1929 
 
1930 
 
1931 
3320 410 MT 6297 410 LS
1932 
3320 514 MT 6297 514 LS
1933 
3320 658 MT 6297 658 LS
1934 
3320 802 MT 6297 802 LS
1935 
3320 946 MT 6297 946 LS
1936 
3320 1090 MT 6297 1090 LS
1937 
3320 1234 MT 6297 1234 LS
1938 
3320 1378 MT 6297 1378 LS
1939 
% draw timeline
1940 
3359 4533 MT 3359 4570 LS
1941 
3399 4533 MT 3399 4570 LS
1942 
3439 4533 MT 3439 4570 LS
1943 
3478 4533 MT 3478 4570 LS
1944 
3558 4533 MT 3558 4570 LS
1945 
3597 4533 MT 3597 4570 LS
1946 
3637 4533 MT 3637 4570 LS
1947 
3677 4533 MT 3677 4570 LS
1948 
3717 4533 MT 3717 4570 LS
1949 
3756 4533 MT 3756 4570 LS
1950 
3796 4533 MT 3796 4570 LS
1951 
3836 4533 MT 3836 4570 LS
1952 
3875 4533 MT 3875 4570 LS
1953 
3518 4506 MT 3518 4570 LS
1954 
(80) 3518 4649 WT TS RSS
1955 
3955 4533 MT 3955 4570 LS
1956 
3994 4533 MT 3994 4570 LS
1957 
4034 4533 MT 4034 4570 LS
1958 
4074 4533 MT 4074 4570 LS
1959 
4114 4533 MT 4114 4570 LS
1960 
4153 4533 MT 4153 4570 LS
1961 
4193 4533 MT 4193 4570 LS
1962 
4233 4533 MT 4233 4570 LS
1963 
4272 4533 MT 4272 4570 LS
1964 
3915 4506 MT 3915 4570 LS
1965 
4352 4533 MT 4352 4570 LS
1966 
4391 4533 MT 4391 4570 LS
1967 
4431 4533 MT 4431 4570 LS
1968 
4471 4533 MT 4471 4570 LS
1969 
4511 4533 MT 4511 4570 LS
1970 
4550 4533 MT 4550 4570 LS
1971 
4590 4533 MT 4590 4570 LS
1972 
4630 4533 MT 4630 4570 LS
1973 
4669 4533 MT 4669 4570 LS
1974 
4312 4506 MT 4312 4570 LS
1975 
(100) 4312 4649 WT TS RSS
1976 
4749 4533 MT 4749 4570 LS
1977 
4788 4533 MT 4788 4570 LS
1978 
4828 4533 MT 4828 4570 LS
1979 
4868 4533 MT 4868 4570 LS
1980 
4908 4533 MT 4908 4570 LS
1981 
4947 4533 MT 4947 4570 LS
1982 
4987 4533 MT 4987 4570 LS
1983 
5027 4533 MT 5027 4570 LS
1984 
5066 4533 MT 5066 4570 LS
1985 
4709 4506 MT 4709 4570 LS
1986 
5146 4533 MT 5146 4570 LS
1987 
5185 4533 MT 5185 4570 LS
1988 
5225 4533 MT 5225 4570 LS
1989 
5265 4533 MT 5265 4570 LS
1990 
5305 4533 MT 5305 4570 LS
1991 
5344 4533 MT 5344 4570 LS
1992 
5384 4533 MT 5384 4570 LS
1993 
5424 4533 MT 5424 4570 LS
1994 
5463 4533 MT 5463 4570 LS
1995 
5106 4506 MT 5106 4570 LS
1996 
(120) 5106 4649 WT TS RSS
1997 
5543 4533 MT 5543 4570 LS
1998 
5582 4533 MT 5582 4570 LS
1999 
5622 4533 MT 5622 4570 LS
2000 
5662 4533 MT 5662 4570 LS
2001 
5702 4533 MT 5702 4570 LS
2002 
5741 4533 MT 5741 4570 LS
2003 
5781 4533 MT 5781 4570 LS
2004 
5821 4533 MT 5821 4570 LS
2005 
5860 4533 MT 5860 4570 LS
2006 
5503 4506 MT 5503 4570 LS
2007 
5940 4533 MT 5940 4570 LS
2008 
5979 4533 MT 5979 4570 LS
2009 
6019 4533 MT 6019 4570 LS
2010 
6059 4533 MT 6059 4570 LS
2011 
6099 4533 MT 6099 4570 LS
2012 
6138 4533 MT 6138 4570 LS
2013 
6178 4533 MT 6178 4570 LS
2014 
6218 4533 MT 6218 4570 LS
2015 
6257 4533 MT 6257 4570 LS
2016 
5900 4506 MT 5900 4570 LS
2017 
(140) 5900 4649 WT TS RSS
2018 
6337 4533 MT 6337 4570 LS
2019 
6376 4533 MT 6376 4570 LS
2020 
6416 4533 MT 6416 4570 LS
2021 
6456 4533 MT 6456 4570 LS
2022 
6496 4533 MT 6496 4570 LS
2023 
6535 4533 MT 6535 4570 LS
2024 
6575 4533 MT 6575 4570 LS
2025 
6615 4533 MT 6615 4570 LS
2026 
6654 4533 MT 6654 4570 LS
2027 
6297 4506 MT 6297 4570 LS
2028 
% draw grid
2029 
3518 300 MT 3518 4506 LS
2030 
3915 300 MT 3915 4506 LS
2031 
4312 300 MT 4312 4506 LS
2032 
4709 300 MT 4709 4506 LS
2033 
5106 300 MT 5106 4506 LS
2034 
5503 300 MT 5503 4506 LS
2035 
5900 300 MT 5900 4506 LS
2036 
6297 300 MT 6297 4506 LS
2037 
% draw waveforms
2038 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_cs) 3283 409 WT TSE RSS
2039 
3511 300 MT 3525 300 LS
2040 
3908 300 MT 3922 300 LS
2041 
4305 300 MT 4319 300 LS
2042 
4702 300 MT 4716 300 LS
2043 
5099 300 MT 5113 300 LS
2044 
5496 300 MT 5510 300 LS
2045 
5893 300 MT 5907 300 LS
2046 
6290 300 MT 6304 300 LS
2047 
3320 410 MT 6297 410 LS
2048 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_write) 3283 553 WT TSE RSS
2049 
3511 444 MT 3525 444 LS
2050 
3908 444 MT 3922 444 LS
2051 
4305 444 MT 4319 444 LS
2052 
4702 444 MT 4716 444 LS
2053 
5099 444 MT 5113 444 LS
2054 
5496 444 MT 5510 444 LS
2055 
5893 444 MT 5907 444 LS
2056 
6290 444 MT 6304 444 LS
2057 
3320 514 MT 6297 514 LS
2058 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_addr) 3283 697 WT TSE RSS
2059 
3511 588 MT 3525 588 LS
2060 
3908 588 MT 3922 588 LS
2061 
4305 588 MT 4319 588 LS
2062 
4702 588 MT 4716 588 LS
2063 
5099 588 MT 5113 588 LS
2064 
5496 588 MT 5510 588 LS
2065 
5893 588 MT 5907 588 LS
2066 
6290 588 MT 6304 588 LS
2067 
3320 658 MT 6297 658 LS
2068 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_i) 3283 841 WT TSE RSS
2069 
3511 732 MT 3525 732 LS
2070 
3908 732 MT 3922 732 LS
2071 
4305 732 MT 4319 732 LS
2072 
4702 732 MT 4716 732 LS
2073 
5099 732 MT 5113 732 LS
2074 
5496 732 MT 5510 732 LS
2075 
5893 732 MT 5907 732 LS
2076 
6290 732 MT 6304 732 LS
2077 
3320 802 MT 6297 802 LS
2078 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o) 3283 985 WT TSE RSS
2079 
3511 876 MT 3525 876 LS
2080 
3908 876 MT 3922 876 LS
2081 
4305 876 MT 4319 876 LS
2082 
4702 876 MT 4716 876 LS
2083 
5099 876 MT 5113 876 LS
2084 
5496 876 MT 5510 876 LS
2085 
5893 876 MT 5907 876 LS
2086 
6290 876 MT 6304 876 LS
2087 
3320 946 MT 6297 946 LS
2088 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_1) 3283 1129 WT TSE RSS
2089 
3511 1020 MT 3525 1020 LS
2090 
3908 1020 MT 3922 1020 LS
2091 
4305 1020 MT 4319 1020 LS
2092 
4702 1020 MT 4716 1020 LS
2093 
5099 1020 MT 5113 1020 LS
2094 
5496 1020 MT 5510 1020 LS
2095 
5893 1020 MT 5907 1020 LS
2096 
6290 1020 MT 6304 1020 LS
2097 
3320 1090 MT 6297 1090 LS
2098 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_2) 3283 1273 WT TSE RSS
2099 
3511 1164 MT 3525 1164 LS
2100 
3908 1164 MT 3922 1164 LS
2101 
4305 1164 MT 4319 1164 LS
2102 
4702 1164 MT 4716 1164 LS
2103 
5099 1164 MT 5113 1164 LS
2104 
5496 1164 MT 5510 1164 LS
2105 
5893 1164 MT 5907 1164 LS
2106 
6290 1164 MT 6304 1164 LS
2107 
3320 1234 MT 6297 1234 LS
2108 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_3) 3283 1417 WT TSE RSS
2109 
3511 1308 MT 3525 1308 LS
2110 
3908 1308 MT 3922 1308 LS
2111 
4305 1308 MT 4319 1308 LS
2112 
4702 1308 MT 4716 1308 LS
2113 
5099 1308 MT 5113 1308 LS
2114 
5496 1308 MT 5510 1308 LS
2115 
5893 1308 MT 5907 1308 LS
2116 
6290 1308 MT 6304 1308 LS
2117 
3320 1378 MT 6297 1378 LS
2118 
% draw footer
2119 
(Entity:tb_or1200_cpu  Architecture:  Date: Sat Aug 14 01:25:01 EDT 2004   Row: 2 Page: 4) 300 4799 WT TSW RSS
2120 
grestore
2121 
showpage
2122 
%%Page: 5 5
2123 
gsave
2124 
90 rotate 0.12 dup neg scale
2125 
% dump string table
2126 
/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
2127 
/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
2128 
/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
2129 
/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
2130 
/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
2131 
/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
2132 
/ARC {5 -2 roll SX 5 2 roll arc} def
2133 
/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3320 def/REdge 5699 def/LabelWidth 3283 def
2134 
/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
2135 
/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
2136 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dw) MLW
2137 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/aw) MLW
2138 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/clk) MLW
2139 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rst) MLW
2140 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/supv) MLW
2141 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/wb_freeze) MLW
2142 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw) MLW
2143 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw) MLW
2144 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we) MLW
2145 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/flushpipe) MLW
2146 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_read) MLW
2147 
(...0_cpu/or1200_cpu/or1200_rf_top/current_thread_read_out) MLW
2148 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_write) MLW
2149 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw2) MLW
2150 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw2) MLW
2151 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2) MLW
2152 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/id_freeze) MLW
2153 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra) MLW
2154 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb) MLW
2155 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa) MLW
2156 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab) MLW
2157 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda) MLW
2158 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb) MLW
2159 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra2) MLW
2160 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb2) MLW
2161 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2) MLW
2162 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2) MLW
2163 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda2) MLW
2164 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb2) MLW
2165 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_cs) MLW
2166 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_write) MLW
2167 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_addr) MLW
2168 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_i) MLW
2169 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o) MLW
2170 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_1) MLW
2171 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_2) MLW
2172 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_3) MLW
2173 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_4) MLW
2174 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_5) MLW
2175 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_6) MLW
2176 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_7) MLW
2177 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_8) MLW
2178 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_1) MLW
2179 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_2) MLW
2180 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_3) MLW
2181 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_4) MLW
2182 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_5) MLW
2183 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_6) MLW
2184 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_7) MLW
2185 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_8) MLW
2186 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_1) MLW
2187 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_2) MLW
2188 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_3) MLW
2189 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_4) MLW
2190 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_5) MLW
2191 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_6) MLW
2192 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_7) MLW
2193 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_8) MLW
2194 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_1) MLW
2195 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_2) MLW
2196 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_3) MLW
2197 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_4) MLW
2198 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_5) MLW
2199 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_6) MLW
2200 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_7) MLW
2201 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_8) MLW
2202 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_1) MLW
2203 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_2) MLW
2204 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_3) MLW
2205 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_4) MLW
2206 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_5) MLW
2207 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_6) MLW
2208 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_7) MLW
2209 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_8) MLW
2210 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_1) MLW
2211 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_2) MLW
2212 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_3) MLW
2213 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_4) MLW
2214 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_5) MLW
2215 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_6) MLW
2216 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_7) MLW
2217 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_8) MLW
2218 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_1) MLW
2219 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_2) MLW
2220 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_3) MLW
2221 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_4) MLW
2222 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_5) MLW
2223 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_6) MLW
2224 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_7) MLW
2225 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_8) MLW
2226 
% draw waveform shading
2227 
[] 0 SD
2228 
2.995 setlinewidth
2229 
 
2230 
 
2231 
 
2232 
3320 329 MT 3320 329 LT 6297 329 LT ST
2233 
3320 410 MT 3320 410 LT 6297 410 LT ST
2234 
(00000020) 3334 370 WT pop 0 originOffset 37 add RSS
2235 
3320 473 MT 3320 473 LT 6297 473 LT ST
2236 
3320 554 MT 3320 554 LT 6297 554 LT ST
2237 
(00000005) 3334 514 WT pop 0 originOffset 37 add RSS
2238 
3320 618 MT 3320 698 LS
2239 
3320 698 MT 3518 698 LS
2240 
3518 698 MT 3518 618 LS
2241 
3518 618 MT 3717 618 LS
2242 
3717 618 MT 3717 698 LS
2243 
3717 698 MT 3915 698 LS
2244 
3915 698 MT 3915 618 LS
2245 
3915 618 MT 4114 618 LS
2246 
4114 618 MT 4114 698 LS
2247 
4114 698 MT 4312 698 LS
2248 
4312 698 MT 4312 618 LS
2249 
4312 618 MT 4511 618 LS
2250 
4511 618 MT 4511 698 LS
2251 
4511 698 MT 4709 698 LS
2252 
4709 698 MT 4709 618 LS
2253 
4709 618 MT 4908 618 LS
2254 
4908 618 MT 4908 698 LS
2255 
4908 698 MT 5106 698 LS
2256 
5106 698 MT 5106 618 LS
2257 
5106 618 MT 5305 618 LS
2258 
5305 618 MT 5305 698 LS
2259 
5305 698 MT 5503 698 LS
2260 
5503 698 MT 5503 618 LS
2261 
5503 618 MT 5702 618 LS
2262 
5702 618 MT 5702 698 LS
2263 
5702 698 MT 5900 698 LS
2264 
5900 698 MT 5900 618 LS
2265 
5900 618 MT 6099 618 LS
2266 
6099 618 MT 6099 698 LS
2267 
6099 698 MT 6297 698 LS
2268 
3320 842 MT 6297 842 LS
2269 
3320 906 MT 6297 906 LS
2270 
3320 1130 MT 6297 1130 LS
2271 
3320 1193 MT 3320 1193 LT 6297 1193 LT ST
2272 
3320 1274 MT 3320 1274 LT 6297 1274 LT ST
2273 
(03) 3334 1234 WT pop 0 originOffset 37 add RSS
2274 
3320 1378 MT 6297 1378 LS
2275 
3320 1562 MT 6297 1562 LS
2276 
3320 1666 MT 6297 1666 LS
2277 
3320 1769 MT 3320 1769 LT 3511 1769 LT 3518 1810 LT ST
2278 
3320 1850 MT 3320 1850 LT 3511 1850 LT 3518 1810 LT ST
2279 
(3) 3334 1810 WT pop 0 originOffset 37 add RSS
2280 
3518 1810 MT 3518 1810 LT 3525 1769 LT 3908 1769 LT 3915 1810 LT ST
2281 
3518 1810 MT 3518 1810 LT 3525 1850 LT 3908 1850 LT 3915 1810 LT ST
2282 
(4) 3532 1810 WT pop 0 originOffset 37 add RSS
2283 
3915 1810 MT 3915 1810 LT 3922 1769 LT 4305 1769 LT 4312 1810 LT ST
2284 
3915 1810 MT 3915 1810 LT 3922 1850 LT 4305 1850 LT 4312 1810 LT ST
2285 
(5) 3929 1810 WT pop 0 originOffset 37 add RSS
2286 
4312 1810 MT 4312 1810 LT 4319 1769 LT 4702 1769 LT 4709 1810 LT ST
2287 
4312 1810 MT 4312 1810 LT 4319 1850 LT 4702 1850 LT 4709 1810 LT ST
2288 
(6) 4326 1810 WT pop 0 originOffset 37 add RSS
2289 
4709 1810 MT 4709 1810 LT 4716 1769 LT 5099 1769 LT 5106 1810 LT ST
2290 
4709 1810 MT 4709 1810 LT 4716 1850 LT 5099 1850 LT 5106 1810 LT ST
2291 
(7) 4723 1810 WT pop 0 originOffset 37 add RSS
2292 
5106 1810 MT 5106 1810 LT 5113 1769 LT 5496 1769 LT 5503 1810 LT ST
2293 
5106 1810 MT 5106 1810 LT 5113 1850 LT 5496 1850 LT 5503 1810 LT ST
2294 
(0) 5120 1810 WT pop 0 originOffset 37 add RSS
2295 
5503 1810 MT 5503 1810 LT 5510 1769 LT 5893 1769 LT 5900 1810 LT ST
2296 
5503 1810 MT 5503 1810 LT 5510 1850 LT 5893 1850 LT 5900 1810 LT ST
2297 
(1) 5517 1810 WT pop 0 originOffset 37 add RSS
2298 
5900 1810 MT 5900 1810 LT 5907 1769 LT 6297 1769 LT ST
2299 
5900 1810 MT 5900 1810 LT 5907 1850 LT 6297 1850 LT ST
2300 
(2) 5914 1810 WT pop 0 originOffset 37 add RSS
2301 
3320 1913 MT 3320 1913 LT 3511 1913 LT 3518 1954 LT ST
2302 
3320 1994 MT 3320 1994 LT 3511 1994 LT 3518 1954 LT ST
2303 
(3) 3334 1954 WT pop 0 originOffset 37 add RSS
2304 
3518 1954 MT 3518 1954 LT 3525 1913 LT 3908 1913 LT 3915 1954 LT ST
2305 
3518 1954 MT 3518 1954 LT 3525 1994 LT 3908 1994 LT 3915 1954 LT ST
2306 
(4) 3532 1954 WT pop 0 originOffset 37 add RSS
2307 
3915 1954 MT 3915 1954 LT 3922 1913 LT 4305 1913 LT 4312 1954 LT ST
2308 
3915 1954 MT 3915 1954 LT 3922 1994 LT 4305 1994 LT 4312 1954 LT ST
2309 
(5) 3929 1954 WT pop 0 originOffset 37 add RSS
2310 
4312 1954 MT 4312 1954 LT 4319 1913 LT 4702 1913 LT 4709 1954 LT ST
2311 
4312 1954 MT 4312 1954 LT 4319 1994 LT 4702 1994 LT 4709 1954 LT ST
2312 
(6) 4326 1954 WT pop 0 originOffset 37 add RSS
2313 
4709 1954 MT 4709 1954 LT 4716 1913 LT 5099 1913 LT 5106 1954 LT ST
2314 
4709 1954 MT 4709 1954 LT 4716 1994 LT 5099 1994 LT 5106 1954 LT ST
2315 
(7) 4723 1954 WT pop 0 originOffset 37 add RSS
2316 
5106 1954 MT 5106 1954 LT 5113 1913 LT 5496 1913 LT 5503 1954 LT ST
2317 
5106 1954 MT 5106 1954 LT 5113 1994 LT 5496 1994 LT 5503 1954 LT ST
2318 
(0) 5120 1954 WT pop 0 originOffset 37 add RSS
2319 
5503 1954 MT 5503 1954 LT 5510 1913 LT 5893 1913 LT 5900 1954 LT ST
2320 
5503 1954 MT 5503 1954 LT 5510 1994 LT 5893 1994 LT 5900 1954 LT ST
2321 
(1) 5517 1954 WT pop 0 originOffset 37 add RSS
2322 
5900 1954 MT 5900 1954 LT 5907 1913 LT 6297 1913 LT ST
2323 
5900 1954 MT 5900 1954 LT 5907 1994 LT 6297 1994 LT ST
2324 
(2) 5914 1954 WT pop 0 originOffset 37 add RSS
2325 
3320 2057 MT 3320 2057 LT 3511 2057 LT 3518 2098 LT ST
2326 
3320 2138 MT 3320 2138 LT 3511 2138 LT 3518 2098 LT ST
2327 
(2) 3334 2098 WT pop 0 originOffset 37 add RSS
2328 
3518 2098 MT 3518 2098 LT 3525 2057 LT 3908 2057 LT 3915 2098 LT ST
2329 
3518 2098 MT 3518 2098 LT 3525 2138 LT 3908 2138 LT 3915 2098 LT ST
2330 
(3) 3532 2098 WT pop 0 originOffset 37 add RSS
2331 
3915 2098 MT 3915 2098 LT 3922 2057 LT 4305 2057 LT 4312 2098 LT ST
2332 
3915 2098 MT 3915 2098 LT 3922 2138 LT 4305 2138 LT 4312 2098 LT ST
2333 
(4) 3929 2098 WT pop 0 originOffset 37 add RSS
2334 
4312 2098 MT 4312 2098 LT 4319 2057 LT 4702 2057 LT 4709 2098 LT ST
2335 
4312 2098 MT 4312 2098 LT 4319 2138 LT 4702 2138 LT 4709 2098 LT ST
2336 
(5) 4326 2098 WT pop 0 originOffset 37 add RSS
2337 
4709 2098 MT 4709 2098 LT 4716 2057 LT 5099 2057 LT 5106 2098 LT ST
2338 
4709 2098 MT 4709 2098 LT 4716 2138 LT 5099 2138 LT 5106 2098 LT ST
2339 
(6) 4723 2098 WT pop 0 originOffset 37 add RSS
2340 
5106 2098 MT 5106 2098 LT 5113 2057 LT 5496 2057 LT 5503 2098 LT ST
2341 
5106 2098 MT 5106 2098 LT 5113 2138 LT 5496 2138 LT 5503 2098 LT ST
2342 
(7) 5120 2098 WT pop 0 originOffset 37 add RSS
2343 
5503 2098 MT 5503 2098 LT 5510 2057 LT 5893 2057 LT 5900 2098 LT ST
2344 
5503 2098 MT 5503 2098 LT 5510 2138 LT 5893 2138 LT 5900 2098 LT ST
2345 
(0) 5517 2098 WT pop 0 originOffset 37 add RSS
2346 
5900 2098 MT 5900 2098 LT 5907 2057 LT 6297 2057 LT ST
2347 
5900 2098 MT 5900 2098 LT 5907 2138 LT 6297 2138 LT ST
2348 
(1) 5914 2098 WT pop 0 originOffset 37 add RSS
2349 
3320 2201 MT 3320 2201 LT 6297 2201 LT ST
2350 
3320 2282 MT 3320 2282 LT 6297 2282 LT ST
2351 
(03) 3334 2242 WT pop 0 originOffset 37 add RSS
2352 
3320 2386 MT 6297 2386 LS
2353 
3320 2570 MT 6297 2570 LS
2354 
3320 2714 MT 6297 2714 LS
2355 
3320 2777 MT 3320 2777 LT 6297 2777 LT ST
2356 
3320 2858 MT 3320 2858 LT 6297 2858 LT ST
2357 
(01) 3334 2818 WT pop 0 originOffset 37 add RSS
2358 
3320 2921 MT 3320 2921 LT 6297 2921 LT ST
2359 
3320 3002 MT 3320 3002 LT 6297 3002 LT ST
2360 
(00) 3334 2962 WT pop 0 originOffset 37 add RSS
2361 
3320 3106 MT 6297 3106 LS
2362 
3320 3250 MT 6297 3250 LS
2363 
3320 3434 MT 6297 3434 LS
2364 
3320 3578 MT 6297 3578 LS
2365 
3320 3641 MT 3320 3641 LT 6297 3641 LT ST
2366 
3320 3722 MT 3320 3722 LT 6297 3722 LT ST
2367 
(01) 3334 3682 WT pop 0 originOffset 37 add RSS
2368 
3320 3785 MT 3320 3785 LT 6297 3785 LT ST
2369 
3320 3866 MT 3320 3866 LT 6297 3866 LT ST
2370 
(00) 3334 3826 WT pop 0 originOffset 37 add RSS
2371 
3320 3970 MT 6297 3970 LS
2372 
3320 4114 MT 6297 4114 LS
2373 
3320 4298 MT 6297 4298 LS
2374 
3320 4442 MT 6297 4442 LS
2375 
% draw timeline
2376 
3360 4533 MT 3360 4570 LS
2377 
3399 4533 MT 3399 4570 LS
2378 
3439 4533 MT 3439 4570 LS
2379 
3479 4533 MT 3479 4570 LS
2380 
3519 4533 MT 3519 4570 LS
2381 
3558 4533 MT 3558 4570 LS
2382 
3598 4533 MT 3598 4570 LS
2383 
3638 4533 MT 3638 4570 LS
2384 
3677 4533 MT 3677 4570 LS
2385 
3757 4533 MT 3757 4570 LS
2386 
3796 4533 MT 3796 4570 LS
2387 
3836 4533 MT 3836 4570 LS
2388 
3876 4533 MT 3876 4570 LS
2389 
3916 4533 MT 3916 4570 LS
2390 
3955 4533 MT 3955 4570 LS
2391 
3995 4533 MT 3995 4570 LS
2392 
4035 4533 MT 4035 4570 LS
2393 
4074 4533 MT 4074 4570 LS
2394 
3717 4506 MT 3717 4570 LS
2395 
(160) 3717 4649 WT TS RSS
2396 
4154 4533 MT 4154 4570 LS
2397 
4193 4533 MT 4193 4570 LS
2398 
4233 4533 MT 4233 4570 LS
2399 
4273 4533 MT 4273 4570 LS
2400 
4313 4533 MT 4313 4570 LS
2401 
4352 4533 MT 4352 4570 LS
2402 
4392 4533 MT 4392 4570 LS
2403 
4432 4533 MT 4432 4570 LS
2404 
4471 4533 MT 4471 4570 LS
2405 
4114 4506 MT 4114 4570 LS
2406 
4551 4533 MT 4551 4570 LS
2407 
4590 4533 MT 4590 4570 LS
2408 
4630 4533 MT 4630 4570 LS
2409 
4670 4533 MT 4670 4570 LS
2410 
4710 4533 MT 4710 4570 LS
2411 
4749 4533 MT 4749 4570 LS
2412 
4789 4533 MT 4789 4570 LS
2413 
4829 4533 MT 4829 4570 LS
2414 
4868 4533 MT 4868 4570 LS
2415 
4511 4506 MT 4511 4570 LS
2416 
(180) 4511 4649 WT TS RSS
2417 
4948 4533 MT 4948 4570 LS
2418 
4987 4533 MT 4987 4570 LS
2419 
5027 4533 MT 5027 4570 LS
2420 
5067 4533 MT 5067 4570 LS
2421 
5107 4533 MT 5107 4570 LS
2422 
5146 4533 MT 5146 4570 LS
2423 
5186 4533 MT 5186 4570 LS
2424 
5226 4533 MT 5226 4570 LS
2425 
5265 4533 MT 5265 4570 LS
2426 
4908 4506 MT 4908 4570 LS
2427 
5345 4533 MT 5345 4570 LS
2428 
5384 4533 MT 5384 4570 LS
2429 
5424 4533 MT 5424 4570 LS
2430 
5464 4533 MT 5464 4570 LS
2431 
5504 4533 MT 5504 4570 LS
2432 
5543 4533 MT 5543 4570 LS
2433 
5583 4533 MT 5583 4570 LS
2434 
5623 4533 MT 5623 4570 LS
2435 
5662 4533 MT 5662 4570 LS
2436 
5305 4506 MT 5305 4570 LS
2437 
(200) 5305 4649 WT TS RSS
2438 
5742 4533 MT 5742 4570 LS
2439 
5781 4533 MT 5781 4570 LS
2440 
5821 4533 MT 5821 4570 LS
2441 
5861 4533 MT 5861 4570 LS
2442 
5901 4533 MT 5901 4570 LS
2443 
5940 4533 MT 5940 4570 LS
2444 
5980 4533 MT 5980 4570 LS
2445 
6020 4533 MT 6020 4570 LS
2446 
6059 4533 MT 6059 4570 LS
2447 
5702 4506 MT 5702 4570 LS
2448 
6139 4533 MT 6139 4570 LS
2449 
6178 4533 MT 6178 4570 LS
2450 
6218 4533 MT 6218 4570 LS
2451 
6258 4533 MT 6258 4570 LS
2452 
6298 4533 MT 6298 4570 LS
2453 
6337 4533 MT 6337 4570 LS
2454 
6377 4533 MT 6377 4570 LS
2455 
6417 4533 MT 6417 4570 LS
2456 
6456 4533 MT 6456 4570 LS
2457 
6099 4506 MT 6099 4570 LS
2458 
(220) 6099 4649 WT TS RSS
2459 
% draw grid
2460 
3717 300 MT 3717 4506 LS
2461 
4114 300 MT 4114 4506 LS
2462 
4511 300 MT 4511 4506 LS
2463 
4908 300 MT 4908 4506 LS
2464 
5305 300 MT 5305 4506 LS
2465 
5702 300 MT 5702 4506 LS
2466 
6099 300 MT 6099 4506 LS
2467 
% draw waveforms
2468 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dw) 3283 409 WT TSE RSS
2469 
3710 300 MT 3724 300 LS
2470 
4107 300 MT 4121 300 LS
2471 
4504 300 MT 4518 300 LS
2472 
4901 300 MT 4915 300 LS
2473 
5298 300 MT 5312 300 LS
2474 
5695 300 MT 5709 300 LS
2475 
6092 300 MT 6106 300 LS
2476 
3320 329 MT 3320 329 LT 6297 329 LT ST
2477 
3320 410 MT 3320 410 LT 6297 410 LT ST
2478 
(00000020) 3334 370 WT pop 0 originOffset 37 add RSS
2479 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/aw) 3283 553 WT TSE RSS
2480 
3710 444 MT 3724 444 LS
2481 
4107 444 MT 4121 444 LS
2482 
4504 444 MT 4518 444 LS
2483 
4901 444 MT 4915 444 LS
2484 
5298 444 MT 5312 444 LS
2485 
5695 444 MT 5709 444 LS
2486 
6092 444 MT 6106 444 LS
2487 
3320 473 MT 3320 473 LT 6297 473 LT ST
2488 
3320 554 MT 3320 554 LT 6297 554 LT ST
2489 
(00000005) 3334 514 WT pop 0 originOffset 37 add RSS
2490 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/clk) 3283 697 WT TSE RSS
2491 
3710 588 MT 3724 588 LS
2492 
4107 588 MT 4121 588 LS
2493 
4504 588 MT 4518 588 LS
2494 
4901 588 MT 4915 588 LS
2495 
5298 588 MT 5312 588 LS
2496 
5695 588 MT 5709 588 LS
2497 
6092 588 MT 6106 588 LS
2498 
3320 618 MT 3320 698 LS
2499 
3320 698 MT 3518 698 LS
2500 
3518 698 MT 3518 618 LS
2501 
3518 618 MT 3717 618 LS
2502 
3717 618 MT 3717 698 LS
2503 
3717 698 MT 3915 698 LS
2504 
3915 698 MT 3915 618 LS
2505 
3915 618 MT 4114 618 LS
2506 
4114 618 MT 4114 698 LS
2507 
4114 698 MT 4312 698 LS
2508 
4312 698 MT 4312 618 LS
2509 
4312 618 MT 4511 618 LS
2510 
4511 618 MT 4511 698 LS
2511 
4511 698 MT 4709 698 LS
2512 
4709 698 MT 4709 618 LS
2513 
4709 618 MT 4908 618 LS
2514 
4908 618 MT 4908 698 LS
2515 
4908 698 MT 5106 698 LS
2516 
5106 698 MT 5106 618 LS
2517 
5106 618 MT 5305 618 LS
2518 
5305 618 MT 5305 698 LS
2519 
5305 698 MT 5503 698 LS
2520 
5503 698 MT 5503 618 LS
2521 
5503 618 MT 5702 618 LS
2522 
5702 618 MT 5702 698 LS
2523 
5702 698 MT 5900 698 LS
2524 
5900 698 MT 5900 618 LS
2525 
5900 618 MT 6099 618 LS
2526 
6099 618 MT 6099 698 LS
2527 
6099 698 MT 6297 698 LS
2528 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rst) 3283 841 WT TSE RSS
2529 
3710 732 MT 3724 732 LS
2530 
4107 732 MT 4121 732 LS
2531 
4504 732 MT 4518 732 LS
2532 
4901 732 MT 4915 732 LS
2533 
5298 732 MT 5312 732 LS
2534 
5695 732 MT 5709 732 LS
2535 
6092 732 MT 6106 732 LS
2536 
3320 842 MT 6297 842 LS
2537 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/supv) 3283 985 WT TSE RSS
2538 
3710 876 MT 3724 876 LS
2539 
4107 876 MT 4121 876 LS
2540 
4504 876 MT 4518 876 LS
2541 
4901 876 MT 4915 876 LS
2542 
5298 876 MT 5312 876 LS
2543 
5695 876 MT 5709 876 LS
2544 
6092 876 MT 6106 876 LS
2545 
3320 906 MT 6297 906 LS
2546 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/wb_freeze) 3283 1129 WT TSE RSS
2547 
3710 1020 MT 3724 1020 LS
2548 
4107 1020 MT 4121 1020 LS
2549 
4504 1020 MT 4518 1020 LS
2550 
4901 1020 MT 4915 1020 LS
2551 
5298 1020 MT 5312 1020 LS
2552 
5695 1020 MT 5709 1020 LS
2553 
6092 1020 MT 6106 1020 LS
2554 
3320 1130 MT 6297 1130 LS
2555 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw) 3283 1273 WT TSE RSS
2556 
3710 1164 MT 3724 1164 LS
2557 
4107 1164 MT 4121 1164 LS
2558 
4504 1164 MT 4518 1164 LS
2559 
4901 1164 MT 4915 1164 LS
2560 
5298 1164 MT 5312 1164 LS
2561 
5695 1164 MT 5709 1164 LS
2562 
6092 1164 MT 6106 1164 LS
2563 
3320 1193 MT 3320 1193 LT 6297 1193 LT ST
2564 
3320 1274 MT 3320 1274 LT 6297 1274 LT ST
2565 
(03) 3334 1234 WT pop 0 originOffset 37 add RSS
2566 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw) 3283 1417 WT TSE RSS
2567 
3710 1308 MT 3724 1308 LS
2568 
4107 1308 MT 4121 1308 LS
2569 
4504 1308 MT 4518 1308 LS
2570 
4901 1308 MT 4915 1308 LS
2571 
5298 1308 MT 5312 1308 LS
2572 
5695 1308 MT 5709 1308 LS
2573 
6092 1308 MT 6106 1308 LS
2574 
3320 1378 MT 6297 1378 LS
2575 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we) 3283 1561 WT TSE RSS
2576 
3710 1452 MT 3724 1452 LS
2577 
4107 1452 MT 4121 1452 LS
2578 
4504 1452 MT 4518 1452 LS
2579 
4901 1452 MT 4915 1452 LS
2580 
5298 1452 MT 5312 1452 LS
2581 
5695 1452 MT 5709 1452 LS
2582 
6092 1452 MT 6106 1452 LS
2583 
3320 1562 MT 6297 1562 LS
2584 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/flushpipe) 3283 1705 WT TSE RSS
2585 
3710 1596 MT 3724 1596 LS
2586 
4107 1596 MT 4121 1596 LS
2587 
4504 1596 MT 4518 1596 LS
2588 
4901 1596 MT 4915 1596 LS
2589 
5298 1596 MT 5312 1596 LS
2590 
5695 1596 MT 5709 1596 LS
2591 
6092 1596 MT 6106 1596 LS
2592 
3320 1666 MT 6297 1666 LS
2593 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_read) 3283 1849 WT TSE RSS
2594 
3710 1740 MT 3724 1740 LS
2595 
4107 1740 MT 4121 1740 LS
2596 
4504 1740 MT 4518 1740 LS
2597 
4901 1740 MT 4915 1740 LS
2598 
5298 1740 MT 5312 1740 LS
2599 
5695 1740 MT 5709 1740 LS
2600 
6092 1740 MT 6106 1740 LS
2601 
3320 1769 MT 3320 1769 LT 3511 1769 LT 3518 1810 LT ST
2602 
3320 1850 MT 3320 1850 LT 3511 1850 LT 3518 1810 LT ST
2603 
(3) 3334 1810 WT pop 0 originOffset 37 add RSS
2604 
3518 1810 MT 3518 1810 LT 3525 1769 LT 3908 1769 LT 3915 1810 LT ST
2605 
3518 1810 MT 3518 1810 LT 3525 1850 LT 3908 1850 LT 3915 1810 LT ST
2606 
(4) 3532 1810 WT pop 0 originOffset 37 add RSS
2607 
3915 1810 MT 3915 1810 LT 3922 1769 LT 4305 1769 LT 4312 1810 LT ST
2608 
3915 1810 MT 3915 1810 LT 3922 1850 LT 4305 1850 LT 4312 1810 LT ST
2609 
(5) 3929 1810 WT pop 0 originOffset 37 add RSS
2610 
4312 1810 MT 4312 1810 LT 4319 1769 LT 4702 1769 LT 4709 1810 LT ST
2611 
4312 1810 MT 4312 1810 LT 4319 1850 LT 4702 1850 LT 4709 1810 LT ST
2612 
(6) 4326 1810 WT pop 0 originOffset 37 add RSS
2613 
4709 1810 MT 4709 1810 LT 4716 1769 LT 5099 1769 LT 5106 1810 LT ST
2614 
4709 1810 MT 4709 1810 LT 4716 1850 LT 5099 1850 LT 5106 1810 LT ST
2615 
(7) 4723 1810 WT pop 0 originOffset 37 add RSS
2616 
5106 1810 MT 5106 1810 LT 5113 1769 LT 5496 1769 LT 5503 1810 LT ST
2617 
5106 1810 MT 5106 1810 LT 5113 1850 LT 5496 1850 LT 5503 1810 LT ST
2618 
(0) 5120 1810 WT pop 0 originOffset 37 add RSS
2619 
5503 1810 MT 5503 1810 LT 5510 1769 LT 5893 1769 LT 5900 1810 LT ST
2620 
5503 1810 MT 5503 1810 LT 5510 1850 LT 5893 1850 LT 5900 1810 LT ST
2621 
(1) 5517 1810 WT pop 0 originOffset 37 add RSS
2622 
5900 1810 MT 5900 1810 LT 5907 1769 LT 6297 1769 LT ST
2623 
5900 1810 MT 5900 1810 LT 5907 1850 LT 6297 1850 LT ST
2624 
(2) 5914 1810 WT pop 0 originOffset 37 add RSS
2625 
(...0_cpu/or1200_cpu/or1200_rf_top/current_thread_read_out) 3283 1993 WT TSE RSS
2626 
3710 1884 MT 3724 1884 LS
2627 
4107 1884 MT 4121 1884 LS
2628 
4504 1884 MT 4518 1884 LS
2629 
4901 1884 MT 4915 1884 LS
2630 
5298 1884 MT 5312 1884 LS
2631 
5695 1884 MT 5709 1884 LS
2632 
6092 1884 MT 6106 1884 LS
2633 
3320 1913 MT 3320 1913 LT 3511 1913 LT 3518 1954 LT ST
2634 
3320 1994 MT 3320 1994 LT 3511 1994 LT 3518 1954 LT ST
2635 
(3) 3334 1954 WT pop 0 originOffset 37 add RSS
2636 
3518 1954 MT 3518 1954 LT 3525 1913 LT 3908 1913 LT 3915 1954 LT ST
2637 
3518 1954 MT 3518 1954 LT 3525 1994 LT 3908 1994 LT 3915 1954 LT ST
2638 
(4) 3532 1954 WT pop 0 originOffset 37 add RSS
2639 
3915 1954 MT 3915 1954 LT 3922 1913 LT 4305 1913 LT 4312 1954 LT ST
2640 
3915 1954 MT 3915 1954 LT 3922 1994 LT 4305 1994 LT 4312 1954 LT ST
2641 
(5) 3929 1954 WT pop 0 originOffset 37 add RSS
2642 
4312 1954 MT 4312 1954 LT 4319 1913 LT 4702 1913 LT 4709 1954 LT ST
2643 
4312 1954 MT 4312 1954 LT 4319 1994 LT 4702 1994 LT 4709 1954 LT ST
2644 
(6) 4326 1954 WT pop 0 originOffset 37 add RSS
2645 
4709 1954 MT 4709 1954 LT 4716 1913 LT 5099 1913 LT 5106 1954 LT ST
2646 
4709 1954 MT 4709 1954 LT 4716 1994 LT 5099 1994 LT 5106 1954 LT ST
2647 
(7) 4723 1954 WT pop 0 originOffset 37 add RSS
2648 
5106 1954 MT 5106 1954 LT 5113 1913 LT 5496 1913 LT 5503 1954 LT ST
2649 
5106 1954 MT 5106 1954 LT 5113 1994 LT 5496 1994 LT 5503 1954 LT ST
2650 
(0) 5120 1954 WT pop 0 originOffset 37 add RSS
2651 
5503 1954 MT 5503 1954 LT 5510 1913 LT 5893 1913 LT 5900 1954 LT ST
2652 
5503 1954 MT 5503 1954 LT 5510 1994 LT 5893 1994 LT 5900 1954 LT ST
2653 
(1) 5517 1954 WT pop 0 originOffset 37 add RSS
2654 
5900 1954 MT 5900 1954 LT 5907 1913 LT 6297 1913 LT ST
2655 
5900 1954 MT 5900 1954 LT 5907 1994 LT 6297 1994 LT ST
2656 
(2) 5914 1954 WT pop 0 originOffset 37 add RSS
2657 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_write) 3283 2137 WT TSE RSS
2658 
3710 2028 MT 3724 2028 LS
2659 
4107 2028 MT 4121 2028 LS
2660 
4504 2028 MT 4518 2028 LS
2661 
4901 2028 MT 4915 2028 LS
2662 
5298 2028 MT 5312 2028 LS
2663 
5695 2028 MT 5709 2028 LS
2664 
6092 2028 MT 6106 2028 LS
2665 
3320 2057 MT 3320 2057 LT 3511 2057 LT 3518 2098 LT ST
2666 
3320 2138 MT 3320 2138 LT 3511 2138 LT 3518 2098 LT ST
2667 
(2) 3334 2098 WT pop 0 originOffset 37 add RSS
2668 
3518 2098 MT 3518 2098 LT 3525 2057 LT 3908 2057 LT 3915 2098 LT ST
2669 
3518 2098 MT 3518 2098 LT 3525 2138 LT 3908 2138 LT 3915 2098 LT ST
2670 
(3) 3532 2098 WT pop 0 originOffset 37 add RSS
2671 
3915 2098 MT 3915 2098 LT 3922 2057 LT 4305 2057 LT 4312 2098 LT ST
2672 
3915 2098 MT 3915 2098 LT 3922 2138 LT 4305 2138 LT 4312 2098 LT ST
2673 
(4) 3929 2098 WT pop 0 originOffset 37 add RSS
2674 
4312 2098 MT 4312 2098 LT 4319 2057 LT 4702 2057 LT 4709 2098 LT ST
2675 
4312 2098 MT 4312 2098 LT 4319 2138 LT 4702 2138 LT 4709 2098 LT ST
2676 
(5) 4326 2098 WT pop 0 originOffset 37 add RSS
2677 
4709 2098 MT 4709 2098 LT 4716 2057 LT 5099 2057 LT 5106 2098 LT ST
2678 
4709 2098 MT 4709 2098 LT 4716 2138 LT 5099 2138 LT 5106 2098 LT ST
2679 
(6) 4723 2098 WT pop 0 originOffset 37 add RSS
2680 
5106 2098 MT 5106 2098 LT 5113 2057 LT 5496 2057 LT 5503 2098 LT ST
2681 
5106 2098 MT 5106 2098 LT 5113 2138 LT 5496 2138 LT 5503 2098 LT ST
2682 
(7) 5120 2098 WT pop 0 originOffset 37 add RSS
2683 
5503 2098 MT 5503 2098 LT 5510 2057 LT 5893 2057 LT 5900 2098 LT ST
2684 
5503 2098 MT 5503 2098 LT 5510 2138 LT 5893 2138 LT 5900 2098 LT ST
2685 
(0) 5517 2098 WT pop 0 originOffset 37 add RSS
2686 
5900 2098 MT 5900 2098 LT 5907 2057 LT 6297 2057 LT ST
2687 
5900 2098 MT 5900 2098 LT 5907 2138 LT 6297 2138 LT ST
2688 
(1) 5914 2098 WT pop 0 originOffset 37 add RSS
2689 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw2) 3283 2281 WT TSE RSS
2690 
3710 2172 MT 3724 2172 LS
2691 
4107 2172 MT 4121 2172 LS
2692 
4504 2172 MT 4518 2172 LS
2693 
4901 2172 MT 4915 2172 LS
2694 
5298 2172 MT 5312 2172 LS
2695 
5695 2172 MT 5709 2172 LS
2696 
6092 2172 MT 6106 2172 LS
2697 
3320 2201 MT 3320 2201 LT 6297 2201 LT ST
2698 
3320 2282 MT 3320 2282 LT 6297 2282 LT ST
2699 
(03) 3334 2242 WT pop 0 originOffset 37 add RSS
2700 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw2) 3283 2425 WT TSE RSS
2701 
3710 2316 MT 3724 2316 LS
2702 
4107 2316 MT 4121 2316 LS
2703 
4504 2316 MT 4518 2316 LS
2704 
4901 2316 MT 4915 2316 LS
2705 
5298 2316 MT 5312 2316 LS
2706 
5695 2316 MT 5709 2316 LS
2707 
6092 2316 MT 6106 2316 LS
2708 
3320 2386 MT 6297 2386 LS
2709 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2) 3283 2569 WT TSE RSS
2710 
3710 2460 MT 3724 2460 LS
2711 
4107 2460 MT 4121 2460 LS
2712 
4504 2460 MT 4518 2460 LS
2713 
4901 2460 MT 4915 2460 LS
2714 
5298 2460 MT 5312 2460 LS
2715 
5695 2460 MT 5709 2460 LS
2716 
6092 2460 MT 6106 2460 LS
2717 
3320 2570 MT 6297 2570 LS
2718 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/id_freeze) 3283 2713 WT TSE RSS
2719 
3710 2604 MT 3724 2604 LS
2720 
4107 2604 MT 4121 2604 LS
2721 
4504 2604 MT 4518 2604 LS
2722 
4901 2604 MT 4915 2604 LS
2723 
5298 2604 MT 5312 2604 LS
2724 
5695 2604 MT 5709 2604 LS
2725 
6092 2604 MT 6106 2604 LS
2726 
3320 2714 MT 6297 2714 LS
2727 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra) 3283 2857 WT TSE RSS
2728 
3710 2748 MT 3724 2748 LS
2729 
4107 2748 MT 4121 2748 LS
2730 
4504 2748 MT 4518 2748 LS
2731 
4901 2748 MT 4915 2748 LS
2732 
5298 2748 MT 5312 2748 LS
2733 
5695 2748 MT 5709 2748 LS
2734 
6092 2748 MT 6106 2748 LS
2735 
3320 2777 MT 3320 2777 LT 6297 2777 LT ST
2736 
3320 2858 MT 3320 2858 LT 6297 2858 LT ST
2737 
(01) 3334 2818 WT pop 0 originOffset 37 add RSS
2738 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb) 3283 3001 WT TSE RSS
2739 
3710 2892 MT 3724 2892 LS
2740 
4107 2892 MT 4121 2892 LS
2741 
4504 2892 MT 4518 2892 LS
2742 
4901 2892 MT 4915 2892 LS
2743 
5298 2892 MT 5312 2892 LS
2744 
5695 2892 MT 5709 2892 LS
2745 
6092 2892 MT 6106 2892 LS
2746 
3320 2921 MT 3320 2921 LT 6297 2921 LT ST
2747 
3320 3002 MT 3320 3002 LT 6297 3002 LT ST
2748 
(00) 3334 2962 WT pop 0 originOffset 37 add RSS
2749 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa) 3283 3145 WT TSE RSS
2750 
3710 3036 MT 3724 3036 LS
2751 
4107 3036 MT 4121 3036 LS
2752 
4504 3036 MT 4518 3036 LS
2753 
4901 3036 MT 4915 3036 LS
2754 
5298 3036 MT 5312 3036 LS
2755 
5695 3036 MT 5709 3036 LS
2756 
6092 3036 MT 6106 3036 LS
2757 
3320 3106 MT 6297 3106 LS
2758 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab) 3283 3289 WT TSE RSS
2759 
3710 3180 MT 3724 3180 LS
2760 
4107 3180 MT 4121 3180 LS
2761 
4504 3180 MT 4518 3180 LS
2762 
4901 3180 MT 4915 3180 LS
2763 
5298 3180 MT 5312 3180 LS
2764 
5695 3180 MT 5709 3180 LS
2765 
6092 3180 MT 6106 3180 LS
2766 
3320 3250 MT 6297 3250 LS
2767 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda) 3283 3433 WT TSE RSS
2768 
3710 3324 MT 3724 3324 LS
2769 
4107 3324 MT 4121 3324 LS
2770 
4504 3324 MT 4518 3324 LS
2771 
4901 3324 MT 4915 3324 LS
2772 
5298 3324 MT 5312 3324 LS
2773 
5695 3324 MT 5709 3324 LS
2774 
6092 3324 MT 6106 3324 LS
2775 
3320 3434 MT 6297 3434 LS
2776 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb) 3283 3577 WT TSE RSS
2777 
3710 3468 MT 3724 3468 LS
2778 
4107 3468 MT 4121 3468 LS
2779 
4504 3468 MT 4518 3468 LS
2780 
4901 3468 MT 4915 3468 LS
2781 
5298 3468 MT 5312 3468 LS
2782 
5695 3468 MT 5709 3468 LS
2783 
6092 3468 MT 6106 3468 LS
2784 
3320 3578 MT 6297 3578 LS
2785 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra2) 3283 3721 WT TSE RSS
2786 
3710 3612 MT 3724 3612 LS
2787 
4107 3612 MT 4121 3612 LS
2788 
4504 3612 MT 4518 3612 LS
2789 
4901 3612 MT 4915 3612 LS
2790 
5298 3612 MT 5312 3612 LS
2791 
5695 3612 MT 5709 3612 LS
2792 
6092 3612 MT 6106 3612 LS
2793 
3320 3641 MT 3320 3641 LT 6297 3641 LT ST
2794 
3320 3722 MT 3320 3722 LT 6297 3722 LT ST
2795 
(01) 3334 3682 WT pop 0 originOffset 37 add RSS
2796 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb2) 3283 3865 WT TSE RSS
2797 
3710 3756 MT 3724 3756 LS
2798 
4107 3756 MT 4121 3756 LS
2799 
4504 3756 MT 4518 3756 LS
2800 
4901 3756 MT 4915 3756 LS
2801 
5298 3756 MT 5312 3756 LS
2802 
5695 3756 MT 5709 3756 LS
2803 
6092 3756 MT 6106 3756 LS
2804 
3320 3785 MT 3320 3785 LT 6297 3785 LT ST
2805 
3320 3866 MT 3320 3866 LT 6297 3866 LT ST
2806 
(00) 3334 3826 WT pop 0 originOffset 37 add RSS
2807 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2) 3283 4009 WT TSE RSS
2808 
3710 3900 MT 3724 3900 LS
2809 
4107 3900 MT 4121 3900 LS
2810 
4504 3900 MT 4518 3900 LS
2811 
4901 3900 MT 4915 3900 LS
2812 
5298 3900 MT 5312 3900 LS
2813 
5695 3900 MT 5709 3900 LS
2814 
6092 3900 MT 6106 3900 LS
2815 
3320 3970 MT 6297 3970 LS
2816 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2) 3283 4153 WT TSE RSS
2817 
3710 4044 MT 3724 4044 LS
2818 
4107 4044 MT 4121 4044 LS
2819 
4504 4044 MT 4518 4044 LS
2820 
4901 4044 MT 4915 4044 LS
2821 
5298 4044 MT 5312 4044 LS
2822 
5695 4044 MT 5709 4044 LS
2823 
6092 4044 MT 6106 4044 LS
2824 
3320 4114 MT 6297 4114 LS
2825 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda2) 3283 4297 WT TSE RSS
2826 
3710 4188 MT 3724 4188 LS
2827 
4107 4188 MT 4121 4188 LS
2828 
4504 4188 MT 4518 4188 LS
2829 
4901 4188 MT 4915 4188 LS
2830 
5298 4188 MT 5312 4188 LS
2831 
5695 4188 MT 5709 4188 LS
2832 
6092 4188 MT 6106 4188 LS
2833 
3320 4298 MT 6297 4298 LS
2834 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb2) 3283 4441 WT TSE RSS
2835 
3710 4332 MT 3724 4332 LS
2836 
4107 4332 MT 4121 4332 LS
2837 
4504 4332 MT 4518 4332 LS
2838 
4901 4332 MT 4915 4332 LS
2839 
5298 4332 MT 5312 4332 LS
2840 
5695 4332 MT 5709 4332 LS
2841 
6092 4332 MT 6106 4332 LS
2842 
3320 4442 MT 6297 4442 LS
2843 
% draw footer
2844 
(Entity:tb_or1200_cpu  Architecture:  Date: Sat Aug 14 01:25:01 EDT 2004   Row: 3 Page: 5) 300 4799 WT TSW RSS
2845 
grestore
2846 
showpage
2847 
%%Page: 6 6
2848 
gsave
2849 
90 rotate 0.12 dup neg scale
2850 
% dump string table
2851 
/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
2852 
/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
2853 
/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
2854 
/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
2855 
/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
2856 
/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
2857 
/ARC {5 -2 roll SX 5 2 roll arc} def
2858 
/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3320 def/REdge 5699 def/LabelWidth 3283 def
2859 
/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
2860 
/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
2861 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dw) MLW
2862 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/aw) MLW
2863 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/clk) MLW
2864 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rst) MLW
2865 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/supv) MLW
2866 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/wb_freeze) MLW
2867 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw) MLW
2868 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw) MLW
2869 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we) MLW
2870 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/flushpipe) MLW
2871 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_read) MLW
2872 
(...0_cpu/or1200_cpu/or1200_rf_top/current_thread_read_out) MLW
2873 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_write) MLW
2874 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw2) MLW
2875 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw2) MLW
2876 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2) MLW
2877 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/id_freeze) MLW
2878 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra) MLW
2879 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb) MLW
2880 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa) MLW
2881 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab) MLW
2882 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda) MLW
2883 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb) MLW
2884 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra2) MLW
2885 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb2) MLW
2886 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2) MLW
2887 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2) MLW
2888 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda2) MLW
2889 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb2) MLW
2890 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_cs) MLW
2891 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_write) MLW
2892 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_addr) MLW
2893 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_i) MLW
2894 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o) MLW
2895 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_1) MLW
2896 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_2) MLW
2897 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_3) MLW
2898 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_4) MLW
2899 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_5) MLW
2900 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_6) MLW
2901 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_7) MLW
2902 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_8) MLW
2903 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_1) MLW
2904 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_2) MLW
2905 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_3) MLW
2906 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_4) MLW
2907 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_5) MLW
2908 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_6) MLW
2909 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_7) MLW
2910 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_8) MLW
2911 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_1) MLW
2912 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_2) MLW
2913 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_3) MLW
2914 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_4) MLW
2915 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_5) MLW
2916 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_6) MLW
2917 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_7) MLW
2918 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_8) MLW
2919 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_1) MLW
2920 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_2) MLW
2921 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_3) MLW
2922 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_4) MLW
2923 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_5) MLW
2924 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_6) MLW
2925 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_7) MLW
2926 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_8) MLW
2927 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_1) MLW
2928 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_2) MLW
2929 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_3) MLW
2930 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_4) MLW
2931 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_5) MLW
2932 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_6) MLW
2933 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_7) MLW
2934 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_8) MLW
2935 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_1) MLW
2936 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_2) MLW
2937 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_3) MLW
2938 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_4) MLW
2939 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_5) MLW
2940 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_6) MLW
2941 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_7) MLW
2942 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_8) MLW
2943 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_1) MLW
2944 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_2) MLW
2945 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_3) MLW
2946 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_4) MLW
2947 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_5) MLW
2948 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_6) MLW
2949 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_7) MLW
2950 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_8) MLW
2951 
% draw waveform shading
2952 
[] 0 SD
2953 
2.995 setlinewidth
2954 
 
2955 
 
2956 
 
2957 
3320 410 MT 6297 410 LS
2958 
3320 514 MT 6297 514 LS
2959 
3320 658 MT 6297 658 LS
2960 
3320 802 MT 6297 802 LS
2961 
3320 946 MT 6297 946 LS
2962 
3320 1090 MT 6297 1090 LS
2963 
3320 1234 MT 6297 1234 LS
2964 
3320 1378 MT 6297 1378 LS
2965 
% draw timeline
2966 
3360 4533 MT 3360 4570 LS
2967 
3399 4533 MT 3399 4570 LS
2968 
3439 4533 MT 3439 4570 LS
2969 
3479 4533 MT 3479 4570 LS
2970 
3519 4533 MT 3519 4570 LS
2971 
3558 4533 MT 3558 4570 LS
2972 
3598 4533 MT 3598 4570 LS
2973 
3638 4533 MT 3638 4570 LS
2974 
3677 4533 MT 3677 4570 LS
2975 
3757 4533 MT 3757 4570 LS
2976 
3796 4533 MT 3796 4570 LS
2977 
3836 4533 MT 3836 4570 LS
2978 
3876 4533 MT 3876 4570 LS
2979 
3916 4533 MT 3916 4570 LS
2980 
3955 4533 MT 3955 4570 LS
2981 
3995 4533 MT 3995 4570 LS
2982 
4035 4533 MT 4035 4570 LS
2983 
4074 4533 MT 4074 4570 LS
2984 
3717 4506 MT 3717 4570 LS
2985 
(160) 3717 4649 WT TS RSS
2986 
4154 4533 MT 4154 4570 LS
2987 
4193 4533 MT 4193 4570 LS
2988 
4233 4533 MT 4233 4570 LS
2989 
4273 4533 MT 4273 4570 LS
2990 
4313 4533 MT 4313 4570 LS
2991 
4352 4533 MT 4352 4570 LS
2992 
4392 4533 MT 4392 4570 LS
2993 
4432 4533 MT 4432 4570 LS
2994 
4471 4533 MT 4471 4570 LS
2995 
4114 4506 MT 4114 4570 LS
2996 
4551 4533 MT 4551 4570 LS
2997 
4590 4533 MT 4590 4570 LS
2998 
4630 4533 MT 4630 4570 LS
2999 
4670 4533 MT 4670 4570 LS
3000 
4710 4533 MT 4710 4570 LS
3001 
4749 4533 MT 4749 4570 LS
3002 
4789 4533 MT 4789 4570 LS
3003 
4829 4533 MT 4829 4570 LS
3004 
4868 4533 MT 4868 4570 LS
3005 
4511 4506 MT 4511 4570 LS
3006 
(180) 4511 4649 WT TS RSS
3007 
4948 4533 MT 4948 4570 LS
3008 
4987 4533 MT 4987 4570 LS
3009 
5027 4533 MT 5027 4570 LS
3010 
5067 4533 MT 5067 4570 LS
3011 
5107 4533 MT 5107 4570 LS
3012 
5146 4533 MT 5146 4570 LS
3013 
5186 4533 MT 5186 4570 LS
3014 
5226 4533 MT 5226 4570 LS
3015 
5265 4533 MT 5265 4570 LS
3016 
4908 4506 MT 4908 4570 LS
3017 
5345 4533 MT 5345 4570 LS
3018 
5384 4533 MT 5384 4570 LS
3019 
5424 4533 MT 5424 4570 LS
3020 
5464 4533 MT 5464 4570 LS
3021 
5504 4533 MT 5504 4570 LS
3022 
5543 4533 MT 5543 4570 LS
3023 
5583 4533 MT 5583 4570 LS
3024 
5623 4533 MT 5623 4570 LS
3025 
5662 4533 MT 5662 4570 LS
3026 
5305 4506 MT 5305 4570 LS
3027 
(200) 5305 4649 WT TS RSS
3028 
5742 4533 MT 5742 4570 LS
3029 
5781 4533 MT 5781 4570 LS
3030 
5821 4533 MT 5821 4570 LS
3031 
5861 4533 MT 5861 4570 LS
3032 
5901 4533 MT 5901 4570 LS
3033 
5940 4533 MT 5940 4570 LS
3034 
5980 4533 MT 5980 4570 LS
3035 
6020 4533 MT 6020 4570 LS
3036 
6059 4533 MT 6059 4570 LS
3037 
5702 4506 MT 5702 4570 LS
3038 
6139 4533 MT 6139 4570 LS
3039 
6178 4533 MT 6178 4570 LS
3040 
6218 4533 MT 6218 4570 LS
3041 
6258 4533 MT 6258 4570 LS
3042 
6298 4533 MT 6298 4570 LS
3043 
6337 4533 MT 6337 4570 LS
3044 
6377 4533 MT 6377 4570 LS
3045 
6417 4533 MT 6417 4570 LS
3046 
6456 4533 MT 6456 4570 LS
3047 
6099 4506 MT 6099 4570 LS
3048 
(220) 6099 4649 WT TS RSS
3049 
% draw grid
3050 
3717 300 MT 3717 4506 LS
3051 
4114 300 MT 4114 4506 LS
3052 
4511 300 MT 4511 4506 LS
3053 
4908 300 MT 4908 4506 LS
3054 
5305 300 MT 5305 4506 LS
3055 
5702 300 MT 5702 4506 LS
3056 
6099 300 MT 6099 4506 LS
3057 
% draw waveforms
3058 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_cs) 3283 409 WT TSE RSS
3059 
3710 300 MT 3724 300 LS
3060 
4107 300 MT 4121 300 LS
3061 
4504 300 MT 4518 300 LS
3062 
4901 300 MT 4915 300 LS
3063 
5298 300 MT 5312 300 LS
3064 
5695 300 MT 5709 300 LS
3065 
6092 300 MT 6106 300 LS
3066 
3320 410 MT 6297 410 LS
3067 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_write) 3283 553 WT TSE RSS
3068 
3710 444 MT 3724 444 LS
3069 
4107 444 MT 4121 444 LS
3070 
4504 444 MT 4518 444 LS
3071 
4901 444 MT 4915 444 LS
3072 
5298 444 MT 5312 444 LS
3073 
5695 444 MT 5709 444 LS
3074 
6092 444 MT 6106 444 LS
3075 
3320 514 MT 6297 514 LS
3076 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_addr) 3283 697 WT TSE RSS
3077 
3710 588 MT 3724 588 LS
3078 
4107 588 MT 4121 588 LS
3079 
4504 588 MT 4518 588 LS
3080 
4901 588 MT 4915 588 LS
3081 
5298 588 MT 5312 588 LS
3082 
5695 588 MT 5709 588 LS
3083 
6092 588 MT 6106 588 LS
3084 
3320 658 MT 6297 658 LS
3085 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_i) 3283 841 WT TSE RSS
3086 
3710 732 MT 3724 732 LS
3087 
4107 732 MT 4121 732 LS
3088 
4504 732 MT 4518 732 LS
3089 
4901 732 MT 4915 732 LS
3090 
5298 732 MT 5312 732 LS
3091 
5695 732 MT 5709 732 LS
3092 
6092 732 MT 6106 732 LS
3093 
3320 802 MT 6297 802 LS
3094 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o) 3283 985 WT TSE RSS
3095 
3710 876 MT 3724 876 LS
3096 
4107 876 MT 4121 876 LS
3097 
4504 876 MT 4518 876 LS
3098 
4901 876 MT 4915 876 LS
3099 
5298 876 MT 5312 876 LS
3100 
5695 876 MT 5709 876 LS
3101 
6092 876 MT 6106 876 LS
3102 
3320 946 MT 6297 946 LS
3103 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_1) 3283 1129 WT TSE RSS
3104 
3710 1020 MT 3724 1020 LS
3105 
4107 1020 MT 4121 1020 LS
3106 
4504 1020 MT 4518 1020 LS
3107 
4901 1020 MT 4915 1020 LS
3108 
5298 1020 MT 5312 1020 LS
3109 
5695 1020 MT 5709 1020 LS
3110 
6092 1020 MT 6106 1020 LS
3111 
3320 1090 MT 6297 1090 LS
3112 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_2) 3283 1273 WT TSE RSS
3113 
3710 1164 MT 3724 1164 LS
3114 
4107 1164 MT 4121 1164 LS
3115 
4504 1164 MT 4518 1164 LS
3116 
4901 1164 MT 4915 1164 LS
3117 
5298 1164 MT 5312 1164 LS
3118 
5695 1164 MT 5709 1164 LS
3119 
6092 1164 MT 6106 1164 LS
3120 
3320 1234 MT 6297 1234 LS
3121 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_3) 3283 1417 WT TSE RSS
3122 
3710 1308 MT 3724 1308 LS
3123 
4107 1308 MT 4121 1308 LS
3124 
4504 1308 MT 4518 1308 LS
3125 
4901 1308 MT 4915 1308 LS
3126 
5298 1308 MT 5312 1308 LS
3127 
5695 1308 MT 5709 1308 LS
3128 
6092 1308 MT 6106 1308 LS
3129 
3320 1378 MT 6297 1378 LS
3130 
% draw footer
3131 
(Entity:tb_or1200_cpu  Architecture:  Date: Sat Aug 14 01:25:01 EDT 2004   Row: 3 Page: 6) 300 4799 WT TSW RSS
3132 
grestore
3133 
showpage
3134 
%%Page: 7 7
3135 
gsave
3136 
90 rotate 0.12 dup neg scale
3137 
% dump string table
3138 
/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
3139 
/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
3140 
/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
3141 
/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
3142 
/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
3143 
/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
3144 
/ARC {5 -2 roll SX 5 2 roll arc} def
3145 
/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3320 def/REdge 5699 def/LabelWidth 3283 def
3146 
/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
3147 
/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
3148 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dw) MLW
3149 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/aw) MLW
3150 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/clk) MLW
3151 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rst) MLW
3152 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/supv) MLW
3153 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/wb_freeze) MLW
3154 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw) MLW
3155 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw) MLW
3156 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we) MLW
3157 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/flushpipe) MLW
3158 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_read) MLW
3159 
(...0_cpu/or1200_cpu/or1200_rf_top/current_thread_read_out) MLW
3160 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_write) MLW
3161 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw2) MLW
3162 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw2) MLW
3163 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2) MLW
3164 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/id_freeze) MLW
3165 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra) MLW
3166 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb) MLW
3167 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa) MLW
3168 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab) MLW
3169 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda) MLW
3170 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb) MLW
3171 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra2) MLW
3172 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb2) MLW
3173 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2) MLW
3174 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2) MLW
3175 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda2) MLW
3176 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb2) MLW
3177 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_cs) MLW
3178 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_write) MLW
3179 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_addr) MLW
3180 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_i) MLW
3181 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o) MLW
3182 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_1) MLW
3183 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_2) MLW
3184 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_3) MLW
3185 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_4) MLW
3186 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_5) MLW
3187 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_6) MLW
3188 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_7) MLW
3189 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_8) MLW
3190 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_1) MLW
3191 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_2) MLW
3192 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_3) MLW
3193 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_4) MLW
3194 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_5) MLW
3195 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_6) MLW
3196 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_7) MLW
3197 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_8) MLW
3198 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_1) MLW
3199 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_2) MLW
3200 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_3) MLW
3201 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_4) MLW
3202 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_5) MLW
3203 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_6) MLW
3204 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_7) MLW
3205 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_8) MLW
3206 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_1) MLW
3207 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_2) MLW
3208 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_3) MLW
3209 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_4) MLW
3210 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_5) MLW
3211 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_6) MLW
3212 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_7) MLW
3213 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_8) MLW
3214 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_1) MLW
3215 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_2) MLW
3216 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_3) MLW
3217 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_4) MLW
3218 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_5) MLW
3219 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_6) MLW
3220 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_7) MLW
3221 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_8) MLW
3222 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_1) MLW
3223 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_2) MLW
3224 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_3) MLW
3225 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_4) MLW
3226 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_5) MLW
3227 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_6) MLW
3228 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_7) MLW
3229 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_8) MLW
3230 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_1) MLW
3231 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_2) MLW
3232 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_3) MLW
3233 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_4) MLW
3234 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_5) MLW
3235 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_6) MLW
3236 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_7) MLW
3237 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_8) MLW
3238 
% draw waveform shading
3239 
[] 0 SD
3240 
2.995 setlinewidth
3241 
 
3242 
 
3243 
 
3244 
3320 329 MT 3320 329 LT 6297 329 LT ST
3245 
3320 410 MT 3320 410 LT 6297 410 LT ST
3246 
(00000020) 3334 370 WT pop 0 originOffset 37 add RSS
3247 
3320 473 MT 3320 473 LT 6297 473 LT ST
3248 
3320 554 MT 3320 554 LT 6297 554 LT ST
3249 
(00000005) 3334 514 WT pop 0 originOffset 37 add RSS
3250 
3320 698 MT 3320 618 LS
3251 
3320 618 MT 3518 618 LS
3252 
3518 618 MT 3518 698 LS
3253 
3518 698 MT 3717 698 LS
3254 
3717 698 MT 3717 618 LS
3255 
3717 618 MT 3915 618 LS
3256 
3915 618 MT 3915 698 LS
3257 
3915 698 MT 4114 698 LS
3258 
4114 698 MT 4114 618 LS
3259 
4114 618 MT 4312 618 LS
3260 
4312 618 MT 4312 698 LS
3261 
4312 698 MT 4511 698 LS
3262 
4511 698 MT 4511 618 LS
3263 
4511 618 MT 4709 618 LS
3264 
4709 618 MT 4709 698 LS
3265 
4709 698 MT 4908 698 LS
3266 
4908 698 MT 4908 618 LS
3267 
4908 618 MT 5106 618 LS
3268 
5106 618 MT 5106 698 LS
3269 
5106 698 MT 5305 698 LS
3270 
5305 698 MT 5305 618 LS
3271 
5305 618 MT 5503 618 LS
3272 
5503 618 MT 5503 698 LS
3273 
5503 698 MT 5702 698 LS
3274 
5702 698 MT 5702 618 LS
3275 
5702 618 MT 5900 618 LS
3276 
5900 618 MT 5900 698 LS
3277 
5900 698 MT 6099 698 LS
3278 
6099 698 MT 6099 618 LS
3279 
6099 618 MT 6297 618 LS
3280 
3320 842 MT 6297 842 LS
3281 
3320 906 MT 6297 906 LS
3282 
3320 1130 MT 6297 1130 LS
3283 
3320 1193 MT 3320 1193 LT 6297 1193 LT ST
3284 
3320 1274 MT 3320 1274 LT 6297 1274 LT ST
3285 
(03) 3334 1234 WT pop 0 originOffset 37 add RSS
3286 
3320 1378 MT 6297 1378 LS
3287 
3320 1562 MT 6297 1562 LS
3288 
3320 1666 MT 6297 1666 LS
3289 
3320 1769 MT 3320 1769 LT 3710 1769 LT 3717 1810 LT ST
3290 
3320 1850 MT 3320 1850 LT 3710 1850 LT 3717 1810 LT ST
3291 
(3) 3334 1810 WT pop 0 originOffset 37 add RSS
3292 
3717 1810 MT 3717 1810 LT 3724 1769 LT 4107 1769 LT 4114 1810 LT ST
3293 
3717 1810 MT 3717 1810 LT 3724 1850 LT 4107 1850 LT 4114 1810 LT ST
3294 
(4) 3731 1810 WT pop 0 originOffset 37 add RSS
3295 
4114 1810 MT 4114 1810 LT 4121 1769 LT 4504 1769 LT 4511 1810 LT ST
3296 
4114 1810 MT 4114 1810 LT 4121 1850 LT 4504 1850 LT 4511 1810 LT ST
3297 
(5) 4128 1810 WT pop 0 originOffset 37 add RSS
3298 
4511 1810 MT 4511 1810 LT 4518 1769 LT 4901 1769 LT 4908 1810 LT ST
3299 
4511 1810 MT 4511 1810 LT 4518 1850 LT 4901 1850 LT 4908 1810 LT ST
3300 
(6) 4525 1810 WT pop 0 originOffset 37 add RSS
3301 
4908 1810 MT 4908 1810 LT 4915 1769 LT 5298 1769 LT 5305 1810 LT ST
3302 
4908 1810 MT 4908 1810 LT 4915 1850 LT 5298 1850 LT 5305 1810 LT ST
3303 
(7) 4922 1810 WT pop 0 originOffset 37 add RSS
3304 
5305 1810 MT 5305 1810 LT 5312 1769 LT 5695 1769 LT 5702 1810 LT ST
3305 
5305 1810 MT 5305 1810 LT 5312 1850 LT 5695 1850 LT 5702 1810 LT ST
3306 
(0) 5319 1810 WT pop 0 originOffset 37 add RSS
3307 
5702 1810 MT 5702 1810 LT 5709 1769 LT 6092 1769 LT 6099 1810 LT ST
3308 
5702 1810 MT 5702 1810 LT 5709 1850 LT 6092 1850 LT 6099 1810 LT ST
3309 
(1) 5716 1810 WT pop 0 originOffset 37 add RSS
3310 
6099 1810 MT 6099 1810 LT 6106 1769 LT 6297 1769 LT ST
3311 
6099 1810 MT 6099 1810 LT 6106 1850 LT 6297 1850 LT ST
3312 
(2) 6113 1810 WT pop 0 originOffset 37 add RSS
3313 
3320 1913 MT 3320 1913 LT 3710 1913 LT 3717 1954 LT ST
3314 
3320 1994 MT 3320 1994 LT 3710 1994 LT 3717 1954 LT ST
3315 
(3) 3334 1954 WT pop 0 originOffset 37 add RSS
3316 
3717 1954 MT 3717 1954 LT 3724 1913 LT 4107 1913 LT 4114 1954 LT ST
3317 
3717 1954 MT 3717 1954 LT 3724 1994 LT 4107 1994 LT 4114 1954 LT ST
3318 
(4) 3731 1954 WT pop 0 originOffset 37 add RSS
3319 
4114 1954 MT 4114 1954 LT 4121 1913 LT 4504 1913 LT 4511 1954 LT ST
3320 
4114 1954 MT 4114 1954 LT 4121 1994 LT 4504 1994 LT 4511 1954 LT ST
3321 
(5) 4128 1954 WT pop 0 originOffset 37 add RSS
3322 
4511 1954 MT 4511 1954 LT 4518 1913 LT 4901 1913 LT 4908 1954 LT ST
3323 
4511 1954 MT 4511 1954 LT 4518 1994 LT 4901 1994 LT 4908 1954 LT ST
3324 
(6) 4525 1954 WT pop 0 originOffset 37 add RSS
3325 
4908 1954 MT 4908 1954 LT 4915 1913 LT 5298 1913 LT 5305 1954 LT ST
3326 
4908 1954 MT 4908 1954 LT 4915 1994 LT 5298 1994 LT 5305 1954 LT ST
3327 
(7) 4922 1954 WT pop 0 originOffset 37 add RSS
3328 
5305 1954 MT 5305 1954 LT 5312 1913 LT 5695 1913 LT 5702 1954 LT ST
3329 
5305 1954 MT 5305 1954 LT 5312 1994 LT 5695 1994 LT 5702 1954 LT ST
3330 
(0) 5319 1954 WT pop 0 originOffset 37 add RSS
3331 
5702 1954 MT 5702 1954 LT 5709 1913 LT 6092 1913 LT 6099 1954 LT ST
3332 
5702 1954 MT 5702 1954 LT 5709 1994 LT 6092 1994 LT 6099 1954 LT ST
3333 
(1) 5716 1954 WT pop 0 originOffset 37 add RSS
3334 
6099 1954 MT 6099 1954 LT 6106 1913 LT 6297 1913 LT ST
3335 
6099 1954 MT 6099 1954 LT 6106 1994 LT 6297 1994 LT ST
3336 
(2) 6113 1954 WT pop 0 originOffset 37 add RSS
3337 
3320 2057 MT 3320 2057 LT 3710 2057 LT 3717 2098 LT ST
3338 
3320 2138 MT 3320 2138 LT 3710 2138 LT 3717 2098 LT ST
3339 
(2) 3334 2098 WT pop 0 originOffset 37 add RSS
3340 
3717 2098 MT 3717 2098 LT 3724 2057 LT 4107 2057 LT 4114 2098 LT ST
3341 
3717 2098 MT 3717 2098 LT 3724 2138 LT 4107 2138 LT 4114 2098 LT ST
3342 
(3) 3731 2098 WT pop 0 originOffset 37 add RSS
3343 
4114 2098 MT 4114 2098 LT 4121 2057 LT 4504 2057 LT 4511 2098 LT ST
3344 
4114 2098 MT 4114 2098 LT 4121 2138 LT 4504 2138 LT 4511 2098 LT ST
3345 
(4) 4128 2098 WT pop 0 originOffset 37 add RSS
3346 
4511 2098 MT 4511 2098 LT 4518 2057 LT 4901 2057 LT 4908 2098 LT ST
3347 
4511 2098 MT 4511 2098 LT 4518 2138 LT 4901 2138 LT 4908 2098 LT ST
3348 
(5) 4525 2098 WT pop 0 originOffset 37 add RSS
3349 
4908 2098 MT 4908 2098 LT 4915 2057 LT 5298 2057 LT 5305 2098 LT ST
3350 
4908 2098 MT 4908 2098 LT 4915 2138 LT 5298 2138 LT 5305 2098 LT ST
3351 
(6) 4922 2098 WT pop 0 originOffset 37 add RSS
3352 
5305 2098 MT 5305 2098 LT 5312 2057 LT 5695 2057 LT 5702 2098 LT ST
3353 
5305 2098 MT 5305 2098 LT 5312 2138 LT 5695 2138 LT 5702 2098 LT ST
3354 
(7) 5319 2098 WT pop 0 originOffset 37 add RSS
3355 
5702 2098 MT 5702 2098 LT 5709 2057 LT 6092 2057 LT 6099 2098 LT ST
3356 
5702 2098 MT 5702 2098 LT 5709 2138 LT 6092 2138 LT 6099 2098 LT ST
3357 
(0) 5716 2098 WT pop 0 originOffset 37 add RSS
3358 
6099 2098 MT 6099 2098 LT 6106 2057 LT 6297 2057 LT ST
3359 
6099 2098 MT 6099 2098 LT 6106 2138 LT 6297 2138 LT ST
3360 
(1) 6113 2098 WT pop 0 originOffset 37 add RSS
3361 
3320 2201 MT 3320 2201 LT 6297 2201 LT ST
3362 
3320 2282 MT 3320 2282 LT 6297 2282 LT ST
3363 
(03) 3334 2242 WT pop 0 originOffset 37 add RSS
3364 
3320 2386 MT 6297 2386 LS
3365 
3320 2570 MT 6297 2570 LS
3366 
3320 2714 MT 6297 2714 LS
3367 
3320 2777 MT 3320 2777 LT 6297 2777 LT ST
3368 
3320 2858 MT 3320 2858 LT 6297 2858 LT ST
3369 
(01) 3334 2818 WT pop 0 originOffset 37 add RSS
3370 
3320 2921 MT 3320 2921 LT 6297 2921 LT ST
3371 
3320 3002 MT 3320 3002 LT 6297 3002 LT ST
3372 
(00) 3334 2962 WT pop 0 originOffset 37 add RSS
3373 
3320 3106 MT 6297 3106 LS
3374 
3320 3250 MT 6297 3250 LS
3375 
3320 3434 MT 6297 3434 LS
3376 
3320 3578 MT 6297 3578 LS
3377 
3320 3641 MT 3320 3641 LT 6297 3641 LT ST
3378 
3320 3722 MT 3320 3722 LT 6297 3722 LT ST
3379 
(01) 3334 3682 WT pop 0 originOffset 37 add RSS
3380 
3320 3785 MT 3320 3785 LT 6297 3785 LT ST
3381 
3320 3866 MT 3320 3866 LT 6297 3866 LT ST
3382 
(00) 3334 3826 WT pop 0 originOffset 37 add RSS
3383 
3320 3970 MT 6297 3970 LS
3384 
3320 4114 MT 6297 4114 LS
3385 
3320 4298 MT 6297 4298 LS
3386 
3320 4442 MT 6297 4442 LS
3387 
% draw timeline
3388 
3359 4533 MT 3359 4570 LS
3389 
3399 4533 MT 3399 4570 LS
3390 
3439 4533 MT 3439 4570 LS
3391 
3478 4533 MT 3478 4570 LS
3392 
3558 4533 MT 3558 4570 LS
3393 
3597 4533 MT 3597 4570 LS
3394 
3637 4533 MT 3637 4570 LS
3395 
3677 4533 MT 3677 4570 LS
3396 
3717 4533 MT 3717 4570 LS
3397 
3756 4533 MT 3756 4570 LS
3398 
3796 4533 MT 3796 4570 LS
3399 
3836 4533 MT 3836 4570 LS
3400 
3875 4533 MT 3875 4570 LS
3401 
3518 4506 MT 3518 4570 LS
3402 
3955 4533 MT 3955 4570 LS
3403 
3994 4533 MT 3994 4570 LS
3404 
4034 4533 MT 4034 4570 LS
3405 
4074 4533 MT 4074 4570 LS
3406 
4114 4533 MT 4114 4570 LS
3407 
4153 4533 MT 4153 4570 LS
3408 
4193 4533 MT 4193 4570 LS
3409 
4233 4533 MT 4233 4570 LS
3410 
4272 4533 MT 4272 4570 LS
3411 
3915 4506 MT 3915 4570 LS
3412 
(240) 3915 4649 WT TS RSS
3413 
4352 4533 MT 4352 4570 LS
3414 
4391 4533 MT 4391 4570 LS
3415 
4431 4533 MT 4431 4570 LS
3416 
4471 4533 MT 4471 4570 LS
3417 
4511 4533 MT 4511 4570 LS
3418 
4550 4533 MT 4550 4570 LS
3419 
4590 4533 MT 4590 4570 LS
3420 
4630 4533 MT 4630 4570 LS
3421 
4669 4533 MT 4669 4570 LS
3422 
4312 4506 MT 4312 4570 LS
3423 
4749 4533 MT 4749 4570 LS
3424 
4788 4533 MT 4788 4570 LS
3425 
4828 4533 MT 4828 4570 LS
3426 
4868 4533 MT 4868 4570 LS
3427 
4908 4533 MT 4908 4570 LS
3428 
4947 4533 MT 4947 4570 LS
3429 
4987 4533 MT 4987 4570 LS
3430 
5027 4533 MT 5027 4570 LS
3431 
5066 4533 MT 5066 4570 LS
3432 
4709 4506 MT 4709 4570 LS
3433 
(260) 4709 4649 WT TS RSS
3434 
5146 4533 MT 5146 4570 LS
3435 
5185 4533 MT 5185 4570 LS
3436 
5225 4533 MT 5225 4570 LS
3437 
5265 4533 MT 5265 4570 LS
3438 
5305 4533 MT 5305 4570 LS
3439 
5344 4533 MT 5344 4570 LS
3440 
5384 4533 MT 5384 4570 LS
3441 
5424 4533 MT 5424 4570 LS
3442 
5463 4533 MT 5463 4570 LS
3443 
5106 4506 MT 5106 4570 LS
3444 
5543 4533 MT 5543 4570 LS
3445 
5582 4533 MT 5582 4570 LS
3446 
5622 4533 MT 5622 4570 LS
3447 
5662 4533 MT 5662 4570 LS
3448 
5702 4533 MT 5702 4570 LS
3449 
5741 4533 MT 5741 4570 LS
3450 
5781 4533 MT 5781 4570 LS
3451 
5821 4533 MT 5821 4570 LS
3452 
5860 4533 MT 5860 4570 LS
3453 
5503 4506 MT 5503 4570 LS
3454 
(280) 5503 4649 WT TS RSS
3455 
5940 4533 MT 5940 4570 LS
3456 
5979 4533 MT 5979 4570 LS
3457 
6019 4533 MT 6019 4570 LS
3458 
6059 4533 MT 6059 4570 LS
3459 
6099 4533 MT 6099 4570 LS
3460 
6138 4533 MT 6138 4570 LS
3461 
6178 4533 MT 6178 4570 LS
3462 
6218 4533 MT 6218 4570 LS
3463 
6257 4533 MT 6257 4570 LS
3464 
5900 4506 MT 5900 4570 LS
3465 
6337 4533 MT 6337 4570 LS
3466 
6376 4533 MT 6376 4570 LS
3467 
6416 4533 MT 6416 4570 LS
3468 
6456 4533 MT 6456 4570 LS
3469 
6496 4533 MT 6496 4570 LS
3470 
6535 4533 MT 6535 4570 LS
3471 
6575 4533 MT 6575 4570 LS
3472 
6615 4533 MT 6615 4570 LS
3473 
6654 4533 MT 6654 4570 LS
3474 
6297 4506 MT 6297 4570 LS
3475 
(300) 6297 4649 WT TS RSS
3476 
% draw grid
3477 
3518 300 MT 3518 4506 LS
3478 
3915 300 MT 3915 4506 LS
3479 
4312 300 MT 4312 4506 LS
3480 
4709 300 MT 4709 4506 LS
3481 
5106 300 MT 5106 4506 LS
3482 
5503 300 MT 5503 4506 LS
3483 
5900 300 MT 5900 4506 LS
3484 
6297 300 MT 6297 4506 LS
3485 
% draw waveforms
3486 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dw) 3283 409 WT TSE RSS
3487 
3511 300 MT 3525 300 LS
3488 
3908 300 MT 3922 300 LS
3489 
4305 300 MT 4319 300 LS
3490 
4702 300 MT 4716 300 LS
3491 
5099 300 MT 5113 300 LS
3492 
5496 300 MT 5510 300 LS
3493 
5893 300 MT 5907 300 LS
3494 
6290 300 MT 6304 300 LS
3495 
3320 329 MT 3320 329 LT 6297 329 LT ST
3496 
3320 410 MT 3320 410 LT 6297 410 LT ST
3497 
(00000020) 3334 370 WT pop 0 originOffset 37 add RSS
3498 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/aw) 3283 553 WT TSE RSS
3499 
3511 444 MT 3525 444 LS
3500 
3908 444 MT 3922 444 LS
3501 
4305 444 MT 4319 444 LS
3502 
4702 444 MT 4716 444 LS
3503 
5099 444 MT 5113 444 LS
3504 
5496 444 MT 5510 444 LS
3505 
5893 444 MT 5907 444 LS
3506 
6290 444 MT 6304 444 LS
3507 
3320 473 MT 3320 473 LT 6297 473 LT ST
3508 
3320 554 MT 3320 554 LT 6297 554 LT ST
3509 
(00000005) 3334 514 WT pop 0 originOffset 37 add RSS
3510 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/clk) 3283 697 WT TSE RSS
3511 
3511 588 MT 3525 588 LS
3512 
3908 588 MT 3922 588 LS
3513 
4305 588 MT 4319 588 LS
3514 
4702 588 MT 4716 588 LS
3515 
5099 588 MT 5113 588 LS
3516 
5496 588 MT 5510 588 LS
3517 
5893 588 MT 5907 588 LS
3518 
6290 588 MT 6304 588 LS
3519 
3320 698 MT 3320 618 LS
3520 
3320 618 MT 3518 618 LS
3521 
3518 618 MT 3518 698 LS
3522 
3518 698 MT 3717 698 LS
3523 
3717 698 MT 3717 618 LS
3524 
3717 618 MT 3915 618 LS
3525 
3915 618 MT 3915 698 LS
3526 
3915 698 MT 4114 698 LS
3527 
4114 698 MT 4114 618 LS
3528 
4114 618 MT 4312 618 LS
3529 
4312 618 MT 4312 698 LS
3530 
4312 698 MT 4511 698 LS
3531 
4511 698 MT 4511 618 LS
3532 
4511 618 MT 4709 618 LS
3533 
4709 618 MT 4709 698 LS
3534 
4709 698 MT 4908 698 LS
3535 
4908 698 MT 4908 618 LS
3536 
4908 618 MT 5106 618 LS
3537 
5106 618 MT 5106 698 LS
3538 
5106 698 MT 5305 698 LS
3539 
5305 698 MT 5305 618 LS
3540 
5305 618 MT 5503 618 LS
3541 
5503 618 MT 5503 698 LS
3542 
5503 698 MT 5702 698 LS
3543 
5702 698 MT 5702 618 LS
3544 
5702 618 MT 5900 618 LS
3545 
5900 618 MT 5900 698 LS
3546 
5900 698 MT 6099 698 LS
3547 
6099 698 MT 6099 618 LS
3548 
6099 618 MT 6297 618 LS
3549 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rst) 3283 841 WT TSE RSS
3550 
3511 732 MT 3525 732 LS
3551 
3908 732 MT 3922 732 LS
3552 
4305 732 MT 4319 732 LS
3553 
4702 732 MT 4716 732 LS
3554 
5099 732 MT 5113 732 LS
3555 
5496 732 MT 5510 732 LS
3556 
5893 732 MT 5907 732 LS
3557 
6290 732 MT 6304 732 LS
3558 
3320 842 MT 6297 842 LS
3559 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/supv) 3283 985 WT TSE RSS
3560 
3511 876 MT 3525 876 LS
3561 
3908 876 MT 3922 876 LS
3562 
4305 876 MT 4319 876 LS
3563 
4702 876 MT 4716 876 LS
3564 
5099 876 MT 5113 876 LS
3565 
5496 876 MT 5510 876 LS
3566 
5893 876 MT 5907 876 LS
3567 
6290 876 MT 6304 876 LS
3568 
3320 906 MT 6297 906 LS
3569 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/wb_freeze) 3283 1129 WT TSE RSS
3570 
3511 1020 MT 3525 1020 LS
3571 
3908 1020 MT 3922 1020 LS
3572 
4305 1020 MT 4319 1020 LS
3573 
4702 1020 MT 4716 1020 LS
3574 
5099 1020 MT 5113 1020 LS
3575 
5496 1020 MT 5510 1020 LS
3576 
5893 1020 MT 5907 1020 LS
3577 
6290 1020 MT 6304 1020 LS
3578 
3320 1130 MT 6297 1130 LS
3579 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw) 3283 1273 WT TSE RSS
3580 
3511 1164 MT 3525 1164 LS
3581 
3908 1164 MT 3922 1164 LS
3582 
4305 1164 MT 4319 1164 LS
3583 
4702 1164 MT 4716 1164 LS
3584 
5099 1164 MT 5113 1164 LS
3585 
5496 1164 MT 5510 1164 LS
3586 
5893 1164 MT 5907 1164 LS
3587 
6290 1164 MT 6304 1164 LS
3588 
3320 1193 MT 3320 1193 LT 6297 1193 LT ST
3589 
3320 1274 MT 3320 1274 LT 6297 1274 LT ST
3590 
(03) 3334 1234 WT pop 0 originOffset 37 add RSS
3591 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw) 3283 1417 WT TSE RSS
3592 
3511 1308 MT 3525 1308 LS
3593 
3908 1308 MT 3922 1308 LS
3594 
4305 1308 MT 4319 1308 LS
3595 
4702 1308 MT 4716 1308 LS
3596 
5099 1308 MT 5113 1308 LS
3597 
5496 1308 MT 5510 1308 LS
3598 
5893 1308 MT 5907 1308 LS
3599 
6290 1308 MT 6304 1308 LS
3600 
3320 1378 MT 6297 1378 LS
3601 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we) 3283 1561 WT TSE RSS
3602 
3511 1452 MT 3525 1452 LS
3603 
3908 1452 MT 3922 1452 LS
3604 
4305 1452 MT 4319 1452 LS
3605 
4702 1452 MT 4716 1452 LS
3606 
5099 1452 MT 5113 1452 LS
3607 
5496 1452 MT 5510 1452 LS
3608 
5893 1452 MT 5907 1452 LS
3609 
6290 1452 MT 6304 1452 LS
3610 
3320 1562 MT 6297 1562 LS
3611 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/flushpipe) 3283 1705 WT TSE RSS
3612 
3511 1596 MT 3525 1596 LS
3613 
3908 1596 MT 3922 1596 LS
3614 
4305 1596 MT 4319 1596 LS
3615 
4702 1596 MT 4716 1596 LS
3616 
5099 1596 MT 5113 1596 LS
3617 
5496 1596 MT 5510 1596 LS
3618 
5893 1596 MT 5907 1596 LS
3619 
6290 1596 MT 6304 1596 LS
3620 
3320 1666 MT 6297 1666 LS
3621 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_read) 3283 1849 WT TSE RSS
3622 
3511 1740 MT 3525 1740 LS
3623 
3908 1740 MT 3922 1740 LS
3624 
4305 1740 MT 4319 1740 LS
3625 
4702 1740 MT 4716 1740 LS
3626 
5099 1740 MT 5113 1740 LS
3627 
5496 1740 MT 5510 1740 LS
3628 
5893 1740 MT 5907 1740 LS
3629 
6290 1740 MT 6304 1740 LS
3630 
3320 1769 MT 3320 1769 LT 3710 1769 LT 3717 1810 LT ST
3631 
3320 1850 MT 3320 1850 LT 3710 1850 LT 3717 1810 LT ST
3632 
(3) 3334 1810 WT pop 0 originOffset 37 add RSS
3633 
3717 1810 MT 3717 1810 LT 3724 1769 LT 4107 1769 LT 4114 1810 LT ST
3634 
3717 1810 MT 3717 1810 LT 3724 1850 LT 4107 1850 LT 4114 1810 LT ST
3635 
(4) 3731 1810 WT pop 0 originOffset 37 add RSS
3636 
4114 1810 MT 4114 1810 LT 4121 1769 LT 4504 1769 LT 4511 1810 LT ST
3637 
4114 1810 MT 4114 1810 LT 4121 1850 LT 4504 1850 LT 4511 1810 LT ST
3638 
(5) 4128 1810 WT pop 0 originOffset 37 add RSS
3639 
4511 1810 MT 4511 1810 LT 4518 1769 LT 4901 1769 LT 4908 1810 LT ST
3640 
4511 1810 MT 4511 1810 LT 4518 1850 LT 4901 1850 LT 4908 1810 LT ST
3641 
(6) 4525 1810 WT pop 0 originOffset 37 add RSS
3642 
4908 1810 MT 4908 1810 LT 4915 1769 LT 5298 1769 LT 5305 1810 LT ST
3643 
4908 1810 MT 4908 1810 LT 4915 1850 LT 5298 1850 LT 5305 1810 LT ST
3644 
(7) 4922 1810 WT pop 0 originOffset 37 add RSS
3645 
5305 1810 MT 5305 1810 LT 5312 1769 LT 5695 1769 LT 5702 1810 LT ST
3646 
5305 1810 MT 5305 1810 LT 5312 1850 LT 5695 1850 LT 5702 1810 LT ST
3647 
(0) 5319 1810 WT pop 0 originOffset 37 add RSS
3648 
5702 1810 MT 5702 1810 LT 5709 1769 LT 6092 1769 LT 6099 1810 LT ST
3649 
5702 1810 MT 5702 1810 LT 5709 1850 LT 6092 1850 LT 6099 1810 LT ST
3650 
(1) 5716 1810 WT pop 0 originOffset 37 add RSS
3651 
6099 1810 MT 6099 1810 LT 6106 1769 LT 6297 1769 LT ST
3652 
6099 1810 MT 6099 1810 LT 6106 1850 LT 6297 1850 LT ST
3653 
(2) 6113 1810 WT pop 0 originOffset 37 add RSS
3654 
(...0_cpu/or1200_cpu/or1200_rf_top/current_thread_read_out) 3283 1993 WT TSE RSS
3655 
3511 1884 MT 3525 1884 LS
3656 
3908 1884 MT 3922 1884 LS
3657 
4305 1884 MT 4319 1884 LS
3658 
4702 1884 MT 4716 1884 LS
3659 
5099 1884 MT 5113 1884 LS
3660 
5496 1884 MT 5510 1884 LS
3661 
5893 1884 MT 5907 1884 LS
3662 
6290 1884 MT 6304 1884 LS
3663 
3320 1913 MT 3320 1913 LT 3710 1913 LT 3717 1954 LT ST
3664 
3320 1994 MT 3320 1994 LT 3710 1994 LT 3717 1954 LT ST
3665 
(3) 3334 1954 WT pop 0 originOffset 37 add RSS
3666 
3717 1954 MT 3717 1954 LT 3724 1913 LT 4107 1913 LT 4114 1954 LT ST
3667 
3717 1954 MT 3717 1954 LT 3724 1994 LT 4107 1994 LT 4114 1954 LT ST
3668 
(4) 3731 1954 WT pop 0 originOffset 37 add RSS
3669 
4114 1954 MT 4114 1954 LT 4121 1913 LT 4504 1913 LT 4511 1954 LT ST
3670 
4114 1954 MT 4114 1954 LT 4121 1994 LT 4504 1994 LT 4511 1954 LT ST
3671 
(5) 4128 1954 WT pop 0 originOffset 37 add RSS
3672 
4511 1954 MT 4511 1954 LT 4518 1913 LT 4901 1913 LT 4908 1954 LT ST
3673 
4511 1954 MT 4511 1954 LT 4518 1994 LT 4901 1994 LT 4908 1954 LT ST
3674 
(6) 4525 1954 WT pop 0 originOffset 37 add RSS
3675 
4908 1954 MT 4908 1954 LT 4915 1913 LT 5298 1913 LT 5305 1954 LT ST
3676 
4908 1954 MT 4908 1954 LT 4915 1994 LT 5298 1994 LT 5305 1954 LT ST
3677 
(7) 4922 1954 WT pop 0 originOffset 37 add RSS
3678 
5305 1954 MT 5305 1954 LT 5312 1913 LT 5695 1913 LT 5702 1954 LT ST
3679 
5305 1954 MT 5305 1954 LT 5312 1994 LT 5695 1994 LT 5702 1954 LT ST
3680 
(0) 5319 1954 WT pop 0 originOffset 37 add RSS
3681 
5702 1954 MT 5702 1954 LT 5709 1913 LT 6092 1913 LT 6099 1954 LT ST
3682 
5702 1954 MT 5702 1954 LT 5709 1994 LT 6092 1994 LT 6099 1954 LT ST
3683 
(1) 5716 1954 WT pop 0 originOffset 37 add RSS
3684 
6099 1954 MT 6099 1954 LT 6106 1913 LT 6297 1913 LT ST
3685 
6099 1954 MT 6099 1954 LT 6106 1994 LT 6297 1994 LT ST
3686 
(2) 6113 1954 WT pop 0 originOffset 37 add RSS
3687 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_write) 3283 2137 WT TSE RSS
3688 
3511 2028 MT 3525 2028 LS
3689 
3908 2028 MT 3922 2028 LS
3690 
4305 2028 MT 4319 2028 LS
3691 
4702 2028 MT 4716 2028 LS
3692 
5099 2028 MT 5113 2028 LS
3693 
5496 2028 MT 5510 2028 LS
3694 
5893 2028 MT 5907 2028 LS
3695 
6290 2028 MT 6304 2028 LS
3696 
3320 2057 MT 3320 2057 LT 3710 2057 LT 3717 2098 LT ST
3697 
3320 2138 MT 3320 2138 LT 3710 2138 LT 3717 2098 LT ST
3698 
(2) 3334 2098 WT pop 0 originOffset 37 add RSS
3699 
3717 2098 MT 3717 2098 LT 3724 2057 LT 4107 2057 LT 4114 2098 LT ST
3700 
3717 2098 MT 3717 2098 LT 3724 2138 LT 4107 2138 LT 4114 2098 LT ST
3701 
(3) 3731 2098 WT pop 0 originOffset 37 add RSS
3702 
4114 2098 MT 4114 2098 LT 4121 2057 LT 4504 2057 LT 4511 2098 LT ST
3703 
4114 2098 MT 4114 2098 LT 4121 2138 LT 4504 2138 LT 4511 2098 LT ST
3704 
(4) 4128 2098 WT pop 0 originOffset 37 add RSS
3705 
4511 2098 MT 4511 2098 LT 4518 2057 LT 4901 2057 LT 4908 2098 LT ST
3706 
4511 2098 MT 4511 2098 LT 4518 2138 LT 4901 2138 LT 4908 2098 LT ST
3707 
(5) 4525 2098 WT pop 0 originOffset 37 add RSS
3708 
4908 2098 MT 4908 2098 LT 4915 2057 LT 5298 2057 LT 5305 2098 LT ST
3709 
4908 2098 MT 4908 2098 LT 4915 2138 LT 5298 2138 LT 5305 2098 LT ST
3710 
(6) 4922 2098 WT pop 0 originOffset 37 add RSS
3711 
5305 2098 MT 5305 2098 LT 5312 2057 LT 5695 2057 LT 5702 2098 LT ST
3712 
5305 2098 MT 5305 2098 LT 5312 2138 LT 5695 2138 LT 5702 2098 LT ST
3713 
(7) 5319 2098 WT pop 0 originOffset 37 add RSS
3714 
5702 2098 MT 5702 2098 LT 5709 2057 LT 6092 2057 LT 6099 2098 LT ST
3715 
5702 2098 MT 5702 2098 LT 5709 2138 LT 6092 2138 LT 6099 2098 LT ST
3716 
(0) 5716 2098 WT pop 0 originOffset 37 add RSS
3717 
6099 2098 MT 6099 2098 LT 6106 2057 LT 6297 2057 LT ST
3718 
6099 2098 MT 6099 2098 LT 6106 2138 LT 6297 2138 LT ST
3719 
(1) 6113 2098 WT pop 0 originOffset 37 add RSS
3720 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw2) 3283 2281 WT TSE RSS
3721 
3511 2172 MT 3525 2172 LS
3722 
3908 2172 MT 3922 2172 LS
3723 
4305 2172 MT 4319 2172 LS
3724 
4702 2172 MT 4716 2172 LS
3725 
5099 2172 MT 5113 2172 LS
3726 
5496 2172 MT 5510 2172 LS
3727 
5893 2172 MT 5907 2172 LS
3728 
6290 2172 MT 6304 2172 LS
3729 
3320 2201 MT 3320 2201 LT 6297 2201 LT ST
3730 
3320 2282 MT 3320 2282 LT 6297 2282 LT ST
3731 
(03) 3334 2242 WT pop 0 originOffset 37 add RSS
3732 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw2) 3283 2425 WT TSE RSS
3733 
3511 2316 MT 3525 2316 LS
3734 
3908 2316 MT 3922 2316 LS
3735 
4305 2316 MT 4319 2316 LS
3736 
4702 2316 MT 4716 2316 LS
3737 
5099 2316 MT 5113 2316 LS
3738 
5496 2316 MT 5510 2316 LS
3739 
5893 2316 MT 5907 2316 LS
3740 
6290 2316 MT 6304 2316 LS
3741 
3320 2386 MT 6297 2386 LS
3742 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2) 3283 2569 WT TSE RSS
3743 
3511 2460 MT 3525 2460 LS
3744 
3908 2460 MT 3922 2460 LS
3745 
4305 2460 MT 4319 2460 LS
3746 
4702 2460 MT 4716 2460 LS
3747 
5099 2460 MT 5113 2460 LS
3748 
5496 2460 MT 5510 2460 LS
3749 
5893 2460 MT 5907 2460 LS
3750 
6290 2460 MT 6304 2460 LS
3751 
3320 2570 MT 6297 2570 LS
3752 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/id_freeze) 3283 2713 WT TSE RSS
3753 
3511 2604 MT 3525 2604 LS
3754 
3908 2604 MT 3922 2604 LS
3755 
4305 2604 MT 4319 2604 LS
3756 
4702 2604 MT 4716 2604 LS
3757 
5099 2604 MT 5113 2604 LS
3758 
5496 2604 MT 5510 2604 LS
3759 
5893 2604 MT 5907 2604 LS
3760 
6290 2604 MT 6304 2604 LS
3761 
3320 2714 MT 6297 2714 LS
3762 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra) 3283 2857 WT TSE RSS
3763 
3511 2748 MT 3525 2748 LS
3764 
3908 2748 MT 3922 2748 LS
3765 
4305 2748 MT 4319 2748 LS
3766 
4702 2748 MT 4716 2748 LS
3767 
5099 2748 MT 5113 2748 LS
3768 
5496 2748 MT 5510 2748 LS
3769 
5893 2748 MT 5907 2748 LS
3770 
6290 2748 MT 6304 2748 LS
3771 
3320 2777 MT 3320 2777 LT 6297 2777 LT ST
3772 
3320 2858 MT 3320 2858 LT 6297 2858 LT ST
3773 
(01) 3334 2818 WT pop 0 originOffset 37 add RSS
3774 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb) 3283 3001 WT TSE RSS
3775 
3511 2892 MT 3525 2892 LS
3776 
3908 2892 MT 3922 2892 LS
3777 
4305 2892 MT 4319 2892 LS
3778 
4702 2892 MT 4716 2892 LS
3779 
5099 2892 MT 5113 2892 LS
3780 
5496 2892 MT 5510 2892 LS
3781 
5893 2892 MT 5907 2892 LS
3782 
6290 2892 MT 6304 2892 LS
3783 
3320 2921 MT 3320 2921 LT 6297 2921 LT ST
3784 
3320 3002 MT 3320 3002 LT 6297 3002 LT ST
3785 
(00) 3334 2962 WT pop 0 originOffset 37 add RSS
3786 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa) 3283 3145 WT TSE RSS
3787 
3511 3036 MT 3525 3036 LS
3788 
3908 3036 MT 3922 3036 LS
3789 
4305 3036 MT 4319 3036 LS
3790 
4702 3036 MT 4716 3036 LS
3791 
5099 3036 MT 5113 3036 LS
3792 
5496 3036 MT 5510 3036 LS
3793 
5893 3036 MT 5907 3036 LS
3794 
6290 3036 MT 6304 3036 LS
3795 
3320 3106 MT 6297 3106 LS
3796 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab) 3283 3289 WT TSE RSS
3797 
3511 3180 MT 3525 3180 LS
3798 
3908 3180 MT 3922 3180 LS
3799 
4305 3180 MT 4319 3180 LS
3800 
4702 3180 MT 4716 3180 LS
3801 
5099 3180 MT 5113 3180 LS
3802 
5496 3180 MT 5510 3180 LS
3803 
5893 3180 MT 5907 3180 LS
3804 
6290 3180 MT 6304 3180 LS
3805 
3320 3250 MT 6297 3250 LS
3806 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda) 3283 3433 WT TSE RSS
3807 
3511 3324 MT 3525 3324 LS
3808 
3908 3324 MT 3922 3324 LS
3809 
4305 3324 MT 4319 3324 LS
3810 
4702 3324 MT 4716 3324 LS
3811 
5099 3324 MT 5113 3324 LS
3812 
5496 3324 MT 5510 3324 LS
3813 
5893 3324 MT 5907 3324 LS
3814 
6290 3324 MT 6304 3324 LS
3815 
3320 3434 MT 6297 3434 LS
3816 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb) 3283 3577 WT TSE RSS
3817 
3511 3468 MT 3525 3468 LS
3818 
3908 3468 MT 3922 3468 LS
3819 
4305 3468 MT 4319 3468 LS
3820 
4702 3468 MT 4716 3468 LS
3821 
5099 3468 MT 5113 3468 LS
3822 
5496 3468 MT 5510 3468 LS
3823 
5893 3468 MT 5907 3468 LS
3824 
6290 3468 MT 6304 3468 LS
3825 
3320 3578 MT 6297 3578 LS
3826 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra2) 3283 3721 WT TSE RSS
3827 
3511 3612 MT 3525 3612 LS
3828 
3908 3612 MT 3922 3612 LS
3829 
4305 3612 MT 4319 3612 LS
3830 
4702 3612 MT 4716 3612 LS
3831 
5099 3612 MT 5113 3612 LS
3832 
5496 3612 MT 5510 3612 LS
3833 
5893 3612 MT 5907 3612 LS
3834 
6290 3612 MT 6304 3612 LS
3835 
3320 3641 MT 3320 3641 LT 6297 3641 LT ST
3836 
3320 3722 MT 3320 3722 LT 6297 3722 LT ST
3837 
(01) 3334 3682 WT pop 0 originOffset 37 add RSS
3838 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb2) 3283 3865 WT TSE RSS
3839 
3511 3756 MT 3525 3756 LS
3840 
3908 3756 MT 3922 3756 LS
3841 
4305 3756 MT 4319 3756 LS
3842 
4702 3756 MT 4716 3756 LS
3843 
5099 3756 MT 5113 3756 LS
3844 
5496 3756 MT 5510 3756 LS
3845 
5893 3756 MT 5907 3756 LS
3846 
6290 3756 MT 6304 3756 LS
3847 
3320 3785 MT 3320 3785 LT 6297 3785 LT ST
3848 
3320 3866 MT 3320 3866 LT 6297 3866 LT ST
3849 
(00) 3334 3826 WT pop 0 originOffset 37 add RSS
3850 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2) 3283 4009 WT TSE RSS
3851 
3511 3900 MT 3525 3900 LS
3852 
3908 3900 MT 3922 3900 LS
3853 
4305 3900 MT 4319 3900 LS
3854 
4702 3900 MT 4716 3900 LS
3855 
5099 3900 MT 5113 3900 LS
3856 
5496 3900 MT 5510 3900 LS
3857 
5893 3900 MT 5907 3900 LS
3858 
6290 3900 MT 6304 3900 LS
3859 
3320 3970 MT 6297 3970 LS
3860 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2) 3283 4153 WT TSE RSS
3861 
3511 4044 MT 3525 4044 LS
3862 
3908 4044 MT 3922 4044 LS
3863 
4305 4044 MT 4319 4044 LS
3864 
4702 4044 MT 4716 4044 LS
3865 
5099 4044 MT 5113 4044 LS
3866 
5496 4044 MT 5510 4044 LS
3867 
5893 4044 MT 5907 4044 LS
3868 
6290 4044 MT 6304 4044 LS
3869 
3320 4114 MT 6297 4114 LS
3870 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda2) 3283 4297 WT TSE RSS
3871 
3511 4188 MT 3525 4188 LS
3872 
3908 4188 MT 3922 4188 LS
3873 
4305 4188 MT 4319 4188 LS
3874 
4702 4188 MT 4716 4188 LS
3875 
5099 4188 MT 5113 4188 LS
3876 
5496 4188 MT 5510 4188 LS
3877 
5893 4188 MT 5907 4188 LS
3878 
6290 4188 MT 6304 4188 LS
3879 
3320 4298 MT 6297 4298 LS
3880 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb2) 3283 4441 WT TSE RSS
3881 
3511 4332 MT 3525 4332 LS
3882 
3908 4332 MT 3922 4332 LS
3883 
4305 4332 MT 4319 4332 LS
3884 
4702 4332 MT 4716 4332 LS
3885 
5099 4332 MT 5113 4332 LS
3886 
5496 4332 MT 5510 4332 LS
3887 
5893 4332 MT 5907 4332 LS
3888 
6290 4332 MT 6304 4332 LS
3889 
3320 4442 MT 6297 4442 LS
3890 
% draw footer
3891 
(Entity:tb_or1200_cpu  Architecture:  Date: Sat Aug 14 01:25:01 EDT 2004   Row: 4 Page: 7) 300 4799 WT TSW RSS
3892 
grestore
3893 
showpage
3894 
%%Page: 8 8
3895 
gsave
3896 
90 rotate 0.12 dup neg scale
3897 
% dump string table
3898 
/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
3899 
/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
3900 
/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
3901 
/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
3902 
/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
3903 
/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
3904 
/ARC {5 -2 roll SX 5 2 roll arc} def
3905 
/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3320 def/REdge 5699 def/LabelWidth 3283 def
3906 
/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
3907 
/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
3908 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dw) MLW
3909 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/aw) MLW
3910 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/clk) MLW
3911 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rst) MLW
3912 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/supv) MLW
3913 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/wb_freeze) MLW
3914 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw) MLW
3915 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw) MLW
3916 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we) MLW
3917 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/flushpipe) MLW
3918 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_read) MLW
3919 
(...0_cpu/or1200_cpu/or1200_rf_top/current_thread_read_out) MLW
3920 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/current_thread_write) MLW
3921 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrw2) MLW
3922 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataw2) MLW
3923 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2) MLW
3924 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/id_freeze) MLW
3925 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra) MLW
3926 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb) MLW
3927 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa) MLW
3928 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab) MLW
3929 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda) MLW
3930 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb) MLW
3931 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addra2) MLW
3932 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/addrb2) MLW
3933 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2) MLW
3934 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2) MLW
3935 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rda2) MLW
3936 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/rdb2) MLW
3937 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_cs) MLW
3938 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_write) MLW
3939 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_addr) MLW
3940 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_i) MLW
3941 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o) MLW
3942 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_1) MLW
3943 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_2) MLW
3944 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_3) MLW
3945 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_4) MLW
3946 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_5) MLW
3947 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_6) MLW
3948 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_7) MLW
3949 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_8) MLW
3950 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_1) MLW
3951 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_2) MLW
3952 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_3) MLW
3953 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_4) MLW
3954 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_5) MLW
3955 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_6) MLW
3956 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_7) MLW
3957 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa_8) MLW
3958 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_1) MLW
3959 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_2) MLW
3960 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_3) MLW
3961 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_4) MLW
3962 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_5) MLW
3963 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_6) MLW
3964 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_7) MLW
3965 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/dataa2_8) MLW
3966 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_1) MLW
3967 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_2) MLW
3968 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_3) MLW
3969 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_4) MLW
3970 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_5) MLW
3971 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_6) MLW
3972 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_7) MLW
3973 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab_8) MLW
3974 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_1) MLW
3975 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_2) MLW
3976 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_3) MLW
3977 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_4) MLW
3978 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_5) MLW
3979 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_6) MLW
3980 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_7) MLW
3981 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/datab2_8) MLW
3982 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_1) MLW
3983 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_2) MLW
3984 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_3) MLW
3985 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_4) MLW
3986 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_5) MLW
3987 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_6) MLW
3988 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_7) MLW
3989 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we_8) MLW
3990 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_1) MLW
3991 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_2) MLW
3992 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_3) MLW
3993 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_4) MLW
3994 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_5) MLW
3995 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_6) MLW
3996 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_7) MLW
3997 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/we2_8) MLW
3998 
% draw waveform shading
3999 
[] 0 SD
4000 
2.995 setlinewidth
4001 
 
4002 
 
4003 
 
4004 
3320 410 MT 6297 410 LS
4005 
3320 514 MT 6297 514 LS
4006 
3320 658 MT 6297 658 LS
4007 
3320 802 MT 6297 802 LS
4008 
3320 946 MT 6297 946 LS
4009 
3320 1090 MT 6297 1090 LS
4010 
3320 1234 MT 6297 1234 LS
4011 
3320 1378 MT 6297 1378 LS
4012 
% draw timeline
4013 
3359 4533 MT 3359 4570 LS
4014 
3399 4533 MT 3399 4570 LS
4015 
3439 4533 MT 3439 4570 LS
4016 
3478 4533 MT 3478 4570 LS
4017 
3558 4533 MT 3558 4570 LS
4018 
3597 4533 MT 3597 4570 LS
4019 
3637 4533 MT 3637 4570 LS
4020 
3677 4533 MT 3677 4570 LS
4021 
3717 4533 MT 3717 4570 LS
4022 
3756 4533 MT 3756 4570 LS
4023 
3796 4533 MT 3796 4570 LS
4024 
3836 4533 MT 3836 4570 LS
4025 
3875 4533 MT 3875 4570 LS
4026 
3518 4506 MT 3518 4570 LS
4027 
3955 4533 MT 3955 4570 LS
4028 
3994 4533 MT 3994 4570 LS
4029 
4034 4533 MT 4034 4570 LS
4030 
4074 4533 MT 4074 4570 LS
4031 
4114 4533 MT 4114 4570 LS
4032 
4153 4533 MT 4153 4570 LS
4033 
4193 4533 MT 4193 4570 LS
4034 
4233 4533 MT 4233 4570 LS
4035 
4272 4533 MT 4272 4570 LS
4036 
3915 4506 MT 3915 4570 LS
4037 
(240) 3915 4649 WT TS RSS
4038 
4352 4533 MT 4352 4570 LS
4039 
4391 4533 MT 4391 4570 LS
4040 
4431 4533 MT 4431 4570 LS
4041 
4471 4533 MT 4471 4570 LS
4042 
4511 4533 MT 4511 4570 LS
4043 
4550 4533 MT 4550 4570 LS
4044 
4590 4533 MT 4590 4570 LS
4045 
4630 4533 MT 4630 4570 LS
4046 
4669 4533 MT 4669 4570 LS
4047 
4312 4506 MT 4312 4570 LS
4048 
4749 4533 MT 4749 4570 LS
4049 
4788 4533 MT 4788 4570 LS
4050 
4828 4533 MT 4828 4570 LS
4051 
4868 4533 MT 4868 4570 LS
4052 
4908 4533 MT 4908 4570 LS
4053 
4947 4533 MT 4947 4570 LS
4054 
4987 4533 MT 4987 4570 LS
4055 
5027 4533 MT 5027 4570 LS
4056 
5066 4533 MT 5066 4570 LS
4057 
4709 4506 MT 4709 4570 LS
4058 
(260) 4709 4649 WT TS RSS
4059 
5146 4533 MT 5146 4570 LS
4060 
5185 4533 MT 5185 4570 LS
4061 
5225 4533 MT 5225 4570 LS
4062 
5265 4533 MT 5265 4570 LS
4063 
5305 4533 MT 5305 4570 LS
4064 
5344 4533 MT 5344 4570 LS
4065 
5384 4533 MT 5384 4570 LS
4066 
5424 4533 MT 5424 4570 LS
4067 
5463 4533 MT 5463 4570 LS
4068 
5106 4506 MT 5106 4570 LS
4069 
5543 4533 MT 5543 4570 LS
4070 
5582 4533 MT 5582 4570 LS
4071 
5622 4533 MT 5622 4570 LS
4072 
5662 4533 MT 5662 4570 LS
4073 
5702 4533 MT 5702 4570 LS
4074 
5741 4533 MT 5741 4570 LS
4075 
5781 4533 MT 5781 4570 LS
4076 
5821 4533 MT 5821 4570 LS
4077 
5860 4533 MT 5860 4570 LS
4078 
5503 4506 MT 5503 4570 LS
4079 
(280) 5503 4649 WT TS RSS
4080 
5940 4533 MT 5940 4570 LS
4081 
5979 4533 MT 5979 4570 LS
4082 
6019 4533 MT 6019 4570 LS
4083 
6059 4533 MT 6059 4570 LS
4084 
6099 4533 MT 6099 4570 LS
4085 
6138 4533 MT 6138 4570 LS
4086 
6178 4533 MT 6178 4570 LS
4087 
6218 4533 MT 6218 4570 LS
4088 
6257 4533 MT 6257 4570 LS
4089 
5900 4506 MT 5900 4570 LS
4090 
6337 4533 MT 6337 4570 LS
4091 
6376 4533 MT 6376 4570 LS
4092 
6416 4533 MT 6416 4570 LS
4093 
6456 4533 MT 6456 4570 LS
4094 
6496 4533 MT 6496 4570 LS
4095 
6535 4533 MT 6535 4570 LS
4096 
6575 4533 MT 6575 4570 LS
4097 
6615 4533 MT 6615 4570 LS
4098 
6654 4533 MT 6654 4570 LS
4099 
6297 4506 MT 6297 4570 LS
4100 
(300) 6297 4649 WT TS RSS
4101 
% draw grid
4102 
3518 300 MT 3518 4506 LS
4103 
3915 300 MT 3915 4506 LS
4104 
4312 300 MT 4312 4506 LS
4105 
4709 300 MT 4709 4506 LS
4106 
5106 300 MT 5106 4506 LS
4107 
5503 300 MT 5503 4506 LS
4108 
5900 300 MT 5900 4506 LS
4109 
6297 300 MT 6297 4506 LS
4110 
% draw waveforms
4111 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_cs) 3283 409 WT TSE RSS
4112 
3511 300 MT 3525 300 LS
4113 
3908 300 MT 3922 300 LS
4114 
4305 300 MT 4319 300 LS
4115 
4702 300 MT 4716 300 LS
4116 
5099 300 MT 5113 300 LS
4117 
5496 300 MT 5510 300 LS
4118 
5893 300 MT 5907 300 LS
4119 
6290 300 MT 6304 300 LS
4120 
3320 410 MT 6297 410 LS
4121 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_write) 3283 553 WT TSE RSS
4122 
3511 444 MT 3525 444 LS
4123 
3908 444 MT 3922 444 LS
4124 
4305 444 MT 4319 444 LS
4125 
4702 444 MT 4716 444 LS
4126 
5099 444 MT 5113 444 LS
4127 
5496 444 MT 5510 444 LS
4128 
5893 444 MT 5907 444 LS
4129 
6290 444 MT 6304 444 LS
4130 
3320 514 MT 6297 514 LS
4131 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_addr) 3283 697 WT TSE RSS
4132 
3511 588 MT 3525 588 LS
4133 
3908 588 MT 3922 588 LS
4134 
4305 588 MT 4319 588 LS
4135 
4702 588 MT 4716 588 LS
4136 
5099 588 MT 5113 588 LS
4137 
5496 588 MT 5510 588 LS
4138 
5893 588 MT 5907 588 LS
4139 
6290 588 MT 6304 588 LS
4140 
3320 658 MT 6297 658 LS
4141 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_i) 3283 841 WT TSE RSS
4142 
3511 732 MT 3525 732 LS
4143 
3908 732 MT 3922 732 LS
4144 
4305 732 MT 4319 732 LS
4145 
4702 732 MT 4716 732 LS
4146 
5099 732 MT 5113 732 LS
4147 
5496 732 MT 5510 732 LS
4148 
5893 732 MT 5907 732 LS
4149 
6290 732 MT 6304 732 LS
4150 
3320 802 MT 6297 802 LS
4151 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o) 3283 985 WT TSE RSS
4152 
3511 876 MT 3525 876 LS
4153 
3908 876 MT 3922 876 LS
4154 
4305 876 MT 4319 876 LS
4155 
4702 876 MT 4716 876 LS
4156 
5099 876 MT 5113 876 LS
4157 
5496 876 MT 5510 876 LS
4158 
5893 876 MT 5907 876 LS
4159 
6290 876 MT 6304 876 LS
4160 
3320 946 MT 6297 946 LS
4161 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_1) 3283 1129 WT TSE RSS
4162 
3511 1020 MT 3525 1020 LS
4163 
3908 1020 MT 3922 1020 LS
4164 
4305 1020 MT 4319 1020 LS
4165 
4702 1020 MT 4716 1020 LS
4166 
5099 1020 MT 5113 1020 LS
4167 
5496 1020 MT 5510 1020 LS
4168 
5893 1020 MT 5907 1020 LS
4169 
6290 1020 MT 6304 1020 LS
4170 
3320 1090 MT 6297 1090 LS
4171 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_2) 3283 1273 WT TSE RSS
4172 
3511 1164 MT 3525 1164 LS
4173 
3908 1164 MT 3922 1164 LS
4174 
4305 1164 MT 4319 1164 LS
4175 
4702 1164 MT 4716 1164 LS
4176 
5099 1164 MT 5113 1164 LS
4177 
5496 1164 MT 5510 1164 LS
4178 
5893 1164 MT 5907 1164 LS
4179 
6290 1164 MT 6304 1164 LS
4180 
3320 1234 MT 6297 1234 LS
4181 
(/tb_or1200_cpu/or1200_cpu/or1200_rf_top/spr_dat_o_3) 3283 1417 WT TSE RSS
4182 
3511 1308 MT 3525 1308 LS
4183 
3908 1308 MT 3922 1308 LS
4184 
4305 1308 MT 4319 1308 LS
4185 
4702 1308 MT 4716 1308 LS
4186 
5099 1308 MT 5113 1308 LS
4187 
5496 1308 MT 5510 1308 LS
4188 
5893 1308 MT 5907 1308 LS
4189 
6290 1308 MT 6304 1308 LS
4190 
3320 1378 MT 6297 1378 LS
4191 
% draw footer
4192 
(Entity:tb_or1200_cpu  Architecture:  Date: Sat Aug 14 01:25:01 EDT 2004   Row: 4 Page: 8) 300 4799 WT TSW RSS
4193 
grestore
4194 
showpage
4195 
%%EOF

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