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N.Boukadid |
#
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# File import script for the core1990 interlaken hdl project
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#
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#Script Configuration
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set proj_name core1990_interlaken
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# Set the supportfiles directory path
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set scriptdir [pwd]
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set proj_dir $scriptdir/../
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#Close currently open project and create a new one. (OVERWRITES PROJECT!!)
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close_project -quiet
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create_project -force -part xc7vx485tffg1761-2 $proj_name $proj_dir/projects/$proj_name
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set_property target_language VHDL [current_project]
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set_property default_lib work [current_project]
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read_vhdl -library work $proj_dir/sources/interlaken_wrapper_vc707.vhd
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read_vhdl -library work $proj_dir/sources/interlaken_pkg.vhd
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# ----------------------------------------------------------
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# Core1990 top file
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# ----------------------------------------------------------
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read_vhdl -library work $proj_dir/sources/interlaken/interlaken_interface_vc707.vhd
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# ----------------------------------------------------------
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# CRC
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# ----------------------------------------------------------
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read_vhdl -library work $proj_dir/sources/interlaken/crc/crc-24.vhd
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read_vhdl -library work $proj_dir/sources/interlaken/crc/crc-32.vhd
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# ----------------------------------------------------------
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# Transmitter
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# ----------------------------------------------------------
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read_vhdl -library work $proj_dir/sources/interlaken/transmitter/framing_burst.vhd
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read_vhdl -library work $proj_dir/sources/interlaken/transmitter/framing_meta.vhd
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read_vhdl -library work $proj_dir/sources/interlaken/transmitter/scrambler.vhd
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read_vhdl -library work $proj_dir/sources/interlaken/transmitter/encoder.vhd
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read_vhdl -library work $proj_dir/sources/interlaken/transmitter/interlaken_transmitter.vhd
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# ----------------------------------------------------------
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# Receiver
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# ----------------------------------------------------------
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read_vhdl -library work $proj_dir/sources/interlaken/receiver/deframing_burst.vhd
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read_vhdl -library work $proj_dir/sources/interlaken/receiver/deframing_meta.vhd
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read_vhdl -library work $proj_dir/sources/interlaken/receiver/descrambler.vhd
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read_vhdl -library work $proj_dir/sources/interlaken/receiver/decoder.vhd
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read_vhdl -library work $proj_dir/sources/interlaken/receiver/interlaken_receiver.vhd
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# ----------------------------------------------------------
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# Interlaken Tests
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# ----------------------------------------------------------
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read_vhdl -library work $proj_dir/sources/interlaken/test/data_generator.vhd
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read_vhdl -library work $proj_dir/sources/interlaken/test/pipeline.vhd
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# ----------------------------------------------------------
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# IP cores
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# ----------------------------------------------------------
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import_ip $proj_dir/sources/ip_cores/vc707/clk_40MHz.xci
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import_ip $proj_dir/sources/ip_cores/vc707/Transceiver_10g_64b67b.xci
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import_ip $proj_dir/sources/ip_cores/vc707/RX_FIFO.xci
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import_ip $proj_dir/sources/ip_cores/vc707/TX_FIFO.xci
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import_ip $proj_dir/sources/ip_cores/vc707/ila_data.xci
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import_ip $proj_dir/sources/ip_cores/vc707/vio_0.xci
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# ----------------------------------------------------------
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# finish project initilization
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# ----------------------------------------------------------
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upgrade_ip [get_ips {clk_40MHz Transceiver_10g_64b67b RX_FIFO TX_FIFO ila_data vio_0}]
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read_xdc -verbose $proj_dir/constraints/core1990_constraints_vc707.xdc
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set_property top Interface_Test [current_fileset]
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puts "INFO: Done!"
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