URL
https://opencores.org/ocsvn/core1990_interlaken/core1990_interlaken/trunk
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N.Boukadid |
#
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# File import script for the core1990 interlaken hdl project
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#
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source vivado_import_virtex7.tcl
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# ----------------------------------------------------------
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# Example design files
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# ----------------------------------------------------------
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read_vhdl -library work $proj_dir/sources/example/core1990_test.vhd
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read_vhdl -library work $proj_dir/sources/example/data_generator.vhd
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read_vhdl -library work $proj_dir/sources/example/pipeline.vhd
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# ----------------------------------------------------------
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# Example design IP cores
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# ----------------------------------------------------------
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import_ip $proj_dir/sources/ip_cores/ILA_Data.xci
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import_ip $proj_dir/sources/ip_cores/vio_0.xci
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# ----------------------------------------------------------
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# finish project initilization
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# ----------------------------------------------------------
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upgrade_ip [get_ips]
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read_xdc -verbose $proj_dir/constraints/Core1990_Constraints.xdc
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read_xdc -verbose $proj_dir/constraints/debug_probes.xdc
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set_property target_constrs_file $proj_dir/constraints/debug_probes.xdc [current_fileset -constrset]
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set_property top Interface_Test [current_fileset]
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# ----------------------------------------------------------
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# Example design testbench
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# ----------------------------------------------------------
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set_property SOURCE_SET sources_1 [get_filesets sim_1]
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add_files -fileset sim_1 -norecurse $proj_dir/simulation/testbench_interlaken_interface_behav.wcfg
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add_files -fileset sim_1 -norecurse $proj_dir/simulation/Core1990_Test_tb.vhd
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puts "INFO: Done!"
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