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[/] [graphicsaccelerator/] [trunk/] [Bresenhamer_summary.html] - Blame information for rev 2

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<HTML><HEAD><TITLE>Xilinx Design Summary</TITLE></HEAD>
<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
<TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
<TD ALIGN=CENTER COLSPAN='4'><B>VGA_Top Project Status (05/13/2011 - 10:46:07)</B></TD></TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Project File:</B></TD>
<TD>LineFPGA.xise</TD>
<TD BGCOLOR='#FFFF99'><b>Parser Errors:</b></TD>
<TD> No Errors </TD>
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Module Name:</B></TD>
<TD>Bresenhamer</TD>
<TD BGCOLOR='#FFFF99'><B>Implementation State:</B></TD>
<TD>Synthesized (Stopped)</TD>
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Target Device:</B></TD>
<TD>xa3s200-4ftg256</TD>
<TD BGCOLOR='#FFFF99'><UL><LI><B>Errors:</B></LI></UL></TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Product Version:</B></TD><TD>ISE 12.3</TD>
<TD BGCOLOR='#FFFF99'><UL><LI><B>Warnings:</B></LI></UL></TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Design Goal:</B></dif></TD>
<TD>Balanced</TD>
<TD BGCOLOR='#FFFF99'><UL><LI><B>Routing Results:</B></LI></UL></TD>
<TD>
&nbsp;</TD>
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Design Strategy:</B></dif></TD>
<TD><A HREF_DISABLED='Xilinx Default (unlocked)?&DataKey=Strategy'>Xilinx Default (unlocked)</A></TD>
<TD BGCOLOR='#FFFF99'><UL><LI><B>Timing Constraints:</B></LI></UL></TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Environment:</B></dif></TD>
<TD>
<A HREF_DISABLED='/home/omar/LineFPGA/Bresenhamer_envsettings.html'>
System Settings</A>
</TD>
<TD BGCOLOR='#FFFF99'><UL><LI><B>Final Timing Score:</B></LI></UL></TD>
<TD>&nbsp;</TD>
</TR>
</TABLE>
 
 
 
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='4'><B>Device Utilization Summary (estimated values)</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DeviceUtilizationSummary(estimatedvalues)"><B>[-]</B></a></TD></TR>
<TR ALIGN=CENTER BGCOLOR='#FFFF99'>
<TD ALIGN=LEFT><B>Logic Utilization</B></TD><TD><B>Used</B></TD><TD><B>Available</B></TD><TD COLSPAN='2'><B>Utilization</B></TD></TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Slices</TD>
<TD ALIGN=RIGHT>72</TD>
<TD ALIGN=RIGHT>1920</TD>
<TD ALIGN=RIGHT COLSPAN='2'>3%</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Slice Flip Flops</TD>
<TD ALIGN=RIGHT>44</TD>
<TD ALIGN=RIGHT>3840</TD>
<TD ALIGN=RIGHT COLSPAN='2'>1%</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of 4 input LUTs</TD>
<TD ALIGN=RIGHT>133</TD>
<TD ALIGN=RIGHT>3840</TD>
<TD ALIGN=RIGHT COLSPAN='2'>3%</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of bonded IOBs</TD>
<TD ALIGN=RIGHT>60</TD>
<TD ALIGN=RIGHT>173</TD>
<TD ALIGN=RIGHT COLSPAN='2'>34%</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of GCLKs</TD>
<TD ALIGN=RIGHT>1</TD>
<TD ALIGN=RIGHT>8</TD>
<TD ALIGN=RIGHT COLSPAN='2'>12%</TD>
</TR>
</TABLE>
 
 
 
 
 
 
 
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='6'><B>Detailed Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DetailedReports"><B>[-]</B></a></TD></TR>
<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD>
<TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT COLSPAN='2'><B>Infos</B></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='/home/omar/LineFPGA/Bresenhamer.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Fri May 13 10:15:19 2011</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD>Translation Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD>Map Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD>Place and Route Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD>CPLD Fitter Report (Text)</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD>Power Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD>Post-PAR Static Timing Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
<TR ALIGN=LEFT><TD>Bitgen Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
</TABLE>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='3'><B>Secondary Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=SecondaryReports"><B>[-]</B></a></TD></TR>
<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD COLSPAN='2'><B>Generated</B></TD></TR>
</TABLE>
 
 
<br><center><b>Date Generated:</b> 05/13/2011 - 10:46:32</center>
</BODY></HTML>

Line No.	Rev	Author	Line
1	2	OmarMokhta	`<HTML><HEAD><TITLE>Xilinx Design Summary</TITLE></HEAD>`
2			`<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>`
3			`<TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>`
4			`<TR ALIGN=CENTER BGCOLOR='#99CCFF'>`
5			`<TD ALIGN=CENTER COLSPAN='4'><B>VGA_Top Project Status (05/13/2011 - 10:46:07)</B></TD></TR>`
6			`<TR ALIGN=LEFT>`
7			`<TD BGCOLOR='#FFFF99'><B>Project File:</B></TD>`
8			`<TD>LineFPGA.xise</TD>`
9			`<TD BGCOLOR='#FFFF99'><b>Parser Errors:</b></TD>`
10			`<TD> No Errors </TD>`
11			`</TR>`
12			`<TR ALIGN=LEFT>`
13			`<TD BGCOLOR='#FFFF99'><B>Module Name:</B></TD>`
14			`<TD>Bresenhamer</TD>`
15			`<TD BGCOLOR='#FFFF99'><B>Implementation State:</B></TD>`
16			`<TD>Synthesized (Stopped)</TD>`
17			`</TR>`
18			`<TR ALIGN=LEFT>`
19			`<TD BGCOLOR='#FFFF99'><B>Target Device:</B></TD>`
20			`<TD>xa3s200-4ftg256</TD>`
21			`<TD BGCOLOR='#FFFF99'><UL><LI><B>Errors:</B></LI></UL></TD>`
22			`<TD> </TD>`
23			`</TR>`
24			`<TR ALIGN=LEFT>`
25			`<TD BGCOLOR='#FFFF99'><B>Product Version:</B></TD><TD>ISE 12.3</TD>`
26			`<TD BGCOLOR='#FFFF99'><UL><LI><B>Warnings:</B></LI></UL></TD>`
27			`<TD> </TD>`
28			`</TR>`
29			`<TR ALIGN=LEFT>`
30			`<TD BGCOLOR='#FFFF99'><B>Design Goal:</B></dif></TD>`
31			`<TD>Balanced</TD>`
32			`<TD BGCOLOR='#FFFF99'><UL><LI><B>Routing Results:</B></LI></UL></TD>`
33			`<TD>`
34			` </TD>`
35			`</TR>`
36			`<TR ALIGN=LEFT>`
37			`<TD BGCOLOR='#FFFF99'><B>Design Strategy:</B></dif></TD>`
38			`<TD><A HREF_DISABLED='Xilinx Default (unlocked)?&DataKey=Strategy'>Xilinx Default (unlocked)</A></TD>`
39			`<TD BGCOLOR='#FFFF99'><UL><LI><B>Timing Constraints:</B></LI></UL></TD>`
40			`<TD> </TD>`
41			`</TR>`
42			`<TR ALIGN=LEFT>`
43			`<TD BGCOLOR='#FFFF99'><B>Environment:</B></dif></TD>`
44			`<TD>`
45			`<A HREF_DISABLED='/home/omar/LineFPGA/Bresenhamer_envsettings.html'>`
46			`System Settings</A>`
47			`</TD>`
48			`<TD BGCOLOR='#FFFF99'><UL><LI><B>Final Timing Score:</B></LI></UL></TD>`
49			`<TD> </TD>`
50			`</TR>`
51			`</TABLE>`
52
53
54
55			` <BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>`
56			`<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='4'><B>Device Utilization Summary (estimated values)</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DeviceUtilizationSummary(estimatedvalues)"><B>[-]</B></a></TD></TR>`
57			`<TR ALIGN=CENTER BGCOLOR='#FFFF99'>`
58			`<TD ALIGN=LEFT><B>Logic Utilization</B></TD><TD><B>Used</B></TD><TD><B>Available</B></TD><TD COLSPAN='2'><B>Utilization</B></TD></TR>`
59			`<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Slices</TD>`
60			`<TD ALIGN=RIGHT>72</TD>`
61			`<TD ALIGN=RIGHT>1920</TD>`
62			`<TD ALIGN=RIGHT COLSPAN='2'>3%</TD>`
63			`</TR>`
64			`<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Slice Flip Flops</TD>`
65			`<TD ALIGN=RIGHT>44</TD>`
66			`<TD ALIGN=RIGHT>3840</TD>`
67			`<TD ALIGN=RIGHT COLSPAN='2'>1%</TD>`
68			`</TR>`
69			`<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of 4 input LUTs</TD>`
70			`<TD ALIGN=RIGHT>133</TD>`
71			`<TD ALIGN=RIGHT>3840</TD>`
72			`<TD ALIGN=RIGHT COLSPAN='2'>3%</TD>`
73			`</TR>`
74			`<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of bonded IOBs</TD>`
75			`<TD ALIGN=RIGHT>60</TD>`
76			`<TD ALIGN=RIGHT>173</TD>`
77			`<TD ALIGN=RIGHT COLSPAN='2'>34%</TD>`
78			`</TR>`
79			`<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of GCLKs</TD>`
80			`<TD ALIGN=RIGHT>1</TD>`
81			`<TD ALIGN=RIGHT>8</TD>`
82			`<TD ALIGN=RIGHT COLSPAN='2'>12%</TD>`
83			`</TR>`
84			`</TABLE>`
85
86
87
88
89
90
91
92			` <BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>`
93			`<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='6'><B>Detailed Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DetailedReports"><B>[-]</B></a></TD></TR>`
94			`<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD>`
95			`<TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT COLSPAN='2'><B>Infos</B></TD></TR>`
96			`<TR ALIGN=LEFT><TD><A HREF_DISABLED='/home/omar/LineFPGA/Bresenhamer.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Fri May 13 10:15:19 2011</TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR>`
97			`<TR ALIGN=LEFT><TD>Translation Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR>`
98			`<TR ALIGN=LEFT><TD>Map Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR>`
99			`<TR ALIGN=LEFT><TD>Place and Route Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR>`
100			`<TR ALIGN=LEFT><TD>CPLD Fitter Report (Text)</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR>`
101			`<TR ALIGN=LEFT><TD>Power Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR>`
102			`<TR ALIGN=LEFT><TD>Post-PAR Static Timing Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR>`
103			`<TR ALIGN=LEFT><TD>Bitgen Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR>`
104			`</TABLE>`
105			` <BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>`
106			`<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='3'><B>Secondary Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=SecondaryReports"><B>[-]</B></a></TD></TR>`
107			`<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD COLSPAN='2'><B>Generated</B></TD></TR>`
108			`</TABLE>`
109
110
111			`<br><center><b>Date Generated:</b> 05/13/2011 - 10:46:32</center>`
112			`</BODY></HTML>`

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[/] [graphicsaccelerator/] [trunk/] [Bresenhamer_summary.html] - Blame information for rev 2