Subversion Repositories lpffir

                       LPFFIR Project README

DIRECTORY STRUCTURE:

── bench            Top level test bench

│   ├── systemc     For SystemC sources

│   └── verilog     For verilog sources

│

├── doc             Specification, design, verification and other PDF documents

│   └── src         Source version of all documents (Microsoft Word, Microsoft Visio)

│

├── rtl             Verilog RTL sources

│

├── sim             Top level simulations

│   ├── matlab_sim  MATLAB simulations

│   │   ├── out     Useful output from MATLAB simulation

│   │   └── run     MATLAB sources and for running MATLAB simulations

│   │

│   └── rtl_sim     RTL simulations

│       ├── out     Useful output from RTL simulation

│       └── run     For running RTL simulations

│

└── sw              Software sources for Python script utilities

    ├── out         Useful output from Python script utilities

    └── run         Python sources and for running Python script utilities

OPEN-SOURCE TOOLS:

1. Ubuntu 18.04 LTS         Linux OS development platform

2. SystemC 2.3.2-Accellera  SystemC test bench simulator

3. Verilator                Verilog simulator

4. GTKWave                  Verilog simulation waveform viewer

5. GNU Octave               Octave syntax is largely compatible with MATLAB

6. Python                   RTL-simulation vs. MATLAB-expected check script