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[/] [neo430/] [trunk/] [neo430/] [rtl/] [core/] [neo430_sysconfig.vhd] - Blame information for rev 198

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1 198 zero_gravi
-- #################################################################################################
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-- #  << NEO430 - System Configuration Memory >>                                                   #
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-- # ********************************************************************************************* #
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-- # This is a read only memory providing information about the processor configuration obtained   #
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-- # from the top entity's generics.                                                               #
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-- # ********************************************************************************************* #
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-- # BSD 3-Clause License                                                                          #
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-- #                                                                                               #
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-- # Copyright (c) 2020, Stephan Nolting. All rights reserved.                                     #
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-- #                                                                                               #
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-- # Redistribution and use in source and binary forms, with or without modification, are          #
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-- # permitted provided that the following conditions are met:                                     #
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-- #                                                                                               #
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-- # 1. Redistributions of source code must retain the above copyright notice, this list of        #
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-- #    conditions and the following disclaimer.                                                   #
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-- #                                                                                               #
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-- # 2. Redistributions in binary form must reproduce the above copyright notice, this list of     #
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-- #    conditions and the following disclaimer in the documentation and/or other materials        #
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-- #    provided with the distribution.                                                            #
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-- #                                                                                               #
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-- # 3. Neither the name of the copyright holder nor the names of its contributors may be used to  #
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-- #    endorse or promote products derived from this software without specific prior written      #
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-- #    permission.                                                                                #
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-- #                                                                                               #
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-- # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS   #
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-- # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF               #
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-- # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE    #
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-- # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,     #
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-- # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
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-- # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED    #
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-- # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING     #
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-- # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED  #
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-- # OF THE POSSIBILITY OF SUCH DAMAGE.                                                            #
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-- # ********************************************************************************************* #
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-- # The NEO430 Processor - https://github.com/stnolting/neo430                                    #
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-- #################################################################################################
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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library neo430;
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use neo430.neo430_package.all;
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entity neo430_sysconfig is
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  generic (
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    -- general configuration --
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    CLOCK_SPEED  : natural := 100000000; -- main clock in Hz
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    IMEM_SIZE    : natural := 4*1024; -- internal IMEM size in bytes
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    DMEM_SIZE    : natural := 2*1024; -- internal DMEM size in bytes
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    -- additional configuration --
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    USER_CODE    : std_ulogic_vector(15 downto 0) := x"0000"; -- custom user code
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    -- module configuration --
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    MULDIV_USE   : boolean := true; -- implement multiplier/divider unit?
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    WB32_USE     : boolean := true; -- implement WB32 unit?
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    WDT_USE      : boolean := true; -- implement WDT?
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    GPIO_USE     : boolean := true; -- implement GPIO unit?
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    TIMER_USE    : boolean := true; -- implement timer?
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    UART_USE     : boolean := true; -- implement UART?
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    CRC_USE      : boolean := true; -- implement CRC unit?
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    CFU_USE      : boolean := true; -- implement CF unit?
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    PWM_USE      : boolean := true; -- implement PWM controller?
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    TWI_USE      : boolean := true; -- implement TWI?
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    SPI_USE      : boolean := true; -- implement SPI?
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    TRNG_USE     : boolean := true; -- implement TRNG?
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    EXIRQ_USE    : boolean := true; -- implement EXIRQ?
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    FREQ_GEN_USE : boolean := true; -- implement FREQ_GEN?
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    -- boot configuration --
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    BOOTLD_USE   : boolean := true; -- implement and use bootloader?
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    IMEM_AS_ROM  : boolean := false -- implement IMEM as read-only memory?
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  );
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  port (
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    clk_i  : in  std_ulogic; -- global clock line
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    rden_i : in  std_ulogic; -- read enable
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    wren_i : in  std_ulogic; -- write enable
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    addr_i : in  std_ulogic_vector(15 downto 0); -- address
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    data_i : in  std_ulogic_vector(15 downto 0); -- data in
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    data_o : out std_ulogic_vector(15 downto 0)  -- data out
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  );
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end neo430_sysconfig;
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architecture neo430_sysconfig_rtl of neo430_sysconfig is
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  -- IO space: module base address --
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  constant hi_abb_c : natural := index_size_f(io_size_c)-1; -- high address boundary bit
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  constant lo_abb_c : natural := index_size_f(sysconfig_size_c); -- low address boundary bit
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  -- access control --
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  signal acc_en    : std_ulogic; -- access enable
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  signal addr      : std_ulogic_vector(15 downto 0);
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  signal rden      : std_ulogic;
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  signal info_addr : std_ulogic_vector(02 downto 0);
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  -- misc --
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  signal f_clk : std_ulogic_vector(31 downto 0);
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  -- system information ROM --
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  type info_mem_t is array (0 to 7) of std_ulogic_vector(15 downto 0);
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  signal sysinfo_mem : info_mem_t; -- ROM
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begin
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  -- Access Control -----------------------------------------------------------
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  -- -----------------------------------------------------------------------------
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  acc_en <= '1' when (addr_i(hi_abb_c downto lo_abb_c) = sysconfig_base_c(hi_abb_c downto lo_abb_c)) else '0';
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  addr   <= sysconfig_base_c(15 downto lo_abb_c) & addr_i(lo_abb_c-1 downto 1) & '0'; -- word aligned
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  rden   <= acc_en and rden_i;
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  info_addr <= addr(index_size_f(sysconfig_size_c)-1 downto 1);
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  -- Construct Info ROM -------------------------------------------------------
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  -- -----------------------------------------------------------------------------
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  -- CPUID0: HW version --
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  sysinfo_mem(0) <= hw_version_c; -- HW version
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  -- CPUID1: System setup (available HW units / IO / peripheral devices) --
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  sysinfo_mem(1)(00) <= '1' when (MULDIV_USE   = true) else '0'; -- MULDIV present?
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  sysinfo_mem(1)(01) <= '1' when (WB32_USE     = true) else '0'; -- WB32 present?
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  sysinfo_mem(1)(02) <= '1' when (WDT_USE      = true) else '0'; -- WDT present?
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  sysinfo_mem(1)(03) <= '1' when (GPIO_USE     = true) else '0'; -- GPIO present?
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  sysinfo_mem(1)(04) <= '1' when (TIMER_USE    = true) else '0'; -- TIMER present?
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  sysinfo_mem(1)(05) <= '1' when (UART_USE     = true) else '0'; -- UART present?
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  sysinfo_mem(1)(06) <= '1' when (FREQ_GEN_USE = true) else '0'; -- FREQ_GEN present?
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  sysinfo_mem(1)(07) <= '1' when (BOOTLD_USE   = true) else '0'; -- bootloader present?
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  sysinfo_mem(1)(08) <= '1' when (IMEM_AS_ROM  = true) else '0'; -- IMEM implemented as true ROM?
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  sysinfo_mem(1)(09) <= '1' when (CRC_USE      = true) else '0'; -- CRC present?
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  sysinfo_mem(1)(10) <= '1' when (CFU_USE      = true) else '0'; -- CFU present?
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  sysinfo_mem(1)(11) <= '1' when (PWM_USE      = true) else '0'; -- PWM present?
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  sysinfo_mem(1)(12) <= '1' when (TWI_USE      = true) else '0'; -- TWI present?
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  sysinfo_mem(1)(13) <= '1' when (SPI_USE      = true) else '0'; -- SPI present?
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  sysinfo_mem(1)(14) <= '1' when (TRNG_USE     = true) else '0'; -- TRNG present?
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  sysinfo_mem(1)(15) <= '1' when (EXIRQ_USE    = true) else '0'; -- EXIRQ present?
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  -- CPUID2: User code --
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  sysinfo_mem(2) <= USER_CODE;
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  -- CPUID3: IMEM (ROM/RAM) size --
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  sysinfo_mem(3) <= std_ulogic_vector(to_unsigned(IMEM_SIZE, 16)); -- size in bytes
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  -- CPUID4: Advanced hardware configuration --
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  sysinfo_mem(4)(00) <= '1' when (use_dsp_mul_c    = true) else '0'; -- use DSP blocks for MULDIV.multiplier
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  sysinfo_mem(4)(01) <= '1' when (use_xalu_c       = true) else '0'; -- implement eXtended ALU functions
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  sysinfo_mem(4)(02) <= '1' when (low_power_mode_c = true) else '0'; -- use (experimental) low-power mode
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  sysinfo_mem(4)(15 downto 03) <= (others => '0'); -- reserved
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  -- CPUID5: DMEM (RAM) size --
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  sysinfo_mem(5) <= std_ulogic_vector(to_unsigned(DMEM_SIZE, 16)); -- size in bytes
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  -- CPUID6/CPUID7: Clock speed --
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  f_clk <= std_ulogic_vector(to_unsigned(CLOCK_SPEED, 32));
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  sysinfo_mem(6) <= f_clk(15 downto 00); -- clock speed LO
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  sysinfo_mem(7) <= f_clk(31 downto 16); -- clock speed HI
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  -- Read Access --------------------------------------------------------------
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  -- -----------------------------------------------------------------------------
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  read_access: process(clk_i)
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  begin
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    if rising_edge(clk_i) then
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      if (rden = '1') then
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        data_o <= sysinfo_mem(to_integer(unsigned(info_addr)));
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      else
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        data_o <= (others => '0');
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      end if;
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    end if;
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  end process read_access;
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end neo430_sysconfig_rtl;

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