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zero_gravi |
// #################################################################################################
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// # < NEO430 Bootloader > #
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// # ********************************************************************************************* #
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// # Boot from IMEM, UART or SPI Flash at SPI.CS[0] #
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// # #
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// # UART configuration: 8N1 at 19200 baud #
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// # Boot Flash: 8-bit SPI, 24-bit addresses (like Micron N25Q032A) @ NEO430_SPI.CS[0] #
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// # NEO430_GPIO.out[0] is used as high-active status LED #
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// # #
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// # Auto boot sequence after timeout: #
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// # -> Try booting from SPI flash at SPI.CS[0] #
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// # -> Permanently light up status led and freeze if SPI flash booting attempt fails #
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// # ********************************************************************************************* #
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// # BSD 3-Clause License #
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// # #
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// # Copyright (c) 2020, Stephan Nolting. All rights reserved. #
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// # #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # permitted provided that the following conditions are met: #
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// # #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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// # conditions and the following disclaimer. #
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// # #
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// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
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// # conditions and the following disclaimer in the documentation and/or other materials #
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// # provided with the distribution. #
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// # #
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// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
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// # endorse or promote products derived from this software without specific prior written #
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// # permission. #
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// # #
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// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
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// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
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// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
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// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
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// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
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// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
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// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
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// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
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// # OF THE POSSIBILITY OF SUCH DAMAGE. #
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// # ********************************************************************************************* #
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// # The NEO430 Processor - https://github.com/stnolting/neo430 #
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// #################################################################################################
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// Libraries
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#include <stdint.h>
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#include <neo430.h>
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// SPI flash: NEO430 boot base address
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#define SPI_FLASH_BOOT_ADR 0x00040000L
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// Configuration
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#define BAUD_RATE 19200 // default UART baud rate
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#define AUTOBOOT_TIMEOUT 4 // countdown (seconds) to auto boot
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#define STATUS_LED 0 // GPIO.out(0) is status LED
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// SPI flash hardware configuration
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#define SPI_FLASH_CS 0
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// SPI flash commands
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#define SPI_FLASH_CMD_READ 0x03
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#define SPI_FLASH_CMD_READ_STATUS 0x05
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#define SPI_FLASH_CMD_WRITE_ENABLE 0x06
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#define SPI_FLASH_CMD_PAGE_PROGRAM 0x02
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#define SPI_FLASH_CMD_SECTOR_ERASE 0xD8
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#define SPI_FLASH_CMD_READ_ID 0x9E
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#define SPI_FLASH_CMD_POWER_DOWN 0xB9
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#define SPI_FLASH_CMD_RELEASE 0xAB
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// Image sources
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#define UART_IMAGE 0x00
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#define EEPROM_IMAGE_SPI 0x01
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// Error codes
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#define ERROR_EEPROM 0x00 // EEPROM access error
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#define ERROR_ROMACCESS 0x01 // cannot write to IMEM
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#define ERROR_EXECUTABLE 0x02 // invalid executable format
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#define ERROR_SIZE 0x04 // executable is too big
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#define ERROR_CHECKSUM 0x08 // checksum error
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// Scratch registers - abuse unused IRQ vectors for this ;)
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#define TIMEOUT_CNT IRQVEC_GPIO
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// Macros
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#define xstr(a) str(a)
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#define str(a) #a
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#define SPI_FLASH_SEL {SPI_CT |= 1 << (SPI_FLASH_CS+SPI_CT_CS_SEL0);}
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// Function prototypes
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void __attribute__((__interrupt__)) timer_irq_handler(void);
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void __attribute__((__naked__)) start_app(void);
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void print_help(void);
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void store_eeprom(void);
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void eeprom_write_word(uint32_t a, uint16_t d);
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void get_image(uint8_t src);
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uint16_t get_image_word(uint32_t a, uint8_t src);
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void __attribute__((__naked__)) system_error(uint8_t err_code);
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// Function prototypes - SPI flash
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uint8_t spi_flash_read_byte();
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void spi_flash_write_byte(uint32_t adr, uint8_t data);
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void spi_flash_erase_sector(uint32_t base_adr);
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uint8_t spi_flash_read_status(void);
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void spi_flash_write_cmd(uint16_t cmd);
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uint8_t spi_flash_read_1st_id(void);
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void spi_flash_adr_conv(uint32_t adr, uint16_t *hi, uint16_t *mi, uint16_t *lo);
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/* ------------------------------------------------------------
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* INFO Bootloader main
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* ------------------------------------------------------------ */
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int main(void) {
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// ****************************************************************
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// Processor hardware initialization
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// ****************************************************************
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// stack setup
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// -> done in boot_crt0
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// disable watchdog timer
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neo430_wdt_disable();
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// clear status register and disable interrupts, clear interrupt buffer, enable write access to IMEM
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asm volatile ("mov %0, r2" : : "i" ((1<<R_FLAG) | (1<<Q_FLAG)));
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// disable TRNG
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TRNG_CT = 0;
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// disable Wishbone interface
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WB32_CT = 0;
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// disable PWM
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PWM_CT = 0;
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// disable TWI
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TWI_CT = 0;
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// disable EXIRQ
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EXIRQ_CT = 0;
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// disable FREQ_GEN
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FREQ_GEN_CT = 0;
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// init GPIO
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GPIO_IRQMASK = 0; // no pin change interrupt please, thanks
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neo430_gpio_port_set(1<<STATUS_LED); // activate status LED, clear all others
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// init interrupt vectors
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IRQVEC_TIMER = (uint16_t)(&timer_irq_handler); // timer match
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//IRQVEC_EXT = 0; // unused
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//IRQVEC_SERIAL = 0; // unused
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// set Baud rate & init UART control register:
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// enable UART, no IRQs
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neo430_uart_setup(BAUD_RATE);
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neo430_uart_char_read(); // clear UART RX buffer
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// set SPI config:
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// enable SPI, no IRQ, MSB first, 8-bit mode, SPI clock mode 0, set SPI speed, disable all SPI CS lines (set high)
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neo430_spi_enable(SPI_PRSC_8); // this also resets the SPI module
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// Timeout counter: init timer, irq tick @ ~1Hz (prescaler = 4096)
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// THR = f_main / (1Hz + 4096) -1
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TMR_CT = 0; // reset timer
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//uint32_t clock = CLOCKSPEED_32bit >> 14; // divide by 4096
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TMR_THRES = (CLOCKSPEED_HI << 2) -1; // "fake" ;D
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// enable timer, auto reset, enable IRQ, prsc = 1:2^16, start timer
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TMR_CT = (1<<TMR_CT_EN) | (1<<TMR_CT_ARST) | (1<<TMR_CT_IRQ) | ((16-1)<<TMR_CT_PRSC0) | (1<<TMR_CT_RUN);
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TIMEOUT_CNT = 0; // console timeout ticker
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neo430_eint(); // enable global interrupts
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// ****************************************************************
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// Show bootloader intro and system information
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// ****************************************************************
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neo430_uart_br_print("\n\nNEO430 Bootloader\n"
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"\n"
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"BLV: "__DATE__"\n"
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"HWV: 0x");
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neo430_uart_print_hex_word(HW_VERSION);
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neo430_uart_br_print("\nUSR: 0x");
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neo430_uart_print_hex_word(USER_CODE);
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neo430_uart_br_print("\nCLK: 0x");
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neo430_uart_print_hex_word(CLOCKSPEED_HI);
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neo430_uart_print_hex_word(CLOCKSPEED_LO);
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neo430_uart_br_print("\nROM: 0x");
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neo430_uart_print_hex_word(IMEM_SIZE);
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neo430_uart_br_print("\nRAM: 0x");
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neo430_uart_print_hex_word(DMEM_SIZE);
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neo430_uart_br_print("\nSYS: 0x");
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neo430_uart_print_hex_word(SYS_FEATURES);
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// get SPI flash out of power down mode
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spi_flash_write_cmd((uint16_t)SPI_FLASH_CMD_RELEASE);
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// ****************************************************************
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// Auto boot sequence
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// ****************************************************************
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neo430_uart_br_print("\n\nAutoboot in "xstr(AUTOBOOT_TIMEOUT)"s. Press key to abort.\n\n");
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while (1) { // wait for any key to be pressed or timeout
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// timeout? start auto boot sequence
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if (TIMEOUT_CNT == 4*AUTOBOOT_TIMEOUT) { // in 0.25 seconds
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get_image(EEPROM_IMAGE_SPI); // try loading from EEPROM
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neo430_uart_br_print("\n");
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start_app(); // start app
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}
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// key pressed? -> enter user console
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if ((UART_RTX & (1<<UART_RTX_AVAIL)) != 0) {
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break;
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}
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}
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print_help();
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// ****************************************************************
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// Bootloader console
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// ****************************************************************
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while (1) {
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neo430_uart_br_print("\nCMD:> ");
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char c = neo430_uart_getc();
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neo430_uart_putc(c); // echo
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neo430_uart_br_print("\n");
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if (c == 'r') { // restart bootloader
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asm volatile ("mov #0xF000, r0"); // jump to beginning of bootloader ROM
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}
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else if (c == 'h') { // help menu
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print_help();
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}
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else if (c == 'u') { // upload program to RAM via UART
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get_image(UART_IMAGE);
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}
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else if (c == 'p') { // program EEPROM from RAM
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store_eeprom();
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}
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else if (c == 'e') { // start program in RAM
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start_app();
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}
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else { // unknown command
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neo430_uart_br_print("Bad CMD");
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}
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}
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}
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/* ------------------------------------------------------------
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* INFO Timer IRQ handler
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* ------------------------------------------------------------ */
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void __attribute__((__interrupt__)) timer_irq_handler(void) {
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TIMEOUT_CNT++; // increment system ticker
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neo430_gpio_port_toggle(1<<STATUS_LED); // toggle status LED
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}
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/* ------------------------------------------------------------
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* INFO Start application in IMEM
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* INFO "naked" since this is final...
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* ------------------------------------------------------------ */
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void __attribute__((__naked__)) start_app(void) {
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// put SPI flah into power-down mode
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spi_flash_write_cmd((uint16_t)SPI_FLASH_CMD_POWER_DOWN);
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neo430_uart_br_print("Booting...\n\n");
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// wait for UART to finish transmitting
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while ((UART_CT & (1<<UART_CT_TX_BUSY)) != 0);
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// deactivate IRQs, no more write access to IMEM, clear all pending IRQs
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asm volatile ("mov %0, r2" : : "i" (1<<Q_FLAG));
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// start app in IMEM at address 0x0000
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while (1) {
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asm volatile ("mov #0x0000, r0");
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}
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}
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/* ------------------------------------------------------------
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* INFO Print help text
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* ------------------------------------------------------------ */
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void print_help(void) {
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neo430_uart_br_print("CMDs:\n"
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"h: Help\n"
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"r: Restart\n"
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"u: Upload\n"
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"p: Prog\n"
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"e: Execute");
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}
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| 299 |
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| 300 |
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| 301 |
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/* ------------------------------------------------------------
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* INFO Store full IMEM content to SPI EEPROM at SPI.CS0
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| 303 |
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* ------------------------------------------------------------ */
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void store_eeprom(void) {
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neo430_uart_br_print("...");
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// clear memory before writing
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spi_flash_erase_sector(SPI_FLASH_BOOT_ADR);
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// check if eeprom ready (or available at all)
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if (spi_flash_read_1st_id() == 0x00) { // manufacturer ID
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system_error(ERROR_EEPROM);
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}
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// write EXE signature
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eeprom_write_word(SPI_FLASH_BOOT_ADR + 0, 0xCAFE);
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// write size
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uint16_t end = IMEM_SIZE;
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eeprom_write_word(SPI_FLASH_BOOT_ADR + 2, end);
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| 323 |
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// store data from IMEM and update checksum
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uint16_t checksum = 0;
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| 325 |
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uint16_t i = 0;
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| 326 |
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uint16_t *pnt = (uint16_t*)0x0000;
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| 328 |
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while (i < end) {
|
| 329 |
|
|
uint16_t d = (uint16_t)*pnt++;
|
| 330 |
|
|
checksum ^= d;
|
| 331 |
|
|
eeprom_write_word(SPI_FLASH_BOOT_ADR + 6 + i, d);
|
| 332 |
|
|
i+= 2;
|
| 333 |
|
|
}
|
| 334 |
|
|
|
| 335 |
|
|
// write checksum
|
| 336 |
|
|
eeprom_write_word(SPI_FLASH_BOOT_ADR + 4, checksum);
|
| 337 |
|
|
|
| 338 |
|
|
neo430_uart_br_print("OK");
|
| 339 |
|
|
}
|
| 340 |
|
|
|
| 341 |
|
|
|
| 342 |
|
|
/* ------------------------------------------------------------
|
| 343 |
|
|
* INFO EEPROM write data word
|
| 344 |
|
|
* PARAM a destination address (24 bit effective)
|
| 345 |
|
|
* PARAM d word to be written
|
| 346 |
|
|
* ------------------------------------------------------------ */
|
| 347 |
|
|
void eeprom_write_word(uint32_t a, uint16_t d) {
|
| 348 |
|
|
|
| 349 |
|
|
uint8_t lo = (uint8_t)(d);
|
| 350 |
|
|
uint8_t hi = (uint8_t)neo430_bswap(d);
|
| 351 |
|
|
|
| 352 |
|
|
spi_flash_write_byte(a+0, hi);
|
| 353 |
|
|
spi_flash_write_byte(a+1, lo);
|
| 354 |
|
|
}
|
| 355 |
|
|
|
| 356 |
|
|
|
| 357 |
|
|
/* ------------------------------------------------------------
|
| 358 |
|
|
* INFO Get IMEM image from SPI EEPROM at SPI.CS0 or from UART
|
| 359 |
|
|
* PARAM src Image source 0: UART, 1: SPI_EEPROM
|
| 360 |
|
|
* RETURN error code (0 if successful)
|
| 361 |
|
|
* ------------------------------------------------------------ */
|
| 362 |
|
|
void get_image(uint8_t src) {
|
| 363 |
|
|
|
| 364 |
|
|
// abort if IMEM was implemented as true ROM
|
| 365 |
|
|
if (SYS_FEATURES & (1<<SYS_IROM_EN)) {
|
| 366 |
|
|
system_error(ERROR_ROMACCESS);
|
| 367 |
|
|
}
|
| 368 |
|
|
|
| 369 |
|
|
// print intro
|
| 370 |
|
|
if (src == UART_IMAGE) { // boot via UART
|
| 371 |
|
|
neo430_uart_br_print("Awaiting BINEXE...");
|
| 372 |
|
|
}
|
| 373 |
|
|
else { //if (src == EEPROM_IMAGE_SPI)// boot from EEPROM
|
| 374 |
|
|
neo430_uart_br_print("Loading...");
|
| 375 |
|
|
}
|
| 376 |
|
|
|
| 377 |
|
|
// check if valid image
|
| 378 |
|
|
if (get_image_word(SPI_FLASH_BOOT_ADR + 0, src) != 0xCAFE) { // signature
|
| 379 |
|
|
system_error(ERROR_EXECUTABLE);
|
| 380 |
|
|
}
|
| 381 |
|
|
|
| 382 |
|
|
// image size and checksum
|
| 383 |
|
|
uint16_t size = get_image_word(SPI_FLASH_BOOT_ADR + 2, src); // size in bytes
|
| 384 |
|
|
uint16_t check = get_image_word(SPI_FLASH_BOOT_ADR + 4, src); // XOR checksum
|
| 385 |
|
|
uint16_t end = IMEM_SIZE;
|
| 386 |
|
|
if (size > end) {
|
| 387 |
|
|
system_error(ERROR_SIZE);
|
| 388 |
|
|
}
|
| 389 |
|
|
|
| 390 |
|
|
// transfer program data
|
| 391 |
|
|
uint16_t *pnt = (uint16_t*)0x0000;
|
| 392 |
|
|
uint16_t checksum = 0x0000;
|
| 393 |
|
|
uint16_t d = 0, i = 0;
|
| 394 |
|
|
while (i < size/2) { // in words
|
| 395 |
|
|
d = get_image_word(SPI_FLASH_BOOT_ADR + 2*i + 6, src);
|
| 396 |
|
|
checksum ^= d;
|
| 397 |
|
|
pnt[i++] = d;
|
| 398 |
|
|
}
|
| 399 |
|
|
|
| 400 |
|
|
// clear rest of IMEM
|
| 401 |
|
|
while(i < end/2) { // in words
|
| 402 |
|
|
pnt[i++] = 0x0000;
|
| 403 |
|
|
}
|
| 404 |
|
|
|
| 405 |
|
|
// error during transfer?
|
| 406 |
|
|
if (checksum == check) {
|
| 407 |
|
|
neo430_uart_br_print("OK");
|
| 408 |
|
|
}
|
| 409 |
|
|
else {
|
| 410 |
|
|
system_error(ERROR_CHECKSUM);
|
| 411 |
|
|
}
|
| 412 |
|
|
}
|
| 413 |
|
|
|
| 414 |
|
|
|
| 415 |
|
|
/* ------------------------------------------------------------
|
| 416 |
|
|
* INFO Get image word from SPI_EEPROM or UART
|
| 417 |
|
|
* PARAM a source address (24 bit effective)
|
| 418 |
|
|
* PARAM src: 0: UART, 1: SPI_EEPROM
|
| 419 |
|
|
* RETURN accessed data word
|
| 420 |
|
|
* ------------------------------------------------------------ */
|
| 421 |
|
|
uint16_t get_image_word(uint32_t a, uint8_t src) {
|
| 422 |
|
|
|
| 423 |
|
|
uint8_t c0 = 0, c1 = 0;
|
| 424 |
|
|
|
| 425 |
|
|
// reads have to be consecutive when reading from the UART
|
| 426 |
|
|
if (src == UART_IMAGE) { // get image data via UART
|
| 427 |
|
|
c0 = (uint8_t)neo430_uart_getc();
|
| 428 |
|
|
c1 = (uint8_t)neo430_uart_getc();
|
| 429 |
|
|
}
|
| 430 |
|
|
else {// if (src == EEPROM_IMAGE_SPI) { // get image data from SPI EEPROM
|
| 431 |
|
|
c0 = spi_flash_read_byte(a+0);
|
| 432 |
|
|
c1 = spi_flash_read_byte(a+1);
|
| 433 |
|
|
}
|
| 434 |
|
|
|
| 435 |
|
|
//uint16_t r = (((uint16_t)c0) << 8) | (((uint16_t)c1) << 0);
|
| 436 |
|
|
uint16_t r = neo430_combine_bytes(c0, c1);
|
| 437 |
|
|
|
| 438 |
|
|
return r;
|
| 439 |
|
|
}
|
| 440 |
|
|
|
| 441 |
|
|
|
| 442 |
|
|
/* ------------------------------------------------------------
|
| 443 |
|
|
* INFO Print error message, light up status LED and freeze system
|
| 444 |
|
|
* INFO "naked" since this is final
|
| 445 |
|
|
* PARAM error code
|
| 446 |
|
|
* ------------------------------------------------------------ */
|
| 447 |
|
|
void __attribute__((__naked__)) system_error(uint8_t err_code){
|
| 448 |
|
|
|
| 449 |
|
|
neo430_uart_br_print("\a\nERR_"); // output error code with annoying bell sound
|
| 450 |
|
|
neo430_uart_print_hex_byte(err_code);
|
| 451 |
|
|
|
| 452 |
|
|
asm volatile ("mov #0, r2"); // deactivate IRQs, no more write access to IMEM
|
| 453 |
|
|
neo430_gpio_port_set(1<<STATUS_LED); // permanently light up status LED
|
| 454 |
|
|
|
| 455 |
|
|
while(1); // freeze
|
| 456 |
|
|
}
|
| 457 |
|
|
|
| 458 |
|
|
|
| 459 |
|
|
|
| 460 |
|
|
// *************************************************************************************
|
| 461 |
|
|
// SPI flash functions
|
| 462 |
|
|
// *************************************************************************************
|
| 463 |
|
|
|
| 464 |
|
|
/* ------------------------------------------------------------
|
| 465 |
|
|
* Read single byte from flash (24-bit adress)
|
| 466 |
|
|
* ------------------------------------------------------------ */
|
| 467 |
|
|
uint8_t spi_flash_read_byte(uint32_t adr) {
|
| 468 |
|
|
|
| 469 |
|
|
uint16_t adr_lo;
|
| 470 |
|
|
uint16_t adr_mi;
|
| 471 |
|
|
uint16_t adr_hi;
|
| 472 |
|
|
spi_flash_adr_conv(adr, &adr_hi, &adr_mi, &adr_lo);
|
| 473 |
|
|
|
| 474 |
|
|
SPI_FLASH_SEL;
|
| 475 |
|
|
|
| 476 |
|
|
neo430_spi_trans((uint16_t)SPI_FLASH_CMD_READ);
|
| 477 |
|
|
// no masking required, SPI unit in 8 bit mode ignores upper 8 bits
|
| 478 |
|
|
neo430_spi_trans(adr_hi);
|
| 479 |
|
|
neo430_spi_trans(adr_mi);
|
| 480 |
|
|
neo430_spi_trans(adr_lo);
|
| 481 |
|
|
uint16_t data = neo430_spi_trans(0);
|
| 482 |
|
|
|
| 483 |
|
|
neo430_spi_cs_dis();
|
| 484 |
|
|
|
| 485 |
|
|
return (uint8_t)data;
|
| 486 |
|
|
}
|
| 487 |
|
|
|
| 488 |
|
|
|
| 489 |
|
|
/* ------------------------------------------------------------
|
| 490 |
|
|
* Write single data byte to flash at base adress
|
| 491 |
|
|
* ------------------------------------------------------------ */
|
| 492 |
|
|
void spi_flash_write_byte(uint32_t adr, uint8_t data) {
|
| 493 |
|
|
|
| 494 |
|
|
uint16_t adr_lo;
|
| 495 |
|
|
uint16_t adr_mi;
|
| 496 |
|
|
uint16_t adr_hi;
|
| 497 |
|
|
spi_flash_adr_conv(adr, &adr_hi, &adr_mi, &adr_lo);
|
| 498 |
|
|
|
| 499 |
|
|
spi_flash_write_cmd((uint16_t)SPI_FLASH_CMD_WRITE_ENABLE); // allow write-access
|
| 500 |
|
|
|
| 501 |
|
|
SPI_FLASH_SEL;
|
| 502 |
|
|
|
| 503 |
|
|
neo430_spi_trans((uint16_t)SPI_FLASH_CMD_PAGE_PROGRAM);
|
| 504 |
|
|
// no masking required, SPI unit in 8 bit mode ignores upper 8 bits
|
| 505 |
|
|
neo430_spi_trans(adr_hi);
|
| 506 |
|
|
neo430_spi_trans(adr_mi);
|
| 507 |
|
|
neo430_spi_trans(adr_lo);
|
| 508 |
|
|
neo430_spi_trans((uint16_t)data);
|
| 509 |
|
|
|
| 510 |
|
|
neo430_spi_cs_dis();
|
| 511 |
|
|
|
| 512 |
|
|
while(spi_flash_read_status());
|
| 513 |
|
|
}
|
| 514 |
|
|
|
| 515 |
|
|
|
| 516 |
|
|
/* ------------------------------------------------------------
|
| 517 |
|
|
* Erase sector (64kB) at base adress
|
| 518 |
|
|
* ------------------------------------------------------------ */
|
| 519 |
|
|
void spi_flash_erase_sector(uint32_t base_adr) {
|
| 520 |
|
|
|
| 521 |
|
|
uint16_t adr_lo;
|
| 522 |
|
|
uint16_t adr_mi;
|
| 523 |
|
|
uint16_t adr_hi;
|
| 524 |
|
|
spi_flash_adr_conv(base_adr, &adr_hi, &adr_mi, &adr_lo);
|
| 525 |
|
|
|
| 526 |
|
|
spi_flash_write_cmd((uint16_t)SPI_FLASH_CMD_WRITE_ENABLE); // allow write-access
|
| 527 |
|
|
|
| 528 |
|
|
SPI_FLASH_SEL;
|
| 529 |
|
|
|
| 530 |
|
|
neo430_spi_trans((uint16_t)SPI_FLASH_CMD_SECTOR_ERASE);
|
| 531 |
|
|
// no masking required, SPI unit in 8 bit mode ignores upper 8 bits
|
| 532 |
|
|
neo430_spi_trans(adr_hi);
|
| 533 |
|
|
neo430_spi_trans(adr_mi);
|
| 534 |
|
|
neo430_spi_trans(adr_lo);
|
| 535 |
|
|
|
| 536 |
|
|
neo430_spi_cs_dis();
|
| 537 |
|
|
|
| 538 |
|
|
while(spi_flash_read_status());
|
| 539 |
|
|
}
|
| 540 |
|
|
|
| 541 |
|
|
|
| 542 |
|
|
/* ------------------------------------------------------------
|
| 543 |
|
|
* Read status register
|
| 544 |
|
|
* ------------------------------------------------------------ */
|
| 545 |
|
|
uint8_t spi_flash_read_status(void) {
|
| 546 |
|
|
|
| 547 |
|
|
SPI_FLASH_SEL;
|
| 548 |
|
|
|
| 549 |
|
|
neo430_spi_trans((uint16_t)SPI_FLASH_CMD_READ_STATUS);
|
| 550 |
|
|
uint16_t status = neo430_spi_trans(0);
|
| 551 |
|
|
|
| 552 |
|
|
neo430_spi_cs_dis();
|
| 553 |
|
|
|
| 554 |
|
|
return (uint8_t)status;
|
| 555 |
|
|
}
|
| 556 |
|
|
|
| 557 |
|
|
|
| 558 |
|
|
/* ------------------------------------------------------------
|
| 559 |
|
|
* Read first byte of ID (manufacturer ID), should be != 0x00
|
| 560 |
|
|
* ------------------------------------------------------------ */
|
| 561 |
|
|
uint8_t spi_flash_read_1st_id(void) {
|
| 562 |
|
|
|
| 563 |
|
|
SPI_FLASH_SEL;
|
| 564 |
|
|
|
| 565 |
|
|
neo430_spi_trans((uint16_t)SPI_FLASH_CMD_READ_ID);
|
| 566 |
|
|
uint16_t id = neo430_spi_trans(0);
|
| 567 |
|
|
|
| 568 |
|
|
neo430_spi_cs_dis();
|
| 569 |
|
|
|
| 570 |
|
|
return (uint8_t)id;
|
| 571 |
|
|
}
|
| 572 |
|
|
|
| 573 |
|
|
|
| 574 |
|
|
/* ------------------------------------------------------------
|
| 575 |
|
|
* Write command to flash
|
| 576 |
|
|
* ------------------------------------------------------------ */
|
| 577 |
|
|
void spi_flash_write_cmd(uint16_t cmd) {
|
| 578 |
|
|
|
| 579 |
|
|
SPI_FLASH_SEL;
|
| 580 |
|
|
|
| 581 |
|
|
neo430_spi_trans(cmd);
|
| 582 |
|
|
|
| 583 |
|
|
neo430_spi_cs_dis();
|
| 584 |
|
|
}
|
| 585 |
|
|
|
| 586 |
|
|
|
| 587 |
|
|
/* ------------------------------------------------------------
|
| 588 |
|
|
* Adress conversion helper
|
| 589 |
|
|
* ------------------------------------------------------------ */
|
| 590 |
|
|
void spi_flash_adr_conv(uint32_t adr, uint16_t *hi, uint16_t *mi, uint16_t *lo) {
|
| 591 |
|
|
|
| 592 |
|
|
uint16_t adr_hi16 = (uint16_t)(adr >> 16);
|
| 593 |
|
|
uint16_t adr_lo16 = (uint16_t)(adr >> 0);
|
| 594 |
|
|
|
| 595 |
|
|
*lo = adr_lo16;
|
| 596 |
|
|
*mi = neo430_bswap(adr_lo16);
|
| 597 |
|
|
*hi = adr_hi16;
|
| 598 |
|
|
}
|
| 599 |
|
|
|