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[/] [neo430/] [trunk/] [neo430/] [sw/] [lib/] [neo430/] [source/] [neo430_wishbone.c] - Blame information for rev 198

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1 198 zero_gravi
// #################################################################################################
2
// #  < neo430_wishbone.c - Internal Wishbone interface control functions >                        #
3
// # ********************************************************************************************* #
4
// # Use the normal Wishbone functions for BLOCKING access (until ACK is asserted).                #
5
// # Use non-blocking functions (*_start, wishbone_busy, wishbone_get_data*) to prevent dead locks #
6
// # when accessing invalid addresses and to do things in parallel when using the Wishbone bus.    #
7
// # ********************************************************************************************* #
8
// # BSD 3-Clause License                                                                          #
9
// #                                                                                               #
10
// # Copyright (c) 2020, Stephan Nolting. All rights reserved.                                     #
11
// #                                                                                               #
12
// # Redistribution and use in source and binary forms, with or without modification, are          #
13
// # permitted provided that the following conditions are met:                                     #
14
// #                                                                                               #
15
// # 1. Redistributions of source code must retain the above copyright notice, this list of        #
16
// #    conditions and the following disclaimer.                                                   #
17
// #                                                                                               #
18
// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of     #
19
// #    conditions and the following disclaimer in the documentation and/or other materials        #
20
// #    provided with the distribution.                                                            #
21
// #                                                                                               #
22
// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to  #
23
// #    endorse or promote products derived from this software without specific prior written      #
24
// #    permission.                                                                                #
25
// #                                                                                               #
26
// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS   #
27
// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF               #
28
// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE    #
29
// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,     #
30
// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
31
// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED    #
32
// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING     #
33
// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED  #
34
// # OF THE POSSIBILITY OF SUCH DAMAGE.                                                            #
35
// # ********************************************************************************************* #
36
// # The NEO430 Processor - https://github.com/stnolting/neo430                                    #
37
// #################################################################################################
38
 
39
#include "neo430.h"
40
#include "neo430_wishbone.h"
41
 
42
 
43
// ************************************************************************************************
44
// Byte-wise access functions, with address alignment, blocking
45
// ************************************************************************************************
46
 
47
/* ------------------------------------------------------------
48
 * INFO Read 32-bit from Wishbone device (blocking), standard mode, pipelined
49
 * PARAM 32-bit device address
50
 * RETURN read data
51
 * ------------------------------------------------------------ */
52
uint32_t neo430_wishbone32_read32(uint32_t a) {
53
 
54
  // 32-bit transfer
55
  WB32_CT = 0xF;
56
 
57
  // device address aligned to 32-bit + transfer trigger
58
  WB32_RA_32bit = a & (~3);
59
 
60
  // wait for access to be completed - blocking!
61
  while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
62
 
63
  return WB32_D_32bit;
64
}
65
 
66
 
67
/* ------------------------------------------------------------
68
 * INFO Write 32-bit to Wishbone device (blocking), standard mode, pipelined
69
 * PARAM a: 32-bit device address
70
 * PARAM d: 32-bit write data
71
 * ------------------------------------------------------------ */
72
void neo430_wishbone32_write32(uint32_t a, uint32_t d) {
73
 
74
  // 32-bit transfer
75
  WB32_CT = 0xF;
76
 
77
  // write data
78
  WB32_D_32bit = d;
79
 
80
  // device address aligned to 32-bit + transfer trigger
81
  WB32_WA_32bit = a & (~3);
82
 
83
  // wait for access to be completed - blocking!
84
  while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
85
}
86
 
87
 
88
/* ------------------------------------------------------------
89
 * INFO Read 16-bit from Wishbone device (blocking), standard mode, pipelined
90
 * INFO This function performs a data alignment based on the address!
91
 * PARAM 32-bit device address
92
 * RETURN 16-bit read data
93
 * ------------------------------------------------------------ */
94
uint16_t neo430_wishbone32_read16(uint32_t a) {
95
 
96
  // 16-bit transfer
97
  if (a & 2)
98
    WB32_CT = 0b1100; // high 16-bit word
99
  else
100
    WB32_CT = 0b0011; // low 16-bit word
101
 
102
  // device address aligned to 16-bit + transfer trigger
103
  WB32_RA_32bit = a & (~1);
104
 
105
  // wait for access to be completed - blocking!
106
  while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
107
 
108
  if (a & 2)
109
    return WB32_HD; // high 16-bit word
110
  else
111
    return WB32_LD; // low 16-bit word
112
}
113
 
114
 
115
/* ------------------------------------------------------------
116
 * INFO Write 16-bit to Wishbone device (blocking), standard mode, pipelined
117
 * INFO This function performs a data alignment based on the address!
118
 * PARAM a: 32-bit device address
119
 * PARAM d: 16-bit write data
120
 * ------------------------------------------------------------ */
121
void neo430_wishbone32_write16(uint32_t a, uint16_t d) {
122
 
123
  // 16-bit transfer
124
  if (a & 2) {
125
    WB32_CT = 0b1100; // high 16-bit word
126
    WB32_HD = d;
127
  }
128
  else {
129
    WB32_CT = 0b0011; // low 16-bit word
130
    WB32_LD = d;
131
  }
132
 
133
  // device address aligned to 16-bit + transfer trigger
134
  WB32_WA_32bit = a & (~1);
135
 
136
  // wait for access to be completed - blocking!
137
  while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
138
}
139
 
140
 
141
/* ------------------------------------------------------------
142
 * INFO Read 8-bit from Wishbone device (blocking), standard mode, pipelined
143
 * INFO This function performs a data alignment based on the address!
144
 * PARAM 32-bit device address
145
 * RETURN 0 if fail, 1 if timeout
146
 * ------------------------------------------------------------ */
147
uint8_t neo430_wishbone32_read8(uint32_t a) {
148
 
149
  // 8-bit transfer
150
  WB32_CT = 1 << (a & 3); // corresponding byte enable
151
 
152
  // device address aligned to 8-bit + transfer trigger
153
  WB32_RA_32bit = a;
154
 
155
  // wait for access to be completed - blocking!
156
  while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
157
 
158
  // select correct byte to be read
159
  uint16_t data;
160
  if (a & 2)
161
    data = WB32_HD;
162
  else
163
    data = WB32_LD;
164
 
165
  if (a & 1)
166
    data = neo430_bswap(data);
167
 
168
  return (uint8_t)data;
169
}
170
 
171
 
172
/* ------------------------------------------------------------
173
 * INFO Write 8-bit to Wishbone device (blocking), standard mode, pipelined
174
 * INFO This function performs a data alignment based on the address!
175
 * PARAM a: 32-bit device address
176
 * PARAM d: 8-bit write data
177
 * ------------------------------------------------------------ */
178
void neo430_wishbone32_write8(uint32_t a, uint8_t d) {
179
 
180
  // 8-bit transfer
181
  WB32_CT = 1 << (a & 3); // corresponding byte enable
182
 
183
  // select correct byte to be written
184
  uint16_t data = (uint16_t)d;
185
  data = (data << 8) | data;
186
  WB32_LD = data;
187
  WB32_HD = data;
188
 
189
  // device address aligned to 8-bit + transfer trigger
190
  WB32_WA_32bit = a;
191
 
192
  // wait for access to be completed - blocking!
193
  while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
194
}
195
 
196
// ************************************************************************************************
197
// NONBLOCKING FUNCTIONS
198
// ************************************************************************************************
199
// Use wishbone_busy() to check status
200
// Use Wishbone_get_data(address) to get data from read accesses
201
// ************************************************************************************************
202
 
203
/* ------------------------------------------------------------
204
 * INFO Initiate read 32-bit from Wishbone device (non-blocking), standard mode, pipelined
205
 * PARAM 32-bit device address
206
 * ------------------------------------------------------------ */
207
void neo430_wishbone32_read32_start(uint32_t a) {
208
 
209
  // 32-bit transfer
210
  WB32_CT = 0xF;
211
 
212
  // device address aligned to 32-bit + transfer trigger
213
  WB32_RA_32bit = a & (~3);
214
}
215
 
216
 
217
/* ------------------------------------------------------------
218
 * INFO Initiate write 32-bit to Wishbone device (non-blocking), standard mode, pipelined
219
 * PARAM a: 32-bit device address
220
 * PARAM d: 32-bit write data
221
 * ------------------------------------------------------------ */
222
void neo430_wishbone32_write32_start(uint32_t a, uint32_t d) {
223
 
224
  // 32-bit transfer
225
  WB32_CT = 0xF;
226
 
227
  // write data
228
  WB32_D_32bit = d;
229
 
230
  // device address aligned to 32-bit + transfer trigger
231
  WB32_WA_32bit = a & (~3);
232
}
233
 
234
 
235
/* ------------------------------------------------------------
236
 * INFO Initiate read 16-bit from Wishbone device (non-blocking), standard mode, pipelined
237
 * INFO This function performs a data alignment based on the address!
238
 * PARAM 32-bit device address
239
 * ------------------------------------------------------------ */
240
void neo430_wishbone32_read16_start(uint32_t a) {
241
 
242
  // 16-bit transfer
243
  if (a & 2)
244
    WB32_CT = 0b1100; // high 16-bit word
245
  else
246
    WB32_CT = 0b0011; // low 16-bit word
247
 
248
  // device address aligned to 16-bit + transfer trigger
249
  WB32_RA_32bit = a & (~1);
250
}
251
 
252
 
253
/* ------------------------------------------------------------
254
 * INFO Initiate write 16-bit to Wishbone device (non-blocking), standard mode, pipelined
255
 * INFO This function performs a data alignment based on the address!
256
 * PARAM a: 32-bit device address
257
 * PARAM d: 16-bit write data
258
 * ------------------------------------------------------------ */
259
void neo430_wishbone32_write16_start(uint32_t a, uint16_t d) {
260
 
261
  // 16-bit transfer
262
  if (a & 2) {
263
    WB32_CT = 0b1100; // high 16-bit word
264
    WB32_HD = d;
265
  }
266
  else {
267
    WB32_CT = 0b0011; // low 16-bit word
268
    WB32_LD = d;
269
  }
270
}
271
 
272
 
273
/* ------------------------------------------------------------
274
 * INFO Initiate read 8-bit from Wishbone device (non-blocking), standard mode, pipelined
275
 * INFO This function performs a data alignment based on the address!
276
 * PARAM 32-bit device address
277
 * ------------------------------------------------------------ */
278
void neo430_wishbone32_read8_start(uint32_t a) {
279
 
280
  // 8-bit transfer
281
  WB32_CT = 1 << (a & 3); // corresponding byte enable
282
 
283
  // device address aligned to 8-bit + transfer trigger
284
  WB32_RA_32bit = a;
285
}
286
 
287
 
288
/* ------------------------------------------------------------
289
 * INFO Initiate write 8-bit to Wishbone device (non-blocking), standard mode, pipelined
290
 * INFO This function performs a data alignment based on the address!
291
 * PARAM a: 32-bit device address
292
 * PARAM d: 8-bit write data
293
 * ------------------------------------------------------------ */
294
void neo430_wishbone32_write8_start(uint32_t a, uint8_t d) {
295
 
296
  // select correct byte to be written
297
  uint16_t data = (uint16_t)d;
298
  data = (data << 8) | data;
299
  WB32_LD = data;
300
  WB32_HD = data;
301
 
302
  // 8-bit transfer
303
  WB32_CT = 1 << (a & 3); // corresponding byte enable
304
 
305
  // device address aligned to 8-bit + transfer trigger
306
  WB32_WA_32bit = a;
307
}
308
 
309
 
310
/* ------------------------------------------------------------
311
 * INFO Read 32-bit data after nonblocking transaction has been started
312
 * RETURN read data
313
 * ------------------------------------------------------------ */
314
uint32_t neo430_wishbone32_get_data32(void) {
315
 
316
  return WB32_D_32bit;
317
}
318
 
319
 
320
/* ------------------------------------------------------------
321
 * INFO Read 16-bit data after nonblocking transaction has been started
322
 * PARAM 32-bit device address
323
 * RETURN read data
324
 * ------------------------------------------------------------ */
325
uint16_t neo430_wishbone32_get_data16(uint32_t a) {
326
 
327
  if (a & 2)
328
    return WB32_HD; // high 16-bit word
329
  else
330
    return WB32_LD; // low 16-bit word
331
}
332
 
333
 
334
/* ------------------------------------------------------------
335
 * INFO Read 8-bit data after nonblocking transaction has been started
336
 * PARAM 32-bit device address
337
 * RETURN read data
338
 * ------------------------------------------------------------ */
339
uint8_t neo430_wishbone32_get_data8(uint32_t a) {
340
 
341
  // select correct byte to be read
342
  uint16_t data;
343
  if (a & 2)
344
    data = WB32_HD;
345
  else
346
    data = WB32_LD;
347
 
348
  if (a & 1)
349
    data = neo430_bswap(data);
350
 
351
  return (uint8_t)data;
352
}
353
 
354
 
355
// ************************************************************************************************
356
// Blocking access functions for data bus width = 32-bit, NO ADDRESS ALIGNMENT
357
// ************************************************************************************************
358
 
359
 
360
/* ------------------------------------------------------------
361
 * INFO Read 32-bit from Wishbone device (blocking), standard mode, pipelined
362
 * PARAM 32-bit device address
363
 * RETURN 32-bit read data
364
 * ------------------------------------------------------------ */
365
uint32_t neo430_wishbone32_read(uint32_t a) {
366
 
367
  // 32-bit transfer
368
  WB32_CT = 0xF;
369
 
370
  // device address + transfer trigger
371
  WB32_RA_32bit = a;
372
 
373
  // wait for access to be completed - blocking!
374
  while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
375
 
376
  return WB32_D_32bit;
377
}
378
 
379
 
380
/* ------------------------------------------------------------
381
 * INFO Write 32-bit to Wishbone device (blocking), standard mode, pipelined
382
 * INFO This function performs a data alignment based on the address!
383
 * PARAM a: 32-bit device address
384
 * PARAM d: 32-bit write data
385
 * ------------------------------------------------------------ */
386
void neo430_wishbone32_write(uint32_t a, uint32_t d) {
387
 
388
  // 32-bit transfer
389
  WB32_CT = 0xf;
390
  WB32_D_32bit = d;
391
 
392
  // device address + transfer trigger
393
  WB32_WA_32bit = a;
394
 
395
  // wait for access to be completed - blocking!
396
  while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
397
}
398
 
399
 
400
// ************************************************************************************************
401
// NONBLOCKING FUNCTIONS
402
// ************************************************************************************************
403
// Use wishbone_busy() to check status
404
// Use Wishbone_get_data(address) to get data from read accesses
405
// ************************************************************************************************
406
 
407
/* ------------------------------------------------------------
408
 * INFO Initiate read 32-bit from Wishbone device (non-blocking), standard mode, pipelined
409
 * PARAM 32-bit device address
410
 * ------------------------------------------------------------ */
411
void neo430_wishbone32_read_start(uint32_t a) {
412
 
413
  // 32-bit transfer
414
  WB32_CT = 0xF;
415
 
416
  // device address + transfer trigger
417
  WB32_RA_32bit = a;
418
}
419
 
420
 
421
/* ------------------------------------------------------------
422
 * INFO Initiate write 32-bit to Wishbone device (non-blocking), standard mode, pipelined
423
 * PARAM a: 32-bit device address
424
 * PARAM d: 32-bit write data
425
 * ------------------------------------------------------------ */
426
void neo430_wishbone32_write_start(uint32_t a, uint32_t d) {
427
 
428
  // 32-bit transfer
429
  WB32_CT = 0xF;
430
 
431
  // write data
432
  WB32_D_32bit = d;
433
 
434
  // device address + transfer trigger
435
  WB32_WA_32bit = a;
436
}
437
 
438
 
439
/* ------------------------------------------------------------
440
 * INFO Read 32-bit data after nonblocking transaction has been started
441
 * PARAM 32-bit device address
442
 * RETURN 32-bit read data
443
 * ------------------------------------------------------------ */
444
uint32_t neo430_wishbone32_get_data(void) {
445
 
446
  return WB32_D_32bit;
447
}
448
 
449
 
450
// ************************************************************************************************
451
// Blocking access functions for data bus width = 16-bit, NO ADDRESS ALIGNMENT
452
// ************************************************************************************************
453
 
454
 
455
/* ------------------------------------------------------------
456
 * INFO Read 16-bit from Wishbone device (blocking), standard mode, pipelined
457
 * PARAM 32-bit device address
458
 * RETURN 16-bit read data
459
 * ------------------------------------------------------------ */
460
uint16_t neo430_wishbone16_read(uint32_t a) {
461
 
462
  // 16-bit transfer
463
  WB32_CT = 0x3; // low 16-bit word
464
 
465
  // device address + transfer trigger
466
  WB32_RA_32bit = a;
467
 
468
  // wait for access to be completed - blocking!
469
  while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
470
 
471
  return WB32_LD; // low 16-bit word
472
}
473
 
474
 
475
/* ------------------------------------------------------------
476
 * INFO Write 16-bit to Wishbone device (blocking), standard mode, pipelined
477
 * INFO This function performs a data alignment based on the address!
478
 * PARAM a: 32-bit device address
479
 * PARAM d: 16-bit write data
480
 * ------------------------------------------------------------ */
481
void neo430_wishbone16_write(uint32_t a, uint16_t d) {
482
 
483
  // 16-bit transfer
484
  WB32_CT = 0x3; // low 16-bit word
485
  WB32_LD = d;
486
 
487
  // device address + transfer trigger
488
  WB32_WA_32bit = a;
489
 
490
  // wait for access to be completed - blocking!
491
  while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
492
}
493
 
494
 
495
// ************************************************************************************************
496
// NONBLOCKING FUNCTIONS
497
// ************************************************************************************************
498
// Use wishbone_busy() to check status
499
// Use Wishbone_get_data(address) to get data from read accesses
500
// ************************************************************************************************
501
 
502
/* ------------------------------------------------------------
503
 * INFO Initiate read 16-bit from Wishbone device (non-blocking), standard mode, pipelined
504
 * PARAM 32-bit device address
505
 * ------------------------------------------------------------ */
506
void neo430_wishbone16_read_start(uint32_t a) {
507
 
508
  // 16-bit transfer
509
  WB32_CT = 0x3;
510
 
511
  // device address + transfer trigger
512
  WB32_RA_32bit = a;
513
}
514
 
515
 
516
/* ------------------------------------------------------------
517
 * INFO Initiate write 16-bit to Wishbone device (non-blocking), standard mode, pipelined
518
 * PARAM a: 32-bit device address
519
 * PARAM d: 16-bit write data
520
 * ------------------------------------------------------------ */
521
void neo430_wishbone16_write_start(uint32_t a, uint16_t d) {
522
 
523
  // 16-bit transfer
524
  WB32_CT = 0x3;
525
 
526
  // write data
527
  WB32_LD = d;
528
 
529
  // device address + transfer trigger
530
  WB32_WA_32bit = a;
531
}
532
 
533
 
534
/* ------------------------------------------------------------
535
 * INFO Read 16-bit data after nonblocking transaction has been started
536
 * RETURN 16-bit read data
537
 * ------------------------------------------------------------ */
538
uint16_t neo430_wishbone16_get_data(void) {
539
 
540
  return WB32_LD;
541
}
542
 
543
 
544
// ************************************************************************************************
545
// Blocking access functions for data bus width = 8-bit, NO ADDRESS ALIGNMENT
546
// ************************************************************************************************
547
 
548
 
549
/* ------------------------------------------------------------
550
 * INFO Read 8-bit from Wishbone device (blocking), standard mode, pipelined
551
 * PARAM 32-bit device address
552
 * RETURN 8-bit read data
553
 * ------------------------------------------------------------ */
554
uint8_t neo430_wishbone8_read(uint32_t a) {
555
 
556
  // 8-bit transfer
557
  WB32_CT = 0x1;
558
 
559
  // device address + transfer trigger
560
  WB32_RA_32bit = a;
561
 
562
  // wait for access to be completed - blocking!
563
  while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
564
 
565
  return (uint8_t)WB32_LD; // low 16-bit word
566
}
567
 
568
 
569
/* ------------------------------------------------------------
570
 * INFO Write 8-bit to Wishbone device (blocking), standard mode, pipelined
571
 * INFO This function performs a data alignment based on the address!
572
 * PARAM a: 32-bit device address
573
 * PARAM d: 8-bit write data
574
 * ------------------------------------------------------------ */
575
void neo430_wishbone8_write(uint32_t a, uint8_t d) {
576
 
577
  // 8-bit transfer
578
  WB32_CT = 0x1; // low 8-bit word
579
  WB32_LD = (uint16_t)d;
580
 
581
  // device address + transfer trigger
582
  WB32_WA_32bit = a;
583
 
584
  // wait for access to be completed - blocking!
585
  while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
586
}
587
 
588
 
589
// ************************************************************************************************
590
// NONBLOCKING FUNCTIONS
591
// ************************************************************************************************
592
// Use wishbone_busy() to check status
593
// Use Wishbone_get_data(address) to get data from read accesses
594
// ************************************************************************************************
595
 
596
/* ------------------------------------------------------------
597
 * INFO Initiate read 16-bit from Wishbone device (non-blocking), standard mode, pipelined
598
 * PARAM 8-bit device address
599
 * ------------------------------------------------------------ */
600
void neo430_wishbone8_read_start(uint32_t a) {
601
 
602
  // 8-bit transfer
603
  WB32_CT = 0x1;
604
 
605
  // device address + transfer trigger
606
  WB32_RA_32bit = a;
607
}
608
 
609
 
610
/* ------------------------------------------------------------
611
 * INFO Initiate write 8-bit to Wishbone device (non-blocking), standard mode, pipelined
612
 * PARAM a: 32-bit device address
613
 * PARAM d: 8-bit write data
614
 * ------------------------------------------------------------ */
615
void neo430_wishbone8_write_start(uint32_t a, uint8_t d) {
616
 
617
  // 8-bit transfer
618
  WB32_CT = 0x1;
619
 
620
  // write data
621
  WB32_LD = (uint16_t)d;
622
 
623
  // device address + transfer trigger
624
  WB32_WA_32bit = a;
625
}
626
 
627
 
628
/* ------------------------------------------------------------
629
 * INFO Read 8-bit data after nonblocking transaction has been started
630
 * RETURN 8-bit read data
631
 * ------------------------------------------------------------ */
632
uint8_t neo430_wishbone8_get_data(void) {
633
 
634
  return (uint8_t)WB32_LD;
635
}
636
 
637
 
638
// ************************************************************************************************
639
// NONBLOCKING ARBITRATION FUNCTIONS
640
// ************************************************************************************************
641
 
642
/* ------------------------------------------------------------
643
 * INFO Check if Wishbone transaction is (still) in progress
644
 * RETURN 1 if transfer in progress, 0 if idel
645
 * ------------------------------------------------------------ */
646
uint16_t neo430_wishbone_busy(void) {
647
 
648
  return (WB32_CT & (1<<WB32_CT_PENDING));
649
}
650
 
651
 
652
/* ------------------------------------------------------------
653
 * INFO Terminate current Wishbone transfer
654
 * ------------------------------------------------------------ */
655
void neo430_wishbone_terminate(void) {
656
 
657
  WB32_CT = 0;
658
}

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