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// #################################################################################################
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// # < neo430_wishbone.c - Internal Wishbone interface control functions > #
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// # ********************************************************************************************* #
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// # Use the normal Wishbone functions for BLOCKING access (until ACK is asserted). #
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// # Use non-blocking functions (*_start, wishbone_busy, wishbone_get_data*) to prevent dead locks #
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// # when accessing invalid addresses and to do things in parallel when using the Wishbone bus. #
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// # ********************************************************************************************* #
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// # BSD 3-Clause License #
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// # #
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// # Copyright (c) 2020, Stephan Nolting. All rights reserved. #
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// # #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # permitted provided that the following conditions are met: #
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// # #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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// # conditions and the following disclaimer. #
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// # #
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// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
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// # conditions and the following disclaimer in the documentation and/or other materials #
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// # provided with the distribution. #
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// # #
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// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
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// # endorse or promote products derived from this software without specific prior written #
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// # permission. #
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// # #
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// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
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// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
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// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
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// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
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// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
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// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
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// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
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// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
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// # OF THE POSSIBILITY OF SUCH DAMAGE. #
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// # ********************************************************************************************* #
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// # The NEO430 Processor - https://github.com/stnolting/neo430 #
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// #################################################################################################
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#include "neo430.h"
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#include "neo430_wishbone.h"
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// ************************************************************************************************
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// Byte-wise access functions, with address alignment, blocking
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// ************************************************************************************************
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/* ------------------------------------------------------------
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* INFO Read 32-bit from Wishbone device (blocking), standard mode, pipelined
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* PARAM 32-bit device address
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* RETURN read data
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* ------------------------------------------------------------ */
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uint32_t neo430_wishbone32_read32(uint32_t a) {
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// 32-bit transfer
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WB32_CT = 0xF;
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// device address aligned to 32-bit + transfer trigger
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WB32_RA_32bit = a & (~3);
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// wait for access to be completed - blocking!
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while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
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return WB32_D_32bit;
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}
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/* ------------------------------------------------------------
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* INFO Write 32-bit to Wishbone device (blocking), standard mode, pipelined
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* PARAM a: 32-bit device address
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* PARAM d: 32-bit write data
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* ------------------------------------------------------------ */
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void neo430_wishbone32_write32(uint32_t a, uint32_t d) {
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// 32-bit transfer
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WB32_CT = 0xF;
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// write data
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WB32_D_32bit = d;
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// device address aligned to 32-bit + transfer trigger
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WB32_WA_32bit = a & (~3);
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// wait for access to be completed - blocking!
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while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
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}
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/* ------------------------------------------------------------
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* INFO Read 16-bit from Wishbone device (blocking), standard mode, pipelined
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* INFO This function performs a data alignment based on the address!
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* PARAM 32-bit device address
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* RETURN 16-bit read data
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* ------------------------------------------------------------ */
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uint16_t neo430_wishbone32_read16(uint32_t a) {
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// 16-bit transfer
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if (a & 2)
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WB32_CT = 0b1100; // high 16-bit word
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else
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WB32_CT = 0b0011; // low 16-bit word
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// device address aligned to 16-bit + transfer trigger
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WB32_RA_32bit = a & (~1);
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// wait for access to be completed - blocking!
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while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
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if (a & 2)
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return WB32_HD; // high 16-bit word
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else
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return WB32_LD; // low 16-bit word
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}
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/* ------------------------------------------------------------
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* INFO Write 16-bit to Wishbone device (blocking), standard mode, pipelined
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* INFO This function performs a data alignment based on the address!
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* PARAM a: 32-bit device address
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* PARAM d: 16-bit write data
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* ------------------------------------------------------------ */
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void neo430_wishbone32_write16(uint32_t a, uint16_t d) {
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// 16-bit transfer
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if (a & 2) {
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WB32_CT = 0b1100; // high 16-bit word
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WB32_HD = d;
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}
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else {
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WB32_CT = 0b0011; // low 16-bit word
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WB32_LD = d;
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}
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// device address aligned to 16-bit + transfer trigger
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WB32_WA_32bit = a & (~1);
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// wait for access to be completed - blocking!
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while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
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}
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/* ------------------------------------------------------------
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* INFO Read 8-bit from Wishbone device (blocking), standard mode, pipelined
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* INFO This function performs a data alignment based on the address!
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* PARAM 32-bit device address
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* RETURN 0 if fail, 1 if timeout
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* ------------------------------------------------------------ */
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uint8_t neo430_wishbone32_read8(uint32_t a) {
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// 8-bit transfer
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WB32_CT = 1 << (a & 3); // corresponding byte enable
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// device address aligned to 8-bit + transfer trigger
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WB32_RA_32bit = a;
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// wait for access to be completed - blocking!
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while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
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// select correct byte to be read
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uint16_t data;
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if (a & 2)
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data = WB32_HD;
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else
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data = WB32_LD;
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if (a & 1)
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data = neo430_bswap(data);
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return (uint8_t)data;
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}
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/* ------------------------------------------------------------
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* INFO Write 8-bit to Wishbone device (blocking), standard mode, pipelined
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* INFO This function performs a data alignment based on the address!
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* PARAM a: 32-bit device address
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* PARAM d: 8-bit write data
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* ------------------------------------------------------------ */
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void neo430_wishbone32_write8(uint32_t a, uint8_t d) {
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// 8-bit transfer
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WB32_CT = 1 << (a & 3); // corresponding byte enable
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// select correct byte to be written
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uint16_t data = (uint16_t)d;
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data = (data << 8) | data;
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WB32_LD = data;
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WB32_HD = data;
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// device address aligned to 8-bit + transfer trigger
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WB32_WA_32bit = a;
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// wait for access to be completed - blocking!
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while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
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}
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// ************************************************************************************************
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// NONBLOCKING FUNCTIONS
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// ************************************************************************************************
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// Use wishbone_busy() to check status
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// Use Wishbone_get_data(address) to get data from read accesses
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// ************************************************************************************************
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/* ------------------------------------------------------------
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* INFO Initiate read 32-bit from Wishbone device (non-blocking), standard mode, pipelined
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* PARAM 32-bit device address
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* ------------------------------------------------------------ */
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void neo430_wishbone32_read32_start(uint32_t a) {
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// 32-bit transfer
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WB32_CT = 0xF;
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// device address aligned to 32-bit + transfer trigger
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WB32_RA_32bit = a & (~3);
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}
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/* ------------------------------------------------------------
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* INFO Initiate write 32-bit to Wishbone device (non-blocking), standard mode, pipelined
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* PARAM a: 32-bit device address
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* PARAM d: 32-bit write data
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* ------------------------------------------------------------ */
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void neo430_wishbone32_write32_start(uint32_t a, uint32_t d) {
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// 32-bit transfer
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WB32_CT = 0xF;
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// write data
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WB32_D_32bit = d;
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// device address aligned to 32-bit + transfer trigger
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WB32_WA_32bit = a & (~3);
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}
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/* ------------------------------------------------------------
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* INFO Initiate read 16-bit from Wishbone device (non-blocking), standard mode, pipelined
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* INFO This function performs a data alignment based on the address!
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* PARAM 32-bit device address
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* ------------------------------------------------------------ */
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void neo430_wishbone32_read16_start(uint32_t a) {
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// 16-bit transfer
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if (a & 2)
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WB32_CT = 0b1100; // high 16-bit word
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else
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WB32_CT = 0b0011; // low 16-bit word
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// device address aligned to 16-bit + transfer trigger
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WB32_RA_32bit = a & (~1);
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}
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/* ------------------------------------------------------------
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* INFO Initiate write 16-bit to Wishbone device (non-blocking), standard mode, pipelined
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* INFO This function performs a data alignment based on the address!
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* PARAM a: 32-bit device address
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* PARAM d: 16-bit write data
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* ------------------------------------------------------------ */
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void neo430_wishbone32_write16_start(uint32_t a, uint16_t d) {
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// 16-bit transfer
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if (a & 2) {
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WB32_CT = 0b1100; // high 16-bit word
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WB32_HD = d;
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}
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else {
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WB32_CT = 0b0011; // low 16-bit word
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WB32_LD = d;
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}
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}
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/* ------------------------------------------------------------
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* INFO Initiate read 8-bit from Wishbone device (non-blocking), standard mode, pipelined
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* INFO This function performs a data alignment based on the address!
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* PARAM 32-bit device address
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* ------------------------------------------------------------ */
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void neo430_wishbone32_read8_start(uint32_t a) {
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// 8-bit transfer
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WB32_CT = 1 << (a & 3); // corresponding byte enable
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// device address aligned to 8-bit + transfer trigger
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WB32_RA_32bit = a;
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}
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/* ------------------------------------------------------------
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* INFO Initiate write 8-bit to Wishbone device (non-blocking), standard mode, pipelined
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* INFO This function performs a data alignment based on the address!
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* PARAM a: 32-bit device address
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* PARAM d: 8-bit write data
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* ------------------------------------------------------------ */
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void neo430_wishbone32_write8_start(uint32_t a, uint8_t d) {
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// select correct byte to be written
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uint16_t data = (uint16_t)d;
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data = (data << 8) | data;
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WB32_LD = data;
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WB32_HD = data;
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// 8-bit transfer
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WB32_CT = 1 << (a & 3); // corresponding byte enable
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// device address aligned to 8-bit + transfer trigger
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WB32_WA_32bit = a;
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}
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/* ------------------------------------------------------------
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* INFO Read 32-bit data after nonblocking transaction has been started
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* RETURN read data
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* ------------------------------------------------------------ */
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uint32_t neo430_wishbone32_get_data32(void) {
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return WB32_D_32bit;
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}
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/* ------------------------------------------------------------
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* INFO Read 16-bit data after nonblocking transaction has been started
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* PARAM 32-bit device address
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* RETURN read data
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* ------------------------------------------------------------ */
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uint16_t neo430_wishbone32_get_data16(uint32_t a) {
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if (a & 2)
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return WB32_HD; // high 16-bit word
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else
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return WB32_LD; // low 16-bit word
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}
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/* ------------------------------------------------------------
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* INFO Read 8-bit data after nonblocking transaction has been started
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* PARAM 32-bit device address
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* RETURN read data
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338 |
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* ------------------------------------------------------------ */
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uint8_t neo430_wishbone32_get_data8(uint32_t a) {
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// select correct byte to be read
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uint16_t data;
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if (a & 2)
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data = WB32_HD;
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else
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data = WB32_LD;
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if (a & 1)
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data = neo430_bswap(data);
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return (uint8_t)data;
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}
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// ************************************************************************************************
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356 |
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// Blocking access functions for data bus width = 32-bit, NO ADDRESS ALIGNMENT
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357 |
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// ************************************************************************************************
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358 |
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359 |
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360 |
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/* ------------------------------------------------------------
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361 |
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* INFO Read 32-bit from Wishbone device (blocking), standard mode, pipelined
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362 |
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* PARAM 32-bit device address
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363 |
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* RETURN 32-bit read data
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364 |
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* ------------------------------------------------------------ */
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365 |
|
|
uint32_t neo430_wishbone32_read(uint32_t a) {
|
366 |
|
|
|
367 |
|
|
// 32-bit transfer
|
368 |
|
|
WB32_CT = 0xF;
|
369 |
|
|
|
370 |
|
|
// device address + transfer trigger
|
371 |
|
|
WB32_RA_32bit = a;
|
372 |
|
|
|
373 |
|
|
// wait for access to be completed - blocking!
|
374 |
|
|
while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
|
375 |
|
|
|
376 |
|
|
return WB32_D_32bit;
|
377 |
|
|
}
|
378 |
|
|
|
379 |
|
|
|
380 |
|
|
/* ------------------------------------------------------------
|
381 |
|
|
* INFO Write 32-bit to Wishbone device (blocking), standard mode, pipelined
|
382 |
|
|
* INFO This function performs a data alignment based on the address!
|
383 |
|
|
* PARAM a: 32-bit device address
|
384 |
|
|
* PARAM d: 32-bit write data
|
385 |
|
|
* ------------------------------------------------------------ */
|
386 |
|
|
void neo430_wishbone32_write(uint32_t a, uint32_t d) {
|
387 |
|
|
|
388 |
|
|
// 32-bit transfer
|
389 |
|
|
WB32_CT = 0xf;
|
390 |
|
|
WB32_D_32bit = d;
|
391 |
|
|
|
392 |
|
|
// device address + transfer trigger
|
393 |
|
|
WB32_WA_32bit = a;
|
394 |
|
|
|
395 |
|
|
// wait for access to be completed - blocking!
|
396 |
|
|
while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
|
397 |
|
|
}
|
398 |
|
|
|
399 |
|
|
|
400 |
|
|
// ************************************************************************************************
|
401 |
|
|
// NONBLOCKING FUNCTIONS
|
402 |
|
|
// ************************************************************************************************
|
403 |
|
|
// Use wishbone_busy() to check status
|
404 |
|
|
// Use Wishbone_get_data(address) to get data from read accesses
|
405 |
|
|
// ************************************************************************************************
|
406 |
|
|
|
407 |
|
|
/* ------------------------------------------------------------
|
408 |
|
|
* INFO Initiate read 32-bit from Wishbone device (non-blocking), standard mode, pipelined
|
409 |
|
|
* PARAM 32-bit device address
|
410 |
|
|
* ------------------------------------------------------------ */
|
411 |
|
|
void neo430_wishbone32_read_start(uint32_t a) {
|
412 |
|
|
|
413 |
|
|
// 32-bit transfer
|
414 |
|
|
WB32_CT = 0xF;
|
415 |
|
|
|
416 |
|
|
// device address + transfer trigger
|
417 |
|
|
WB32_RA_32bit = a;
|
418 |
|
|
}
|
419 |
|
|
|
420 |
|
|
|
421 |
|
|
/* ------------------------------------------------------------
|
422 |
|
|
* INFO Initiate write 32-bit to Wishbone device (non-blocking), standard mode, pipelined
|
423 |
|
|
* PARAM a: 32-bit device address
|
424 |
|
|
* PARAM d: 32-bit write data
|
425 |
|
|
* ------------------------------------------------------------ */
|
426 |
|
|
void neo430_wishbone32_write_start(uint32_t a, uint32_t d) {
|
427 |
|
|
|
428 |
|
|
// 32-bit transfer
|
429 |
|
|
WB32_CT = 0xF;
|
430 |
|
|
|
431 |
|
|
// write data
|
432 |
|
|
WB32_D_32bit = d;
|
433 |
|
|
|
434 |
|
|
// device address + transfer trigger
|
435 |
|
|
WB32_WA_32bit = a;
|
436 |
|
|
}
|
437 |
|
|
|
438 |
|
|
|
439 |
|
|
/* ------------------------------------------------------------
|
440 |
|
|
* INFO Read 32-bit data after nonblocking transaction has been started
|
441 |
|
|
* PARAM 32-bit device address
|
442 |
|
|
* RETURN 32-bit read data
|
443 |
|
|
* ------------------------------------------------------------ */
|
444 |
|
|
uint32_t neo430_wishbone32_get_data(void) {
|
445 |
|
|
|
446 |
|
|
return WB32_D_32bit;
|
447 |
|
|
}
|
448 |
|
|
|
449 |
|
|
|
450 |
|
|
// ************************************************************************************************
|
451 |
|
|
// Blocking access functions for data bus width = 16-bit, NO ADDRESS ALIGNMENT
|
452 |
|
|
// ************************************************************************************************
|
453 |
|
|
|
454 |
|
|
|
455 |
|
|
/* ------------------------------------------------------------
|
456 |
|
|
* INFO Read 16-bit from Wishbone device (blocking), standard mode, pipelined
|
457 |
|
|
* PARAM 32-bit device address
|
458 |
|
|
* RETURN 16-bit read data
|
459 |
|
|
* ------------------------------------------------------------ */
|
460 |
|
|
uint16_t neo430_wishbone16_read(uint32_t a) {
|
461 |
|
|
|
462 |
|
|
// 16-bit transfer
|
463 |
|
|
WB32_CT = 0x3; // low 16-bit word
|
464 |
|
|
|
465 |
|
|
// device address + transfer trigger
|
466 |
|
|
WB32_RA_32bit = a;
|
467 |
|
|
|
468 |
|
|
// wait for access to be completed - blocking!
|
469 |
|
|
while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
|
470 |
|
|
|
471 |
|
|
return WB32_LD; // low 16-bit word
|
472 |
|
|
}
|
473 |
|
|
|
474 |
|
|
|
475 |
|
|
/* ------------------------------------------------------------
|
476 |
|
|
* INFO Write 16-bit to Wishbone device (blocking), standard mode, pipelined
|
477 |
|
|
* INFO This function performs a data alignment based on the address!
|
478 |
|
|
* PARAM a: 32-bit device address
|
479 |
|
|
* PARAM d: 16-bit write data
|
480 |
|
|
* ------------------------------------------------------------ */
|
481 |
|
|
void neo430_wishbone16_write(uint32_t a, uint16_t d) {
|
482 |
|
|
|
483 |
|
|
// 16-bit transfer
|
484 |
|
|
WB32_CT = 0x3; // low 16-bit word
|
485 |
|
|
WB32_LD = d;
|
486 |
|
|
|
487 |
|
|
// device address + transfer trigger
|
488 |
|
|
WB32_WA_32bit = a;
|
489 |
|
|
|
490 |
|
|
// wait for access to be completed - blocking!
|
491 |
|
|
while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
|
492 |
|
|
}
|
493 |
|
|
|
494 |
|
|
|
495 |
|
|
// ************************************************************************************************
|
496 |
|
|
// NONBLOCKING FUNCTIONS
|
497 |
|
|
// ************************************************************************************************
|
498 |
|
|
// Use wishbone_busy() to check status
|
499 |
|
|
// Use Wishbone_get_data(address) to get data from read accesses
|
500 |
|
|
// ************************************************************************************************
|
501 |
|
|
|
502 |
|
|
/* ------------------------------------------------------------
|
503 |
|
|
* INFO Initiate read 16-bit from Wishbone device (non-blocking), standard mode, pipelined
|
504 |
|
|
* PARAM 32-bit device address
|
505 |
|
|
* ------------------------------------------------------------ */
|
506 |
|
|
void neo430_wishbone16_read_start(uint32_t a) {
|
507 |
|
|
|
508 |
|
|
// 16-bit transfer
|
509 |
|
|
WB32_CT = 0x3;
|
510 |
|
|
|
511 |
|
|
// device address + transfer trigger
|
512 |
|
|
WB32_RA_32bit = a;
|
513 |
|
|
}
|
514 |
|
|
|
515 |
|
|
|
516 |
|
|
/* ------------------------------------------------------------
|
517 |
|
|
* INFO Initiate write 16-bit to Wishbone device (non-blocking), standard mode, pipelined
|
518 |
|
|
* PARAM a: 32-bit device address
|
519 |
|
|
* PARAM d: 16-bit write data
|
520 |
|
|
* ------------------------------------------------------------ */
|
521 |
|
|
void neo430_wishbone16_write_start(uint32_t a, uint16_t d) {
|
522 |
|
|
|
523 |
|
|
// 16-bit transfer
|
524 |
|
|
WB32_CT = 0x3;
|
525 |
|
|
|
526 |
|
|
// write data
|
527 |
|
|
WB32_LD = d;
|
528 |
|
|
|
529 |
|
|
// device address + transfer trigger
|
530 |
|
|
WB32_WA_32bit = a;
|
531 |
|
|
}
|
532 |
|
|
|
533 |
|
|
|
534 |
|
|
/* ------------------------------------------------------------
|
535 |
|
|
* INFO Read 16-bit data after nonblocking transaction has been started
|
536 |
|
|
* RETURN 16-bit read data
|
537 |
|
|
* ------------------------------------------------------------ */
|
538 |
|
|
uint16_t neo430_wishbone16_get_data(void) {
|
539 |
|
|
|
540 |
|
|
return WB32_LD;
|
541 |
|
|
}
|
542 |
|
|
|
543 |
|
|
|
544 |
|
|
// ************************************************************************************************
|
545 |
|
|
// Blocking access functions for data bus width = 8-bit, NO ADDRESS ALIGNMENT
|
546 |
|
|
// ************************************************************************************************
|
547 |
|
|
|
548 |
|
|
|
549 |
|
|
/* ------------------------------------------------------------
|
550 |
|
|
* INFO Read 8-bit from Wishbone device (blocking), standard mode, pipelined
|
551 |
|
|
* PARAM 32-bit device address
|
552 |
|
|
* RETURN 8-bit read data
|
553 |
|
|
* ------------------------------------------------------------ */
|
554 |
|
|
uint8_t neo430_wishbone8_read(uint32_t a) {
|
555 |
|
|
|
556 |
|
|
// 8-bit transfer
|
557 |
|
|
WB32_CT = 0x1;
|
558 |
|
|
|
559 |
|
|
// device address + transfer trigger
|
560 |
|
|
WB32_RA_32bit = a;
|
561 |
|
|
|
562 |
|
|
// wait for access to be completed - blocking!
|
563 |
|
|
while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
|
564 |
|
|
|
565 |
|
|
return (uint8_t)WB32_LD; // low 16-bit word
|
566 |
|
|
}
|
567 |
|
|
|
568 |
|
|
|
569 |
|
|
/* ------------------------------------------------------------
|
570 |
|
|
* INFO Write 8-bit to Wishbone device (blocking), standard mode, pipelined
|
571 |
|
|
* INFO This function performs a data alignment based on the address!
|
572 |
|
|
* PARAM a: 32-bit device address
|
573 |
|
|
* PARAM d: 8-bit write data
|
574 |
|
|
* ------------------------------------------------------------ */
|
575 |
|
|
void neo430_wishbone8_write(uint32_t a, uint8_t d) {
|
576 |
|
|
|
577 |
|
|
// 8-bit transfer
|
578 |
|
|
WB32_CT = 0x1; // low 8-bit word
|
579 |
|
|
WB32_LD = (uint16_t)d;
|
580 |
|
|
|
581 |
|
|
// device address + transfer trigger
|
582 |
|
|
WB32_WA_32bit = a;
|
583 |
|
|
|
584 |
|
|
// wait for access to be completed - blocking!
|
585 |
|
|
while((WB32_CT & (1<<WB32_CT_PENDING)) != 0);
|
586 |
|
|
}
|
587 |
|
|
|
588 |
|
|
|
589 |
|
|
// ************************************************************************************************
|
590 |
|
|
// NONBLOCKING FUNCTIONS
|
591 |
|
|
// ************************************************************************************************
|
592 |
|
|
// Use wishbone_busy() to check status
|
593 |
|
|
// Use Wishbone_get_data(address) to get data from read accesses
|
594 |
|
|
// ************************************************************************************************
|
595 |
|
|
|
596 |
|
|
/* ------------------------------------------------------------
|
597 |
|
|
* INFO Initiate read 16-bit from Wishbone device (non-blocking), standard mode, pipelined
|
598 |
|
|
* PARAM 8-bit device address
|
599 |
|
|
* ------------------------------------------------------------ */
|
600 |
|
|
void neo430_wishbone8_read_start(uint32_t a) {
|
601 |
|
|
|
602 |
|
|
// 8-bit transfer
|
603 |
|
|
WB32_CT = 0x1;
|
604 |
|
|
|
605 |
|
|
// device address + transfer trigger
|
606 |
|
|
WB32_RA_32bit = a;
|
607 |
|
|
}
|
608 |
|
|
|
609 |
|
|
|
610 |
|
|
/* ------------------------------------------------------------
|
611 |
|
|
* INFO Initiate write 8-bit to Wishbone device (non-blocking), standard mode, pipelined
|
612 |
|
|
* PARAM a: 32-bit device address
|
613 |
|
|
* PARAM d: 8-bit write data
|
614 |
|
|
* ------------------------------------------------------------ */
|
615 |
|
|
void neo430_wishbone8_write_start(uint32_t a, uint8_t d) {
|
616 |
|
|
|
617 |
|
|
// 8-bit transfer
|
618 |
|
|
WB32_CT = 0x1;
|
619 |
|
|
|
620 |
|
|
// write data
|
621 |
|
|
WB32_LD = (uint16_t)d;
|
622 |
|
|
|
623 |
|
|
// device address + transfer trigger
|
624 |
|
|
WB32_WA_32bit = a;
|
625 |
|
|
}
|
626 |
|
|
|
627 |
|
|
|
628 |
|
|
/* ------------------------------------------------------------
|
629 |
|
|
* INFO Read 8-bit data after nonblocking transaction has been started
|
630 |
|
|
* RETURN 8-bit read data
|
631 |
|
|
* ------------------------------------------------------------ */
|
632 |
|
|
uint8_t neo430_wishbone8_get_data(void) {
|
633 |
|
|
|
634 |
|
|
return (uint8_t)WB32_LD;
|
635 |
|
|
}
|
636 |
|
|
|
637 |
|
|
|
638 |
|
|
// ************************************************************************************************
|
639 |
|
|
// NONBLOCKING ARBITRATION FUNCTIONS
|
640 |
|
|
// ************************************************************************************************
|
641 |
|
|
|
642 |
|
|
/* ------------------------------------------------------------
|
643 |
|
|
* INFO Check if Wishbone transaction is (still) in progress
|
644 |
|
|
* RETURN 1 if transfer in progress, 0 if idel
|
645 |
|
|
* ------------------------------------------------------------ */
|
646 |
|
|
uint16_t neo430_wishbone_busy(void) {
|
647 |
|
|
|
648 |
|
|
return (WB32_CT & (1<<WB32_CT_PENDING));
|
649 |
|
|
}
|
650 |
|
|
|
651 |
|
|
|
652 |
|
|
/* ------------------------------------------------------------
|
653 |
|
|
* INFO Terminate current Wishbone transfer
|
654 |
|
|
* ------------------------------------------------------------ */
|
655 |
|
|
void neo430_wishbone_terminate(void) {
|
656 |
|
|
|
657 |
|
|
WB32_CT = 0;
|
658 |
|
|
}
|