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Settings report for cycloneIII_3c25_niosII_video
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Wed Aug 15 10:42:29 2012
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Quartus II Version 11.0 Build 157 04/27/2011 SJ Web Edition
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---------------------
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; Table of Contents ;
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---------------------
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1. Legal Notice
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2. Fitter Settings
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----------------
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; Legal Notice ;
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----------------
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Copyright (C) 1991-2011 Altera Corporation
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Your use of Altera Corporation's design tools, logic functions
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and other software and tools, and its AMPP partner logic
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functions, and any output files from any of the foregoing
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(including device programming or simulation files), and any
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associated documentation or information are expressly subject
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to the terms and conditions of the Altera Program License
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Subscription Agreement, Altera MegaCore Function License
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Agreement, or other applicable license agreement, including,
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without limitation, that your use is for the sole purpose of
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programming logic devices manufactured by Altera and sold by
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Altera or its authorized distributors. Please refer to the
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applicable agreement for further details.
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+------------------------------------------------------------------------------------------------------------------------------------------------------------+
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; Fitter Settings ;
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+----------------------------------------------------------------------------+---------------------------------------+---------------------------------------+
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; Option ; Setting ; Default Value ;
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+----------------------------------------------------------------------------+---------------------------------------+---------------------------------------+
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; Device ; EP3C25F324C6 ; ;
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; Maximum processors allowed for parallel compilation ; All ; ;
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; Minimum Core Junction Temperature ; 0 ; ;
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; Maximum Core Junction Temperature ; 85 ; ;
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; Fit Attempts to Skip ; 0 ; 0.0 ;
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; Perform Physical Synthesis for Combinational Logic for Fitting ; On ; Off ;
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; Perform Physical Synthesis for Combinational Logic for Performance ; On ; Off ;
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; Perform Register Duplication for Performance ; On ; Off ;
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; Perform Logic to Memory Mapping for Fitting ; On ; Off ;
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; Perform Register Retiming for Performance ; On ; Off ;
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; Perform Asynchronous Signal Pipelining ; On ; Off ;
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; Fitter Effort ; Standard Fit ; Auto Fit ;
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; Enable Beneficial Skew Optimization ; Off ; On ;
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; Use smart compilation ; Off ; Off ;
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; Enable parallel Assembler and TimeQuest Timing Analyzer during compilation ; On ; On ;
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; Enable compact report table ; Off ; Off ;
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; Use TimeQuest Timing Analyzer ; On ; On ;
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; Auto Merge PLLs ; On ; On ;
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; Router Timing Optimization Level ; Normal ; Normal ;
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; Perform Clocking Topology Analysis During Routing ; Off ; Off ;
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; Placement Effort Multiplier ; 1.0 ; 1.0 ;
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; Router Effort Multiplier ; 1.0 ; 1.0 ;
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; Optimize Hold Timing ; All Paths ; All Paths ;
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; Optimize Multi-Corner Timing ; Off ; Off ;
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; PowerPlay Power Optimization ; Normal compilation ; Normal compilation ;
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; SSN Optimization ; Off ; Off ;
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; Optimize Timing ; Normal compilation ; Normal compilation ;
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; Optimize Timing for ECOs ; Off ; Off ;
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; Regenerate full fit report during ECO compiles ; Off ; Off ;
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; Optimize IOC Register Placement for Timing ; Normal ; Normal ;
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; Limit to One Fitting Attempt ; Off ; Off ;
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; Final Placement Optimizations ; Automatically ; Automatically ;
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; Fitter Aggressive Routability Optimizations ; Automatically ; Automatically ;
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; Fitter Initial Placement Seed ; 1 ; 1 ;
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; PCI I/O ; Off ; Off ;
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; Weak Pull-Up Resistor ; Off ; Off ;
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; Enable Bus-Hold Circuitry ; Off ; Off ;
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; Auto Packed Registers ; Auto ; Auto ;
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; Auto Delay Chains ; On ; On ;
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; Allow Single-ended Buffer for Differential-XSTL Input ; Off ; Off ;
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; Treat Bidirectional Pin as Output Pin ; Off ; Off ;
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; Physical Synthesis Effort Level ; Normal ; Normal ;
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; Logic Cell Insertion - Logic Duplication ; Auto ; Auto ;
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; Auto Register Duplication ; Auto ; Auto ;
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; Auto Global Clock ; On ; On ;
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; Auto Global Register Control Signals ; On ; On ;
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; Reserve all unused pins ; As input tri-stated with weak pull-up ; As input tri-stated with weak pull-up ;
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; Synchronizer Identification ; Off ; Off ;
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; Optimize Design for Metastability ; On ; On ;
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; Force Fitter to Avoid Periphery Placement Warnings ; Off ; Off ;
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; RAM Bit Reservation (Cyclone III) ; Off ; Off ;
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; Enable input tri-state on active configuration pins in user mode ; Off ; Off ;
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+----------------------------------------------------------------------------+---------------------------------------+---------------------------------------+
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