Subversion Repositories soc_maker

require_relative '../lib/soc_maker'

options = {}

options[ :libpath     ] = "./core_lib/"

##

# initialize SOCMaker core

#   this sets up logging and parses all yaml files

#   found in the configure path (see also soc_maker_conf.rb)

SOCMaker::load( options )

puts "Library Content:"

puts SOCMaker::lib

SOCMaker::lib.cores do |name_version, core|

#   core.get_files

end

soc = SOCMaker::SOCDef.new( 'or1200_test', 'v1', 'or1200_test' )

SOCMaker::lib.add_core( soc )

soc_inst = SOCMaker::CoreInst.new( 'or1200_testv1' )

#soc_inst.name = "soc_inst"

port = SOCMaker::IfcPort.new( 'clk', 1 )

ifc  = SOCMaker::IfcDef.new( 'clk', '1', 1, { 'clk_i' => port} )

soc.interfaces[ 'clk_ifc'.to_sym ] = ifc

port = SOCMaker::IfcPort.new( 'rst', 1 )

ifc  = SOCMaker::IfcDef.new( 'rst', '1', 1, { 'rst_i' => port} )

soc.interfaces[ 'rst_ifc'.to_sym ] = ifc

soc.interfaces[ 'jtag_ifc'.to_sym ] = SOCMaker::IfcDef.new( 'jtag_tap', '1', 1, {

   'tck_i'           => SOCMaker::IfcPort.new( 'tck', 1 ),

   'tdi_i'           => SOCMaker::IfcPort.new( 'tdi', 1 ),

   'tdo_o'           => SOCMaker::IfcPort.new( 'tdo' ,1 ),

   'debug_rst_i'       => SOCMaker::IfcPort.new( 'rst', 1 ),

   'shift_dr_i'      => SOCMaker::IfcPort.new( 'shift', 1 ),

   'pause_dr_i'      => SOCMaker::IfcPort.new( 'pause', 1 ),

   'update_dr_i'     => SOCMaker::IfcPort.new( 'update', 1 ),

   'capture_dr_i'    => SOCMaker::IfcPort.new( 'capture', 1 ),

   'debug_select_i'  => SOCMaker::IfcPort.new( 'select', 1 ) } )

soc.add_core( 'or1200',          'rel2',  'cpu'    )

soc.add_core( 'wb_connect',      '1',     'wb_bus' )

soc.add_core( 'adv_debug_sys',   'ads_3', 'dbg' )

soc.add_core( 'ram_wb',          'b3',    'ram' )

soc.consistency_check

soc.add_connection( 'or1200_test', 'clk_ifc', 'cpu', 'clk',  'con_main_clk'      )

soc.add_connection( 'or1200_test', 'rst_ifc', 'cpu', 'rst',  'con_main_rst'      )

soc.add_connection( 'or1200_test', 'clk_ifc', 'wb_bus', 'clk',  'con_main_clk'   )

soc.add_connection( 'or1200_test', 'rst_ifc', 'wb_bus', 'rst',  'con_main_rst'   )

soc.add_connection( 'wb_bus', 'i0', 'cpu', 'wb_instruction',   'con_instruction' )

soc.add_connection( 'wb_bus', 'i1', 'cpu', 'wb_data',          'con_data'        )

soc.add_connection( 'wb_bus', 'i2', 'dbg', 'wb_ifc',           'con_wb_debug'    )

soc.add_connection( 'wb_bus', 't1', 'ram', 'wb_ifc',           'con_ram'         )

soc.add_connection( 'dbg',         'cpu0_dbg',  'cpu', 'ext_debug',           'con_debug'       )

soc.add_connection( 'or1200_test', 'clk_ifc',   'dbg',        'cpu0_dbg_clk',   'con_main_clk'     )

soc.add_connection( 'or1200_test', 'jtag_ifc',  'dbg',        'jtag',           'con_jtag'         )

soc_inst.consistency_check

soc_inst.gen_toplevel

soc.copy_files