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[/] [spacewiresystemc/] [trunk/] [altera_work/] [spw_fifo_ulight/] [.qsys_edit/] [ulight_fifo_schematic.nlv] - Blame information for rev 40

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Line No. Rev Author Line
1 32 redbear
# # File gsaved with Nlview version 6.3.8  2013-12-19 bk=1.2992 VDI=34 GEI=35
2
#
3
preplace inst ulight_fifo.write_en_tx -pg 1 -lvl 3 -y 2130
4
preplace inst ulight_fifo.hps_0.usb0 -pg 1
5
preplace inst ulight_fifo.fsm_info -pg 1 -lvl 3 -y 1230
6
preplace inst ulight_fifo.hps_0.gmac0 -pg 1
7
preplace inst ulight_fifo.hps_0.gmac1 -pg 1
8
preplace inst ulight_fifo.hps_0.usb1 -pg 1
9
preplace inst ulight_fifo.hps_0.sdrctl -pg 1
10
preplace inst ulight_fifo.hps_0.axi_sdram -pg 1
11
preplace inst ulight_fifo.timecode_tx_enable -pg 1 -lvl 3 -y 1830
12
preplace inst ulight_fifo.hps_0.axi_ocram -pg 1
13
preplace inst ulight_fifo.hps_0.timer -pg 1
14
preplace inst ulight_fifo.hps_0.nand0 -pg 1
15
preplace inst ulight_fifo.timecode_tx_data -pg 1 -lvl 3 -y 1730
16
preplace inst ulight_fifo.hps_0.spim0 -pg 1
17
preplace inst ulight_fifo.data_read_en_rx -pg 1 -lvl 3 -y 730
18
preplace inst ulight_fifo.hps_0 -pg 1 -lvl 2 -y 140
19
preplace inst ulight_fifo.hps_0.scu -pg 1
20
preplace inst ulight_fifo.hps_0.spim1 -pg 1
21
preplace inst ulight_fifo.write_data_fifo_tx -pg 1 -lvl 3 -y 2030
22
preplace inst ulight_fifo.hps_0.bridges -pg 1
23
preplace inst ulight_fifo.hps_0.rstmgr -pg 1
24
preplace inst ulight_fifo.data_flag_rx -pg 1 -lvl 3 -y 530
25
preplace inst ulight_fifo.hps_0.eosc1 -pg 1
26
preplace inst ulight_fifo.link_start -pg 1 -lvl 3 -y 1430
27
preplace inst ulight_fifo.clk_0 -pg 1 -lvl 1 -y 230
28
preplace inst ulight_fifo.hps_0.eosc2 -pg 1
29
preplace inst ulight_fifo.hps_0.wd_timer0 -pg 1
30
preplace inst ulight_fifo.timecode_rx -pg 1 -lvl 3 -y 1630
31
preplace inst ulight_fifo.hps_0.l3regs -pg 1
32
preplace inst ulight_fifo.hps_0.wd_timer1 -pg 1
33
preplace inst ulight_fifo.timecode_ready_rx -pg 1 -lvl 3 -y 1530
34
preplace inst ulight_fifo.clock_sel -pg 1 -lvl 3 -y 130
35
preplace inst ulight_fifo.hps_0.sysmgr -pg 1
36
preplace inst ulight_fifo.led_pio_test -pg 1 -lvl 3 -y 330
37
preplace inst ulight_fifo.hps_0.arm_a9_0 -pg 1
38
preplace inst ulight_fifo.hps_0.sdmmc -pg 1
39
preplace inst ulight_fifo.hps_0.arm_a9_1 -pg 1
40
preplace inst ulight_fifo.hps_0.clk_0 -pg 1
41
preplace inst ulight_fifo.counter_tx_fifo -pg 1 -lvl 3 -y 230
42
preplace inst ulight_fifo.hps_0.qspi -pg 1
43
preplace inst ulight_fifo -pg 1 -lvl 1 -y 40 -regy -20
44
preplace inst ulight_fifo.hps_0.timer0 -pg 1
45
preplace inst ulight_fifo.hps_0.timer1 -pg 1
46
preplace inst ulight_fifo.timecode_tx_ready -pg 1 -lvl 3 -y 1930
47
preplace inst ulight_fifo.pll_0 -pg 1 -lvl 3 -y 430
48
preplace inst ulight_fifo.hps_0.timer2 -pg 1
49
preplace inst ulight_fifo.hps_0.dcan0 -pg 1
50
preplace inst ulight_fifo.hps_0.arm_gic_0 -pg 1
51
preplace inst ulight_fifo.hps_0.L2 -pg 1
52
preplace inst ulight_fifo.hps_0.timer3 -pg 1
53
preplace inst ulight_fifo.hps_0.dcan1 -pg 1
54
preplace inst ulight_fifo.hps_0.dma -pg 1
55
preplace inst ulight_fifo.hps_0.clkmgr -pg 1
56
preplace inst ulight_fifo.hps_0.f2s_sdram_ref_clk -pg 1
57
preplace inst ulight_fifo.fifo_full_rx_status -pg 1 -lvl 3 -y 1030
58
preplace inst ulight_fifo.fifo_empty_tx_status -pg 1 -lvl 3 -y 930
59
preplace inst ulight_fifo.hps_0.f2s_periph_ref_clk -pg 1
60
preplace inst ulight_fifo.hps_0.hps_io -pg 1
61
preplace inst ulight_fifo.fifo_full_tx_status -pg 1 -lvl 3 -y 1130
62
preplace inst ulight_fifo.fifo_empty_rx_status -pg 1 -lvl 3 -y 830
63
preplace inst ulight_fifo.hps_0.hps_io.border -pg 1
64
preplace inst ulight_fifo.hps_0.uart0 -pg 1
65
preplace inst ulight_fifo.hps_0.fpgamgr -pg 1
66
preplace inst ulight_fifo.hps_0.uart1 -pg 1
67
preplace inst ulight_fifo.hps_0.fpga_interfaces -pg 1
68
preplace inst ulight_fifo.hps_0.i2c0 -pg 1
69
preplace inst ulight_fifo.counter_rx_fifo -pg 1 -lvl 3 -y 30
70
preplace inst ulight_fifo.hps_0.i2c1 -pg 1
71
preplace inst ulight_fifo.hps_0.gpio0 -pg 1
72
preplace inst ulight_fifo.auto_start -pg 1 -lvl 3 -y 2230
73
preplace inst ulight_fifo.hps_0.i2c2 -pg 1
74
preplace inst ulight_fifo.hps_0.i2c3 -pg 1
75
preplace inst ulight_fifo.hps_0.gpio1 -pg 1
76
preplace inst ulight_fifo.link_disable -pg 1 -lvl 3 -y 1330
77
preplace inst ulight_fifo.data_info -pg 1 -lvl 3 -y 630
78
preplace inst ulight_fifo.hps_0.gpio2 -pg 1
79 40 redbear
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.clock_sel_external_connection,(SLAVE)clock_sel.external_connection) 1 0 3 NJ 200 NJ 220 NJ
80
preplace netloc EXPORTulight_fifo(SLAVE)timecode_ready_rx.external_connection,(SLAVE)ulight_fifo.timecode_ready_rx_external_connection) 1 0 3 NJ 1560 NJ 1560 NJ
81
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.link_disable_external_connection,(SLAVE)link_disable.external_connection) 1 0 3 NJ 1360 NJ 1360 NJ
82 32 redbear
preplace netloc EXPORTulight_fifo(SLAVE)data_info.external_connection,(SLAVE)ulight_fifo.data_info_external_connection) 1 0 3 NJ 660 NJ 660 NJ
83 40 redbear
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.counter_rx_fifo_external_connection,(SLAVE)counter_rx_fifo.external_connection) 1 0 3 NJ 60 NJ 60 NJ
84 32 redbear
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.fsm_info_external_connection,(SLAVE)fsm_info.external_connection) 1 0 3 NJ 1260 NJ 1260 NJ
85
preplace netloc EXPORTulight_fifo(SLAVE)fifo_full_tx_status.external_connection,(SLAVE)ulight_fifo.fifo_full_tx_status_external_connection) 1 0 3 NJ 1160 NJ 1160 NJ
86
preplace netloc EXPORTulight_fifo(SLAVE)fifo_empty_rx_status.external_connection,(SLAVE)ulight_fifo.fifo_empty_rx_status_external_connection) 1 0 3 NJ 860 NJ 860 NJ
87
preplace netloc EXPORTulight_fifo(SLAVE)counter_tx_fifo.external_connection,(SLAVE)ulight_fifo.counter_tx_fifo_external_connection) 1 0 3 NJ 220 NJ 260 NJ
88
preplace netloc EXPORTulight_fifo(SLAVE)timecode_tx_data.external_connection,(SLAVE)ulight_fifo.timecode_tx_data_external_connection) 1 0 3 NJ 1760 NJ 1760 NJ
89 40 redbear
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.link_start_external_connection,(SLAVE)link_start.external_connection) 1 0 3 NJ 1460 NJ 1460 NJ
90
preplace netloc EXPORTulight_fifo(SLAVE)data_flag_rx.external_connection,(SLAVE)ulight_fifo.data_flag_rx_external_connection) 1 0 3 NJ 560 NJ 560 NJ
91 32 redbear
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.clk,(SLAVE)clk_0.clk_in) 1 0 1 NJ
92
preplace netloc EXPORTulight_fifo(SLAVE)clk_0.clk_in_reset,(SLAVE)ulight_fifo.reset) 1 0 1 NJ
93 40 redbear
preplace netloc EXPORTulight_fifo(MASTER)ulight_fifo.pll_0_outclk0,(MASTER)pll_0.outclk0) 1 3 1 NJ
94 32 redbear
preplace netloc EXPORTulight_fifo(SLAVE)hps_0.memory,(SLAVE)ulight_fifo.memory) 1 0 2 NJ 170 NJ
95 40 redbear
preplace netloc EXPORTulight_fifo(SLAVE)led_pio_test.external_connection,(SLAVE)ulight_fifo.led_pio_test_external_connection) 1 0 3 NJ 360 NJ 360 NJ
96
preplace netloc EXPORTulight_fifo(SLAVE)write_en_tx.external_connection,(SLAVE)ulight_fifo.write_en_tx_external_connection) 1 0 3 NJ 2160 NJ 2160 NJ
97
preplace netloc EXPORTulight_fifo(SLAVE)timecode_tx_ready.external_connection,(SLAVE)ulight_fifo.timecode_tx_ready_external_connection) 1 0 3 NJ 1960 NJ 1960 NJ
98
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.pll_0_locked,(SLAVE)pll_0.locked) 1 0 3 NJ 440 NJ 440 NJ
99 32 redbear
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.fifo_empty_tx_status_external_connection,(SLAVE)fifo_empty_tx_status.external_connection) 1 0 3 NJ 960 NJ 960 NJ
100 40 redbear
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.timecode_tx_enable_external_connection,(SLAVE)timecode_tx_enable.external_connection) 1 0 3 NJ 1860 NJ 1860 NJ
101 32 redbear
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.timecode_rx_external_connection,(SLAVE)timecode_rx.external_connection) 1 0 3 NJ 1660 NJ 1660 NJ
102
preplace netloc EXPORTulight_fifo(SLAVE)fifo_full_rx_status.external_connection,(SLAVE)ulight_fifo.fifo_full_rx_status_external_connection) 1 0 3 NJ 1060 NJ 1060 NJ
103
preplace netloc EXPORTulight_fifo(SLAVE)data_read_en_rx.external_connection,(SLAVE)ulight_fifo.data_read_en_rx_external_connection) 1 0 3 NJ 760 NJ 760 NJ
104 40 redbear
preplace netloc FAN_OUTulight_fifo(SLAVE)data_flag_rx.reset,(SLAVE)timecode_tx_enable.reset,(SLAVE)fifo_full_rx_status.reset,(SLAVE)timecode_tx_data.reset,(SLAVE)clock_sel.reset,(SLAVE)link_disable.reset,(SLAVE)counter_tx_fifo.reset,(SLAVE)link_start.reset,(SLAVE)data_info.reset,(SLAVE)fifo_full_tx_status.reset,(SLAVE)data_read_en_rx.reset,(SLAVE)fifo_empty_rx_status.reset,(MASTER)clk_0.clk_reset,(SLAVE)counter_rx_fifo.reset,(SLAVE)write_data_fifo_tx.reset,(SLAVE)fifo_empty_tx_status.reset,(SLAVE)fsm_info.reset,(SLAVE)timecode_tx_ready.reset,(SLAVE)write_en_tx.reset,(SLAVE)led_pio_test.reset,(SLAVE)timecode_rx.reset,(SLAVE)pll_0.reset,(SLAVE)timecode_ready_rx.reset,(SLAVE)auto_start.reset) 1 1 2 410 280 780
105 32 redbear
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.write_data_fifo_tx_external_connection,(SLAVE)write_data_fifo_tx.external_connection) 1 0 3 NJ 2060 NJ 2060 NJ
106 40 redbear
preplace netloc EXPORTulight_fifo(SLAVE)auto_start.external_connection,(SLAVE)ulight_fifo.auto_start_external_connection) 1 0 3 NJ 2260 NJ 2260 NJ
107
preplace netloc FAN_OUTulight_fifo(SLAVE)timecode_tx_enable.clk,(SLAVE)link_disable.clk,(SLAVE)counter_tx_fifo.clk,(SLAVE)clock_sel.clk,(SLAVE)data_read_en_rx.clk,(SLAVE)timecode_tx_ready.clk,(SLAVE)write_data_fifo_tx.clk,(SLAVE)hps_0.h2f_axi_clock,(SLAVE)fsm_info.clk,(SLAVE)write_en_tx.clk,(SLAVE)timecode_ready_rx.clk,(SLAVE)data_info.clk,(SLAVE)timecode_tx_data.clk,(SLAVE)auto_start.clk,(SLAVE)data_flag_rx.clk,(SLAVE)pll_0.refclk1,(SLAVE)led_pio_test.clk,(SLAVE)timecode_rx.clk,(SLAVE)fifo_empty_rx_status.clk,(SLAVE)fifo_full_rx_status.clk,(SLAVE)pll_0.refclk,(MASTER)clk_0.clk,(SLAVE)link_start.clk,(SLAVE)counter_rx_fifo.clk,(SLAVE)fifo_full_tx_status.clk,(SLAVE)fifo_empty_tx_status.clk) 1 1 2 450 240 760
108
preplace netloc FAN_OUTulight_fifo(SLAVE)data_read_en_rx.s1,(SLAVE)clock_sel.s1,(SLAVE)write_en_tx.s1,(SLAVE)timecode_tx_enable.s1,(SLAVE)fsm_info.s1,(SLAVE)counter_tx_fifo.s1,(SLAVE)fifo_full_tx_status.s1,(SLAVE)timecode_rx.s1,(SLAVE)link_disable.s1,(SLAVE)data_flag_rx.s1,(MASTER)hps_0.h2f_axi_master,(SLAVE)timecode_ready_rx.s1,(SLAVE)led_pio_test.s1,(SLAVE)write_data_fifo_tx.s1,(SLAVE)link_start.s1,(SLAVE)auto_start.s1,(SLAVE)timecode_tx_ready.s1,(SLAVE)fifo_empty_rx_status.s1,(SLAVE)data_info.s1,(SLAVE)fifo_full_rx_status.s1,(SLAVE)fifo_empty_tx_status.s1,(SLAVE)timecode_tx_data.s1,(SLAVE)counter_rx_fifo.s1) 1 2 1 740
109
levelinfo -pg 1 0 200 1130
110
levelinfo -hier ulight_fifo 210 240 570 860 1020

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