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[/] [spacewiresystemc/] [trunk/] [altera_work/] [spw_fifo_ulight/] [db/] [spw_fifo_ulight.smp_dump.txt] - Blame information for rev 35

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Line No. Rev Author Line
1 32 redbear 
 
2 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
3 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
4 
state.ST_IDLE 0 0 0 0
5 
state.ST_COMP_TRANS 1 0 0 1
6 
state.ST_UNCOMP_TRANS 1 0 1 0
7 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
8 
 
9 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
10 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
11 
state.ST_IDLE 0 0 0 0
12 
state.ST_COMP_TRANS 1 0 0 1
13 
state.ST_UNCOMP_TRANS 1 0 1 0
14 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
15 
 
16 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
17 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
18 
state.ST_IDLE 0 0 0 0
19 
state.ST_COMP_TRANS 1 0 0 1
20 
state.ST_UNCOMP_TRANS 1 0 1 0
21 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
22 
 
23 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
24 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
25 
state.ST_IDLE 0 0 0 0
26 
state.ST_COMP_TRANS 1 0 0 1
27 
state.ST_UNCOMP_TRANS 1 0 1 0
28 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
29 
 
30 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
31 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
32 
state.ST_IDLE 0 0 0 0
33 
state.ST_COMP_TRANS 1 0 0 1
34 
state.ST_UNCOMP_TRANS 1 0 1 0
35 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
36 
 
37 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
38 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
39 
state.ST_IDLE 0 0 0 0
40 
state.ST_COMP_TRANS 1 0 0 1
41 
state.ST_UNCOMP_TRANS 1 0 1 0
42 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
43 
 
44 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
45 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
46 
state.ST_IDLE 0 0 0 0
47 
state.ST_COMP_TRANS 1 0 0 1
48 
state.ST_UNCOMP_TRANS 1 0 1 0
49 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
50 
 
51 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
52 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
53 
state.ST_IDLE 0 0 0 0
54 
state.ST_COMP_TRANS 1 0 0 1
55 
state.ST_UNCOMP_TRANS 1 0 1 0
56 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
57 
 
58 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
59 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
60 
state.ST_IDLE 0 0 0 0
61 
state.ST_COMP_TRANS 1 0 0 1
62 
state.ST_UNCOMP_TRANS 1 0 1 0
63 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
64 
 
65 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
66 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
67 
state.ST_IDLE 0 0 0 0
68 
state.ST_COMP_TRANS 1 0 0 1
69 
state.ST_UNCOMP_TRANS 1 0 1 0
70 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
71 
 
72 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
73 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
74 
state.ST_IDLE 0 0 0 0
75 
state.ST_COMP_TRANS 1 0 0 1
76 
state.ST_UNCOMP_TRANS 1 0 1 0
77 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
78 
 
79 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
80 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
81 
state.ST_IDLE 0 0 0 0
82 
state.ST_COMP_TRANS 1 0 0 1
83 
state.ST_UNCOMP_TRANS 1 0 1 0
84 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
85 
 
86 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
87 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
88 
state.ST_IDLE 0 0 0 0
89 
state.ST_COMP_TRANS 1 0 0 1
90 
state.ST_UNCOMP_TRANS 1 0 1 0
91 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
92 
 
93 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
94 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
95 
state.ST_IDLE 0 0 0 0
96 
state.ST_COMP_TRANS 1 0 0 1
97 
state.ST_UNCOMP_TRANS 1 0 1 0
98 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
99 
 
100 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
101 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
102 
state.ST_IDLE 0 0 0 0
103 
state.ST_COMP_TRANS 1 0 0 1
104 
state.ST_UNCOMP_TRANS 1 0 1 0
105 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
106 
 
107 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:fifo_empty_rx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
108 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
109 
state.ST_IDLE 0 0 0 0
110 
state.ST_COMP_TRANS 1 0 0 1
111 
state.ST_UNCOMP_TRANS 1 0 1 0
112 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
113 
 
114 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:fifo_full_rx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
115 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
116 
state.ST_IDLE 0 0 0 0
117 
state.ST_COMP_TRANS 1 0 0 1
118 
state.ST_UNCOMP_TRANS 1 0 1 0
119 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
120 
 
121 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
122 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
123 
state.ST_IDLE 0 0 0 0
124 
state.ST_COMP_TRANS 1 0 0 1
125 
state.ST_UNCOMP_TRANS 1 0 1 0
126 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
127 
 
128 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
129 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
130 
state.ST_IDLE 0 0 0 0
131 
state.ST_COMP_TRANS 1 0 0 1
132 
state.ST_UNCOMP_TRANS 1 0 1 0
133 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
134 
 
135 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:timecode_ready_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
136 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
137 
state.ST_IDLE 0 0 0 0
138 
state.ST_COMP_TRANS 1 0 0 1
139 
state.ST_UNCOMP_TRANS 1 0 1 0
140 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
141 
 
142 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:timecode_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
143 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
144 
state.ST_IDLE 0 0 0 0
145 
state.ST_COMP_TRANS 1 0 0 1
146 
state.ST_UNCOMP_TRANS 1 0 1 0
147 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
148 
 
149 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|state
150 
Name state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANS
151 
state.ST_IDLE 0 0 0 0
152 
state.ST_COMP_TRANS 1 0 0 1
153 
state.ST_UNCOMP_TRANS 1 0 1 0
154 
state.ST_UNCOMP_WR_SUBBURST 1 1 0 0
155 
 
156 
State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_pll_0:pll_0|altera_pll:altera_pll_i|dps_extra_kick:dps_extra_inst|dps_current_state
157 
Name dps_current_state.PHASE_DONE_LOW_0 dps_current_state.PHASE_DONE_LOW_4 dps_current_state.PHASE_DONE_LOW_3 dps_current_state.PHASE_DONE_LOW_2 dps_current_state.PHASE_DONE_LOW_1 dps_current_state.PHASE_DONE_HIGH
158 
dps_current_state.PHASE_DONE_HIGH 0 0 0 0 0 0
159 
dps_current_state.PHASE_DONE_LOW_1 0 0 0 0 1 1
160 
dps_current_state.PHASE_DONE_LOW_2 0 0 0 1 0 1
161 
dps_current_state.PHASE_DONE_LOW_3 0 0 1 0 0 1
162 
dps_current_state.PHASE_DONE_LOW_4 0 1 0 0 0 1
163 
dps_current_state.PHASE_DONE_LOW_0 1 0 0 0 0 1
164 
 
165 
State Machine - |SPW_ULIGHT_FIFO|spw_ulight_con_top_x:A_SPW_TOP|top_spw_ultra_light:SPW|TX_SPW:TX|state_tx
166 
Name state_tx.tx_spw_start state_tx.tx_spw_full state_tx.tx_spw_null_fct state_tx.tx_spw_null
167 
state_tx.tx_spw_start 0 0 0 0
168 
state_tx.tx_spw_null 1 0 0 1
169 
state_tx.tx_spw_null_fct 1 0 1 0
170 
state_tx.tx_spw_full 1 1 0 0
171 
 
172 
State Machine - |SPW_ULIGHT_FIFO|spw_ulight_con_top_x:A_SPW_TOP|top_spw_ultra_light:SPW|TX_SPW:TX|last_type
173 
Name last_type.TIMEC last_type.DATA last_type.EEP last_type.EOP last_type.FCT last_type.NULL
174 
last_type.NULL 0 0 0 0 0 0
175 
last_type.FCT 0 0 0 0 1 1
176 
last_type.EOP 0 0 0 1 0 1
177 
last_type.EEP 0 0 1 0 0 1
178 
last_type.DATA 0 1 0 0 0 1
179 
last_type.TIMEC 1 0 0 0 0 1
180 35 redbear 
 
181 
State Machine - |SPW_ULIGHT_FIFO|spw_ulight_con_top_x:A_SPW_TOP|top_spw_ultra_light:SPW|FSM_SPW:FSM|state_fsm
182 
Name state_fsm.error_reset state_fsm.run state_fsm.connecting state_fsm.started state_fsm.ready state_fsm.error_wait
183 
state_fsm.error_reset 0 0 0 0 0 0
184 
state_fsm.error_wait 1 0 0 0 0 1
185 
state_fsm.ready 1 0 0 0 1 0
186 
state_fsm.started 1 0 0 1 0 0
187 
state_fsm.connecting 1 0 1 0 0 0
188 
state_fsm.run 1 1 0 0 0 0

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