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vendor_name = ModelSim
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7 |
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/rtl/RTL_VB/rx_spw.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/rtl/RTL_VB/fsm_spw.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/rtl/RTL_VB/fifo_tx.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/rtl/RTL_VB/fifo_rx.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/rtl/RTL_VB/tx_spw.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/ulight_fifo.qip
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/ulight_fifo.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_reset_controller.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_reset_synchronizer.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_reset_controller.sdc
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_mm_interconnect_0.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_mm_interconnect_0_avalon_st_adapter.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_mm_interconnect_0_avalon_st_adapter_error_adapter_0.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_mm_interconnect_0_rsp_mux.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_merlin_arbitrator.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_mm_interconnect_0_rsp_demux.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_mm_interconnect_0_cmd_mux.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_mm_interconnect_0_cmd_demux.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_merlin_burst_adapter.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_merlin_burst_adapter_uncmpr.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_merlin_burst_adapter_13_1.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_merlin_burst_adapter_new.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_incr_burst_converter.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_wrap_burst_converter.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_default_burst_converter.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_merlin_address_alignment.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_avalon_st_pipeline_stage.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_avalon_st_pipeline_base.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_merlin_traffic_limiter.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_merlin_reorder_memory.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_avalon_sc_fifo.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_mm_interconnect_0_router_002.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_mm_interconnect_0_router.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_merlin_slave_agent.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_merlin_burst_uncompressor.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_merlin_axi_master_ni.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_merlin_slave_translator.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_write_data_fifo_tx.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_timecode_tx_data.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_timecode_rx.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_pll_0.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_pll_0.qip
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_led_pio_test.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_hps_0.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_hps_0_hps_io.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_sdram.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_sdram_pll.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_sdram_p0_clock_pair_generator.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_sdram_p0_acv_hard_addr_cmd_pads.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_sdram_p0_acv_hard_memphy.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_sdram_p0_acv_ldc.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_sdram_p0_acv_hard_io_pads.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_sdram_p0_generic_ddio.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_sdram_p0_reset.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_sdram_p0_reset_sync.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_sdram_p0_phy_csr.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_sdram_p0_iss_probe.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_sdram_p0.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_sdram_p0_altdqdqs.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altdq_dqs2_acv_connect_to_hard_phy_cyclonev.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_sdram_p0.ppf
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_sdram_p0_timing.tcl
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_sdram_p0_report_timing.tcl
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_sdram_p0_report_timing_core.tcl
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_sdram_p0_pin_map.tcl
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_sdram_p0_pin_assignments.tcl
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_sdram_p0_parameters.tcl
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_mem_if_hhp_qseq_synth_top.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_AC_ROM.hex
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/hps_inst_ROM.hex
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_mem_if_hard_memory_controller_top_cyclonev.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_mem_if_oct_cyclonev.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/altera_mem_if_dll_cyclonev.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_hps_0_hps_io_border.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_hps_0_fpga_interfaces.sv
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_fifo_empty_rx_status.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_data_info.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_data_flag_rx.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_counter_rx_fifo.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_clock_sel.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/ulight_fifo/synthesis/submodules/ulight_fifo_auto_start.v
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source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/top_rtl/spw_fifo_ulight.v
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source_file = 1, /home/felipe/intelFPGA_lite/17.0/quartus/libraries/megafunctions/altddio_out.tdf
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source_file = 1, /home/felipe/intelFPGA_lite/17.0/quartus/libraries/megafunctions/aglobal170.inc
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source_file = 1, /home/felipe/intelFPGA_lite/17.0/quartus/libraries/megafunctions/stratix_ddio.inc
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source_file = 1, /home/felipe/intelFPGA_lite/17.0/quartus/libraries/megafunctions/cyclone_ddio.inc
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source_file = 1, /home/felipe/intelFPGA_lite/17.0/quartus/libraries/megafunctions/lpm_mux.inc
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source_file = 1, /home/felipe/intelFPGA_lite/17.0/quartus/libraries/megafunctions/stratix_lcell.inc
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source_file = 1, /home/felipe/intelFPGA_lite/17.0/quartus/libraries/megafunctions/cbx.lst
|
97 |
|
|
source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/db/ddio_out_uqe.tdf
|
98 |
|
|
source_file = 1, /home/felipe/intelFPGA_lite/17.0/quartus/libraries/megafunctions/altera_pll.v
|
99 |
|
|
source_file = 1, /home/felipe/intelFPGA_lite/17.0/quartus/libraries/megafunctions/altera_pll_dps_lcell_comb.v
|
100 |
|
|
source_file = 1, /home/felipe/intelFPGA_lite/17.0/quartus/libraries/megafunctions/altera_cyclonev_pll.v
|
101 |
|
|
source_file = 1, /home/felipe/intelFPGA_lite/17.0/quartus/libraries/megafunctions/altsyncram.tdf
|
102 |
|
|
source_file = 1, /home/felipe/intelFPGA_lite/17.0/quartus/libraries/megafunctions/stratix_ram_block.inc
|
103 |
|
|
source_file = 1, /home/felipe/intelFPGA_lite/17.0/quartus/libraries/megafunctions/lpm_decode.inc
|
104 |
|
|
source_file = 1, /home/felipe/intelFPGA_lite/17.0/quartus/libraries/megafunctions/a_rdenreg.inc
|
105 |
|
|
source_file = 1, /home/felipe/intelFPGA_lite/17.0/quartus/libraries/megafunctions/altrom.inc
|
106 |
|
|
source_file = 1, /home/felipe/intelFPGA_lite/17.0/quartus/libraries/megafunctions/altram.inc
|
107 |
|
|
source_file = 1, /home/felipe/intelFPGA_lite/17.0/quartus/libraries/megafunctions/altdpram.inc
|
108 |
|
|
source_file = 1, /home/felipe/Documentos/verilog_projects/GITHUBPROJECTS/SPACEWIRESYSTEMC/altera_work/spw_fifo_ulight/db/altsyncram_pfo1.tdf
|
109 |
|
|
design_name = SPW_ULIGHT_FIFO
|
110 |
|
|
instance = comp, \LED[5]~output , LED[5]~output, SPW_ULIGHT_FIFO, 1
|
111 |
|
|
instance = comp, \LED[7]~output , LED[7]~output, SPW_ULIGHT_FIFO, 1
|
112 |
|
|
instance = comp, \dout_a~output , dout_a~output, SPW_ULIGHT_FIFO, 1
|
113 |
|
|
instance = comp, \sout_a~output , sout_a~output, SPW_ULIGHT_FIFO, 1
|
114 |
|
|
instance = comp, \LED[0]~output , LED[0]~output, SPW_ULIGHT_FIFO, 1
|
115 |
|
|
instance = comp, \LED[1]~output , LED[1]~output, SPW_ULIGHT_FIFO, 1
|
116 |
|
|
instance = comp, \LED[2]~output , LED[2]~output, SPW_ULIGHT_FIFO, 1
|
117 |
|
|
instance = comp, \LED[3]~output , LED[3]~output, SPW_ULIGHT_FIFO, 1
|
118 |
|
|
instance = comp, \LED[4]~output , LED[4]~output, SPW_ULIGHT_FIFO, 1
|
119 |
|
|
instance = comp, \LED[6]~output , LED[6]~output, SPW_ULIGHT_FIFO, 1
|
120 |
|
|
instance = comp, \FPGA_CLK1_50~input , FPGA_CLK1_50~input, SPW_ULIGHT_FIFO, 1
|
121 |
|
|
instance = comp, \FPGA_CLK1_50~inputCLKENA0 , FPGA_CLK1_50~inputCLKENA0, SPW_ULIGHT_FIFO, 1
|
122 |
|
|
instance = comp, \KEY[1]~input , KEY[1]~input, SPW_ULIGHT_FIFO, 1
|
123 |
|
|
instance = comp, \db_system_spwulight_b|PB_down~0 , db_system_spwulight_b|PB_down~0, SPW_ULIGHT_FIFO, 1
|
124 |
|
|
instance = comp, \db_system_spwulight_b|Add0~61 , db_system_spwulight_b|Add0~61, SPW_ULIGHT_FIFO, 1
|
125 |
|
|
instance = comp, \db_system_spwulight_b|counter~16 , db_system_spwulight_b|counter~16, SPW_ULIGHT_FIFO, 1
|
126 |
|
|
instance = comp, \db_system_spwulight_b|LessThan0~0 , db_system_spwulight_b|LessThan0~0, SPW_ULIGHT_FIFO, 1
|
127 |
|
|
instance = comp, \db_system_spwulight_b|LessThan0~1 , db_system_spwulight_b|LessThan0~1, SPW_ULIGHT_FIFO, 1
|
128 |
|
|
instance = comp, \db_system_spwulight_b|counter[0]~1 , db_system_spwulight_b|counter[0]~1, SPW_ULIGHT_FIFO, 1
|
129 |
|
|
instance = comp, \db_system_spwulight_b|counter[0] , db_system_spwulight_b|counter[0], SPW_ULIGHT_FIFO, 1
|
130 |
|
|
instance = comp, \db_system_spwulight_b|Add0~57 , db_system_spwulight_b|Add0~57, SPW_ULIGHT_FIFO, 1
|
131 |
|
|
instance = comp, \db_system_spwulight_b|counter~15 , db_system_spwulight_b|counter~15, SPW_ULIGHT_FIFO, 1
|
132 |
|
|
instance = comp, \db_system_spwulight_b|counter[1] , db_system_spwulight_b|counter[1], SPW_ULIGHT_FIFO, 1
|
133 |
|
|
instance = comp, \db_system_spwulight_b|Add0~53 , db_system_spwulight_b|Add0~53, SPW_ULIGHT_FIFO, 1
|
134 |
|
|
instance = comp, \db_system_spwulight_b|counter~14 , db_system_spwulight_b|counter~14, SPW_ULIGHT_FIFO, 1
|
135 |
|
|
instance = comp, \db_system_spwulight_b|counter[2] , db_system_spwulight_b|counter[2], SPW_ULIGHT_FIFO, 1
|
136 |
|
|
instance = comp, \db_system_spwulight_b|Add0~49 , db_system_spwulight_b|Add0~49, SPW_ULIGHT_FIFO, 1
|
137 |
|
|
instance = comp, \db_system_spwulight_b|counter~13 , db_system_spwulight_b|counter~13, SPW_ULIGHT_FIFO, 1
|
138 |
|
|
instance = comp, \db_system_spwulight_b|counter[3] , db_system_spwulight_b|counter[3], SPW_ULIGHT_FIFO, 1
|
139 |
|
|
instance = comp, \db_system_spwulight_b|Add0~37 , db_system_spwulight_b|Add0~37, SPW_ULIGHT_FIFO, 1
|
140 |
|
|
instance = comp, \db_system_spwulight_b|counter~10 , db_system_spwulight_b|counter~10, SPW_ULIGHT_FIFO, 1
|
141 |
|
|
instance = comp, \db_system_spwulight_b|counter[4] , db_system_spwulight_b|counter[4], SPW_ULIGHT_FIFO, 1
|
142 |
|
|
instance = comp, \db_system_spwulight_b|Add0~41 , db_system_spwulight_b|Add0~41, SPW_ULIGHT_FIFO, 1
|
143 |
|
|
instance = comp, \db_system_spwulight_b|counter~11 , db_system_spwulight_b|counter~11, SPW_ULIGHT_FIFO, 1
|
144 |
|
|
instance = comp, \db_system_spwulight_b|counter[5] , db_system_spwulight_b|counter[5], SPW_ULIGHT_FIFO, 1
|
145 |
|
|
instance = comp, \db_system_spwulight_b|Add0~45 , db_system_spwulight_b|Add0~45, SPW_ULIGHT_FIFO, 1
|
146 |
|
|
instance = comp, \db_system_spwulight_b|counter~12 , db_system_spwulight_b|counter~12, SPW_ULIGHT_FIFO, 1
|
147 |
|
|
instance = comp, \db_system_spwulight_b|counter[6] , db_system_spwulight_b|counter[6], SPW_ULIGHT_FIFO, 1
|
148 |
|
|
instance = comp, \db_system_spwulight_b|Add0~29 , db_system_spwulight_b|Add0~29, SPW_ULIGHT_FIFO, 1
|
149 |
|
|
instance = comp, \db_system_spwulight_b|counter~8 , db_system_spwulight_b|counter~8, SPW_ULIGHT_FIFO, 1
|
150 |
|
|
instance = comp, \db_system_spwulight_b|counter[7] , db_system_spwulight_b|counter[7], SPW_ULIGHT_FIFO, 1
|
151 |
|
|
instance = comp, \db_system_spwulight_b|Add0~33 , db_system_spwulight_b|Add0~33, SPW_ULIGHT_FIFO, 1
|
152 |
|
|
instance = comp, \db_system_spwulight_b|counter~9 , db_system_spwulight_b|counter~9, SPW_ULIGHT_FIFO, 1
|
153 |
|
|
instance = comp, \db_system_spwulight_b|counter[8] , db_system_spwulight_b|counter[8], SPW_ULIGHT_FIFO, 1
|
154 |
|
|
instance = comp, \db_system_spwulight_b|Add0~9 , db_system_spwulight_b|Add0~9, SPW_ULIGHT_FIFO, 1
|
155 |
|
|
instance = comp, \db_system_spwulight_b|counter~3 , db_system_spwulight_b|counter~3, SPW_ULIGHT_FIFO, 1
|
156 |
|
|
instance = comp, \db_system_spwulight_b|counter[9] , db_system_spwulight_b|counter[9], SPW_ULIGHT_FIFO, 1
|
157 |
|
|
instance = comp, \db_system_spwulight_b|Add0~13 , db_system_spwulight_b|Add0~13, SPW_ULIGHT_FIFO, 1
|
158 |
|
|
instance = comp, \db_system_spwulight_b|counter~4 , db_system_spwulight_b|counter~4, SPW_ULIGHT_FIFO, 1
|
159 |
|
|
instance = comp, \db_system_spwulight_b|counter[10] , db_system_spwulight_b|counter[10], SPW_ULIGHT_FIFO, 1
|
160 |
|
|
instance = comp, \db_system_spwulight_b|Add0~17 , db_system_spwulight_b|Add0~17, SPW_ULIGHT_FIFO, 1
|
161 |
|
|
instance = comp, \db_system_spwulight_b|counter~5 , db_system_spwulight_b|counter~5, SPW_ULIGHT_FIFO, 1
|
162 |
|
|
instance = comp, \db_system_spwulight_b|counter[11] , db_system_spwulight_b|counter[11], SPW_ULIGHT_FIFO, 1
|
163 |
|
|
instance = comp, \db_system_spwulight_b|Add0~21 , db_system_spwulight_b|Add0~21, SPW_ULIGHT_FIFO, 1
|
164 |
|
|
instance = comp, \db_system_spwulight_b|counter~6 , db_system_spwulight_b|counter~6, SPW_ULIGHT_FIFO, 1
|
165 |
|
|
instance = comp, \db_system_spwulight_b|counter[12] , db_system_spwulight_b|counter[12], SPW_ULIGHT_FIFO, 1
|
166 |
|
|
instance = comp, \db_system_spwulight_b|Add0~25 , db_system_spwulight_b|Add0~25, SPW_ULIGHT_FIFO, 1
|
167 |
|
|
instance = comp, \db_system_spwulight_b|counter~7 , db_system_spwulight_b|counter~7, SPW_ULIGHT_FIFO, 1
|
168 |
|
|
instance = comp, \db_system_spwulight_b|counter[13] , db_system_spwulight_b|counter[13], SPW_ULIGHT_FIFO, 1
|
169 |
|
|
instance = comp, \db_system_spwulight_b|Add0~1 , db_system_spwulight_b|Add0~1, SPW_ULIGHT_FIFO, 1
|
170 |
|
|
instance = comp, \db_system_spwulight_b|counter~0 , db_system_spwulight_b|counter~0, SPW_ULIGHT_FIFO, 1
|
171 |
|
|
instance = comp, \db_system_spwulight_b|counter[14] , db_system_spwulight_b|counter[14], SPW_ULIGHT_FIFO, 1
|
172 |
|
|
instance = comp, \db_system_spwulight_b|Add0~5 , db_system_spwulight_b|Add0~5, SPW_ULIGHT_FIFO, 1
|
173 |
|
|
instance = comp, \db_system_spwulight_b|counter~2 , db_system_spwulight_b|counter~2, SPW_ULIGHT_FIFO, 1
|
174 |
|
|
instance = comp, \db_system_spwulight_b|counter[15] , db_system_spwulight_b|counter[15], SPW_ULIGHT_FIFO, 1
|
175 |
|
|
instance = comp, \db_system_spwulight_b|aux_pb~0 , db_system_spwulight_b|aux_pb~0, SPW_ULIGHT_FIFO, 1
|
176 |
|
|
instance = comp, \db_system_spwulight_b|PB_down , db_system_spwulight_b|PB_down, SPW_ULIGHT_FIFO, 1
|
177 |
|
|
instance = comp, \u0|pll_0|altera_pll_i|cyclonev_pll|fpll_0|REFCLK_SELECT , u0|pll_0|altera_pll_i|cyclonev_pll|fpll_0|REFCLK_SELECT, SPW_ULIGHT_FIFO, 1
|
178 |
|
|
instance = comp, \db_system_spwulight_b|aux_pb~1 , db_system_spwulight_b|aux_pb~1, SPW_ULIGHT_FIFO, 1
|
179 |
|
|
instance = comp, \db_system_spwulight_b|aux_pb , db_system_spwulight_b|aux_pb, SPW_ULIGHT_FIFO, 1
|
180 |
|
|
instance = comp, \u0|pll_0|altera_pll_i|cyclonev_pll|fpll_0|fpll , u0|pll_0|altera_pll_i|cyclonev_pll|fpll_0|fpll, SPW_ULIGHT_FIFO, 1
|
181 |
|
|
instance = comp, \u0|pll_0|altera_pll_i|cyclonev_pll|fpll_0|PLL_RECONFIG , u0|pll_0|altera_pll_i|cyclonev_pll|fpll_0|PLL_RECONFIG, SPW_ULIGHT_FIFO, 1
|
182 |
|
|
instance = comp, \u0|pll_0|altera_pll_i|cyclonev_pll|counter[0].output_counter , u0|pll_0|altera_pll_i|cyclonev_pll|counter[0].output_counter, SPW_ULIGHT_FIFO, 1
|
183 |
|
|
instance = comp, \u0|pll_0|altera_pll_i|cyclonev_pll|divclk[0]~CLKENA0 , u0|pll_0|altera_pll_i|cyclonev_pll|divclk[0]~CLKENA0, SPW_ULIGHT_FIFO, 1
|
184 |
|
|
instance = comp, \u0|rst_controller|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[1]~feeder , u0|rst_controller|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[1]~feeder, SPW_ULIGHT_FIFO, 1
|
185 |
|
|
instance = comp, \u0|rst_controller|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[1] , u0|rst_controller|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[1], SPW_ULIGHT_FIFO, 1
|
186 |
|
|
instance = comp, \u0|rst_controller|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[0] , u0|rst_controller|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[0], SPW_ULIGHT_FIFO, 1
|
187 |
|
|
instance = comp, \u0|rst_controller|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out , u0|rst_controller|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out, SPW_ULIGHT_FIFO, 1
|
188 |
|
|
instance = comp, \u0|rst_controller|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~CLKENA0 , u0|rst_controller|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out~CLKENA0, SPW_ULIGHT_FIFO, 1
|
189 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][68] , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][68], SPW_ULIGHT_FIFO, 1
|
190 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_translator|waitrequest_reset_override~feeder , u0|mm_interconnect_0|timecode_tx_data_s1_translator|waitrequest_reset_override~feeder, SPW_ULIGHT_FIFO, 1
|
191 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_translator|waitrequest_reset_override , u0|mm_interconnect_0|timecode_tx_data_s1_translator|waitrequest_reset_override, SPW_ULIGHT_FIFO, 1
|
192 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_014|arb|top_priority_reg[0]~2 , u0|mm_interconnect_0|cmd_mux_014|arb|top_priority_reg[0]~2, SPW_ULIGHT_FIFO, 1
|
193 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder, SPW_ULIGHT_FIFO, 1
|
194 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2] , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
195 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder, SPW_ULIGHT_FIFO, 1
|
196 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold, SPW_ULIGHT_FIFO, 1
|
197 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent|uncompressor|burst_uncompress_busy , u0|mm_interconnect_0|link_disable_s1_agent|uncompressor|burst_uncompress_busy, SPW_ULIGHT_FIFO, 1
|
198 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent|uncompressor|last_packet_beat~2 , u0|mm_interconnect_0|link_disable_s1_agent|uncompressor|last_packet_beat~2, SPW_ULIGHT_FIFO, 1
|
199 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_translator|waitrequest_reset_override~feeder , u0|mm_interconnect_0|link_disable_s1_translator|waitrequest_reset_override~feeder, SPW_ULIGHT_FIFO, 1
|
200 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_translator|waitrequest_reset_override , u0|mm_interconnect_0|link_disable_s1_translator|waitrequest_reset_override, SPW_ULIGHT_FIFO, 1
|
201 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|pending_response_count[0]~1 , u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|pending_response_count[0]~1, SPW_ULIGHT_FIFO, 1
|
202 |
|
|
instance = comp, \u0|rst_controller_001|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[1]~feeder , u0|rst_controller_001|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[1]~feeder, SPW_ULIGHT_FIFO, 1
|
203 |
|
|
instance = comp, \u0|hps_0|fpga_interfaces|clocks_resets , u0|hps_0|fpga_interfaces|clocks_resets, SPW_ULIGHT_FIFO, 1
|
204 |
|
|
instance = comp, \u0|hps_0|fpga_interfaces|h2f_rst_n[0]~CLKENA0 , u0|hps_0|fpga_interfaces|h2f_rst_n[0]~CLKENA0, SPW_ULIGHT_FIFO, 1
|
205 |
|
|
instance = comp, \u0|rst_controller_001|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[1] , u0|rst_controller_001|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[1], SPW_ULIGHT_FIFO, 1
|
206 |
|
|
instance = comp, \u0|rst_controller_001|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[0] , u0|rst_controller_001|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[0], SPW_ULIGHT_FIFO, 1
|
207 |
|
|
instance = comp, \u0|rst_controller_001|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out , u0|rst_controller_001|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out, SPW_ULIGHT_FIFO, 1
|
208 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|response_sink_accepted , u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|response_sink_accepted, SPW_ULIGHT_FIFO, 1
|
209 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[1][66] , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[1][66], SPW_ULIGHT_FIFO, 1
|
210 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_translator|waitrequest_reset_override~feeder , u0|mm_interconnect_0|data_read_en_rx_s1_translator|waitrequest_reset_override~feeder, SPW_ULIGHT_FIFO, 1
|
211 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_translator|waitrequest_reset_override , u0|mm_interconnect_0|data_read_en_rx_s1_translator|waitrequest_reset_override, SPW_ULIGHT_FIFO, 1
|
212 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_004|arb|top_priority_reg[0]~2 , u0|mm_interconnect_0|cmd_mux_004|arb|top_priority_reg[0]~2, SPW_ULIGHT_FIFO, 1
|
213 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_demux_011|WideOr0~0 , u0|mm_interconnect_0|rsp_demux_011|WideOr0~0, SPW_ULIGHT_FIFO, 1
|
214 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|always0~0 , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|always0~0, SPW_ULIGHT_FIFO, 1
|
215 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[1][113] , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[1][113], SPW_ULIGHT_FIFO, 1
|
216 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][114] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][114], SPW_ULIGHT_FIFO, 1
|
217 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_translator|waitrequest_reset_override~feeder , u0|mm_interconnect_0|write_data_fifo_tx_s1_translator|waitrequest_reset_override~feeder, SPW_ULIGHT_FIFO, 1
|
218 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_translator|waitrequest_reset_override , u0|mm_interconnect_0|write_data_fifo_tx_s1_translator|waitrequest_reset_override, SPW_ULIGHT_FIFO, 1
|
219 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|sop_enable~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|sop_enable~0, SPW_ULIGHT_FIFO, 1
|
220 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|sop_enable , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|sop_enable, SPW_ULIGHT_FIFO, 1
|
221 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][68] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][68], SPW_ULIGHT_FIFO, 1
|
222 |
|
|
instance = comp, \u0|mm_interconnect_0|router_001|Equal7~0 , u0|mm_interconnect_0|router_001|Equal7~0, SPW_ULIGHT_FIFO, 1
|
223 |
|
|
instance = comp, \u0|mm_interconnect_0|router_001|Equal10~0 , u0|mm_interconnect_0|router_001|Equal10~0, SPW_ULIGHT_FIFO, 1
|
224 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[20] , u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[20], SPW_ULIGHT_FIFO, 1
|
225 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_020|last_cycle~0 , u0|mm_interconnect_0|cmd_mux_020|last_cycle~0, SPW_ULIGHT_FIFO, 1
|
226 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder, SPW_ULIGHT_FIFO, 1
|
227 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_translator|waitrequest_reset_override~feeder , u0|mm_interconnect_0|counter_tx_fifo_s1_translator|waitrequest_reset_override~feeder, SPW_ULIGHT_FIFO, 1
|
228 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_translator|waitrequest_reset_override , u0|mm_interconnect_0|counter_tx_fifo_s1_translator|waitrequest_reset_override, SPW_ULIGHT_FIFO, 1
|
229 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder, SPW_ULIGHT_FIFO, 1
|
230 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold, SPW_ULIGHT_FIFO, 1
|
231 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_translator|wait_latency_counter~0 , u0|mm_interconnect_0|counter_tx_fifo_s1_translator|wait_latency_counter~0, SPW_ULIGHT_FIFO, 1
|
232 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_translator|wait_latency_counter[1] , u0|mm_interconnect_0|counter_tx_fifo_s1_translator|wait_latency_counter[1], SPW_ULIGHT_FIFO, 1
|
233 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_translator|read_latency_shift_reg~1 , u0|mm_interconnect_0|counter_tx_fifo_s1_translator|read_latency_shift_reg~1, SPW_ULIGHT_FIFO, 1
|
234 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_translator|read_latency_shift_reg[0] , u0|mm_interconnect_0|counter_tx_fifo_s1_translator|read_latency_shift_reg[0], SPW_ULIGHT_FIFO, 1
|
235 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|write~0 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|write~0, SPW_ULIGHT_FIFO, 1
|
236 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem_used[0]~1 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem_used[0]~1, SPW_ULIGHT_FIFO, 1
|
237 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem_used[0] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem_used[0], SPW_ULIGHT_FIFO, 1
|
238 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rdata_fifo|read~0 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rdata_fifo|read~0, SPW_ULIGHT_FIFO, 1
|
239 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rdata_fifo|mem_used[1]~1 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rdata_fifo|mem_used[1]~1, SPW_ULIGHT_FIFO, 1
|
240 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rdata_fifo|mem_used[1] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rdata_fifo|mem_used[1], SPW_ULIGHT_FIFO, 1
|
241 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rdata_fifo|mem_used[0]~0 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rdata_fifo|mem_used[0]~0, SPW_ULIGHT_FIFO, 1
|
242 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rdata_fifo|mem_used[0] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rdata_fifo|mem_used[0], SPW_ULIGHT_FIFO, 1
|
243 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|comb~0 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|comb~0, SPW_ULIGHT_FIFO, 1
|
244 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|always0~0 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|always0~0, SPW_ULIGHT_FIFO, 1
|
245 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_busy , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_busy, SPW_ULIGHT_FIFO, 1
|
246 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|last_packet_beat~2 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|last_packet_beat~2, SPW_ULIGHT_FIFO, 1
|
247 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4] , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4], SPW_ULIGHT_FIFO, 1
|
248 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0 , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0, SPW_ULIGHT_FIFO, 1
|
249 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~3 , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~3, SPW_ULIGHT_FIFO, 1
|
250 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0 , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0, SPW_ULIGHT_FIFO, 1
|
251 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~2 , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~2, SPW_ULIGHT_FIFO, 1
|
252 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5] , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5], SPW_ULIGHT_FIFO, 1
|
253 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6] , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6], SPW_ULIGHT_FIFO, 1
|
254 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~1 , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~1, SPW_ULIGHT_FIFO, 1
|
255 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor1 , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor1, SPW_ULIGHT_FIFO, 1
|
256 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10 , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10, SPW_ULIGHT_FIFO, 1
|
257 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST, SPW_ULIGHT_FIFO, 1
|
258 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9 , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9, SPW_ULIGHT_FIFO, 1
|
259 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS, SPW_ULIGHT_FIFO, 1
|
260 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~5 , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~5, SPW_ULIGHT_FIFO, 1
|
261 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2] , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
262 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~4 , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~4, SPW_ULIGHT_FIFO, 1
|
263 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3] , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3], SPW_ULIGHT_FIFO, 1
|
264 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[1][75] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[1][75], SPW_ULIGHT_FIFO, 1
|
265 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem~6 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem~6, SPW_ULIGHT_FIFO, 1
|
266 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|always0~0 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|always0~0, SPW_ULIGHT_FIFO, 1
|
267 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[0][75] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[0][75], SPW_ULIGHT_FIFO, 1
|
268 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[1][74] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[1][74], SPW_ULIGHT_FIFO, 1
|
269 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem~7 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem~7, SPW_ULIGHT_FIFO, 1
|
270 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[0][74] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[0][74], SPW_ULIGHT_FIFO, 1
|
271 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~1 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~1, SPW_ULIGHT_FIFO, 1
|
272 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[3] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[3], SPW_ULIGHT_FIFO, 1
|
273 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|Add0~0 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|Add0~0, SPW_ULIGHT_FIFO, 1
|
274 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[1][76] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[1][76], SPW_ULIGHT_FIFO, 1
|
275 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem~5 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem~5, SPW_ULIGHT_FIFO, 1
|
276 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[0][76] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[0][76], SPW_ULIGHT_FIFO, 1
|
277 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~2 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~2, SPW_ULIGHT_FIFO, 1
|
278 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[4] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[4], SPW_ULIGHT_FIFO, 1
|
279 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|Add0~1 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|Add0~1, SPW_ULIGHT_FIFO, 1
|
280 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[1][77] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[1][77], SPW_ULIGHT_FIFO, 1
|
281 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem~4 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem~4, SPW_ULIGHT_FIFO, 1
|
282 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[0][77] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[0][77], SPW_ULIGHT_FIFO, 1
|
283 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|Add1~0 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|Add1~0, SPW_ULIGHT_FIFO, 1
|
284 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[1][78] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[1][78], SPW_ULIGHT_FIFO, 1
|
285 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem~3 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem~3, SPW_ULIGHT_FIFO, 1
|
286 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[0][78] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[0][78], SPW_ULIGHT_FIFO, 1
|
287 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~3 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~3, SPW_ULIGHT_FIFO, 1
|
288 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[6] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[6], SPW_ULIGHT_FIFO, 1
|
289 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~6 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~6, SPW_ULIGHT_FIFO, 1
|
290 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[7] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[7], SPW_ULIGHT_FIFO, 1
|
291 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~0 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~0, SPW_ULIGHT_FIFO, 1
|
292 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~5 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~5, SPW_ULIGHT_FIFO, 1
|
293 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[2] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[2], SPW_ULIGHT_FIFO, 1
|
294 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|Add0~2 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|Add0~2, SPW_ULIGHT_FIFO, 1
|
295 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|Add1~1 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|Add1~1, SPW_ULIGHT_FIFO, 1
|
296 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~4 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~4, SPW_ULIGHT_FIFO, 1
|
297 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[5] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[5], SPW_ULIGHT_FIFO, 1
|
298 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|last_packet_beat~1 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|last_packet_beat~1, SPW_ULIGHT_FIFO, 1
|
299 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd, SPW_ULIGHT_FIFO, 1
|
300 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66] , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66], SPW_ULIGHT_FIFO, 1
|
301 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[1][66] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[1][66], SPW_ULIGHT_FIFO, 1
|
302 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem~2 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem~2, SPW_ULIGHT_FIFO, 1
|
303 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[0][66] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[0][66], SPW_ULIGHT_FIFO, 1
|
304 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|last_packet_beat~0 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|last_packet_beat~0, SPW_ULIGHT_FIFO, 1
|
305 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|last_packet_beat , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|uncompressor|last_packet_beat, SPW_ULIGHT_FIFO, 1
|
306 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem_used[1]~0 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem_used[1]~0, SPW_ULIGHT_FIFO, 1
|
307 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem_used[1] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem_used[1], SPW_ULIGHT_FIFO, 1
|
308 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11 , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11, SPW_ULIGHT_FIFO, 1
|
309 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE, SPW_ULIGHT_FIFO, 1
|
310 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~1 , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~1, SPW_ULIGHT_FIFO, 1
|
311 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg, SPW_ULIGHT_FIFO, 1
|
312 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0 , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0, SPW_ULIGHT_FIFO, 1
|
313 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0] , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0], SPW_ULIGHT_FIFO, 1
|
314 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2] , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2], SPW_ULIGHT_FIFO, 1
|
315 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3] , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3], SPW_ULIGHT_FIFO, 1
|
316 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent|cp_ready~1 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent|cp_ready~1, SPW_ULIGHT_FIFO, 1
|
317 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|burst_uncompress_busy , u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|burst_uncompress_busy, SPW_ULIGHT_FIFO, 1
|
318 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder, SPW_ULIGHT_FIFO, 1
|
319 |
|
|
instance = comp, \u0|mm_interconnect_0|router_001|Equal1~3 , u0|mm_interconnect_0|router_001|Equal1~3, SPW_ULIGHT_FIFO, 1
|
320 |
|
|
instance = comp, \u0|mm_interconnect_0|router_001|Equal2~1 , u0|mm_interconnect_0|router_001|Equal2~1, SPW_ULIGHT_FIFO, 1
|
321 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux_001|src0_valid~0 , u0|mm_interconnect_0|cmd_demux_001|src0_valid~0, SPW_ULIGHT_FIFO, 1
|
322 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[0] , u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[0], SPW_ULIGHT_FIFO, 1
|
323 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux_001|src0_valid~1 , u0|mm_interconnect_0|cmd_demux_001|src0_valid~1, SPW_ULIGHT_FIFO, 1
|
324 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_translator|read_latency_shift_reg~1 , u0|mm_interconnect_0|timecode_tx_data_s1_translator|read_latency_shift_reg~1, SPW_ULIGHT_FIFO, 1
|
325 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_translator|read_latency_shift_reg[0] , u0|mm_interconnect_0|timecode_tx_data_s1_translator|read_latency_shift_reg[0], SPW_ULIGHT_FIFO, 1
|
326 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_translator|waitrequest_reset_override~feeder , u0|mm_interconnect_0|counter_rx_fifo_s1_translator|waitrequest_reset_override~feeder, SPW_ULIGHT_FIFO, 1
|
327 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_translator|waitrequest_reset_override , u0|mm_interconnect_0|counter_rx_fifo_s1_translator|waitrequest_reset_override, SPW_ULIGHT_FIFO, 1
|
328 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|cp_ready~0 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|cp_ready~0, SPW_ULIGHT_FIFO, 1
|
329 |
|
|
instance = comp, \u0|mm_interconnect_0|router_001|Equal12~0 , u0|mm_interconnect_0|router_001|Equal12~0, SPW_ULIGHT_FIFO, 1
|
330 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[21] , u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[21], SPW_ULIGHT_FIFO, 1
|
331 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_021|last_cycle~0 , u0|mm_interconnect_0|cmd_mux_021|last_cycle~0, SPW_ULIGHT_FIFO, 1
|
332 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder, SPW_ULIGHT_FIFO, 1
|
333 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2] , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
334 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~1 , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~1, SPW_ULIGHT_FIFO, 1
|
335 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2] , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2], SPW_ULIGHT_FIFO, 1
|
336 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3] , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3], SPW_ULIGHT_FIFO, 1
|
337 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~2 , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~2, SPW_ULIGHT_FIFO, 1
|
338 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[1][69] , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[1][69], SPW_ULIGHT_FIFO, 1
|
339 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem~1 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem~1, SPW_ULIGHT_FIFO, 1
|
340 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_demux_010|WideOr0~0 , u0|mm_interconnect_0|rsp_demux_010|WideOr0~0, SPW_ULIGHT_FIFO, 1
|
341 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_rx_s1_translator|waitrequest_reset_override~feeder , u0|mm_interconnect_0|timecode_rx_s1_translator|waitrequest_reset_override~feeder, SPW_ULIGHT_FIFO, 1
|
342 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_rx_s1_translator|waitrequest_reset_override , u0|mm_interconnect_0|timecode_rx_s1_translator|waitrequest_reset_override, SPW_ULIGHT_FIFO, 1
|
343 |
|
|
instance = comp, \u0|mm_interconnect_0|router_001|Equal1~4 , u0|mm_interconnect_0|router_001|Equal1~4, SPW_ULIGHT_FIFO, 1
|
344 |
|
|
instance = comp, \u0|mm_interconnect_0|router_001|Equal1~5 , u0|mm_interconnect_0|router_001|Equal1~5, SPW_ULIGHT_FIFO, 1
|
345 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[1] , u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[1], SPW_ULIGHT_FIFO, 1
|
346 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_001|last_cycle~0 , u0|mm_interconnect_0|cmd_mux_001|last_cycle~0, SPW_ULIGHT_FIFO, 1
|
347 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder , u0|mm_interconnect_0|timecode_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder, SPW_ULIGHT_FIFO, 1
|
348 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold , u0|mm_interconnect_0|timecode_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold, SPW_ULIGHT_FIFO, 1
|
349 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder , u0|mm_interconnect_0|timecode_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder, SPW_ULIGHT_FIFO, 1
|
350 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd , u0|mm_interconnect_0|timecode_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd, SPW_ULIGHT_FIFO, 1
|
351 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2] , u0|mm_interconnect_0|timecode_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2], SPW_ULIGHT_FIFO, 1
|
352 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder, SPW_ULIGHT_FIFO, 1
|
353 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder, SPW_ULIGHT_FIFO, 1
|
354 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold, SPW_ULIGHT_FIFO, 1
|
355 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_translator|waitrequest_reset_override~feeder , u0|mm_interconnect_0|data_info_s1_translator|waitrequest_reset_override~feeder, SPW_ULIGHT_FIFO, 1
|
356 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_translator|waitrequest_reset_override , u0|mm_interconnect_0|data_info_s1_translator|waitrequest_reset_override, SPW_ULIGHT_FIFO, 1
|
357 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_translator|wait_latency_counter~1 , u0|mm_interconnect_0|data_info_s1_translator|wait_latency_counter~1, SPW_ULIGHT_FIFO, 1
|
358 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_translator|wait_latency_counter[0] , u0|mm_interconnect_0|data_info_s1_translator|wait_latency_counter[0], SPW_ULIGHT_FIFO, 1
|
359 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_translator|wait_latency_counter~0 , u0|mm_interconnect_0|data_info_s1_translator|wait_latency_counter~0, SPW_ULIGHT_FIFO, 1
|
360 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_translator|wait_latency_counter[1] , u0|mm_interconnect_0|data_info_s1_translator|wait_latency_counter[1], SPW_ULIGHT_FIFO, 1
|
361 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent|cp_ready~0 , u0|mm_interconnect_0|data_info_s1_agent|cp_ready~0, SPW_ULIGHT_FIFO, 1
|
362 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero~0 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero~0, SPW_ULIGHT_FIFO, 1
|
363 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero, SPW_ULIGHT_FIFO, 1
|
364 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0, SPW_ULIGHT_FIFO, 1
|
365 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg, SPW_ULIGHT_FIFO, 1
|
366 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1] , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1], SPW_ULIGHT_FIFO, 1
|
367 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0] , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0], SPW_ULIGHT_FIFO, 1
|
368 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2] , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2], SPW_ULIGHT_FIFO, 1
|
369 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent|cp_ready~2 , u0|mm_interconnect_0|data_info_s1_agent|cp_ready~2, SPW_ULIGHT_FIFO, 1
|
370 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1, SPW_ULIGHT_FIFO, 1
|
371 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11, SPW_ULIGHT_FIFO, 1
|
372 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE, SPW_ULIGHT_FIFO, 1
|
373 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3] , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3], SPW_ULIGHT_FIFO, 1
|
374 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent|cp_ready~1 , u0|mm_interconnect_0|data_info_s1_agent|cp_ready~1, SPW_ULIGHT_FIFO, 1
|
375 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_valid~0 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_valid~0, SPW_ULIGHT_FIFO, 1
|
376 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_valid_reg , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_valid_reg, SPW_ULIGHT_FIFO, 1
|
377 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0, SPW_ULIGHT_FIFO, 1
|
378 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~5 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~5, SPW_ULIGHT_FIFO, 1
|
379 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2] , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
380 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~4 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~4, SPW_ULIGHT_FIFO, 1
|
381 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~3 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~3, SPW_ULIGHT_FIFO, 1
|
382 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4] , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4], SPW_ULIGHT_FIFO, 1
|
383 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0, SPW_ULIGHT_FIFO, 1
|
384 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~2 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~2, SPW_ULIGHT_FIFO, 1
|
385 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5] , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5], SPW_ULIGHT_FIFO, 1
|
386 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6] , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6], SPW_ULIGHT_FIFO, 1
|
387 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~1 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~1, SPW_ULIGHT_FIFO, 1
|
388 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor1 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor1, SPW_ULIGHT_FIFO, 1
|
389 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9, SPW_ULIGHT_FIFO, 1
|
390 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS, SPW_ULIGHT_FIFO, 1
|
391 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg, SPW_ULIGHT_FIFO, 1
|
392 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0, SPW_ULIGHT_FIFO, 1
|
393 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2, SPW_ULIGHT_FIFO, 1
|
394 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~8 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~8, SPW_ULIGHT_FIFO, 1
|
395 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_COMP_TRANS , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_COMP_TRANS, SPW_ULIGHT_FIFO, 1
|
396 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0, SPW_ULIGHT_FIFO, 1
|
397 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10, SPW_ULIGHT_FIFO, 1
|
398 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST, SPW_ULIGHT_FIFO, 1
|
399 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0, SPW_ULIGHT_FIFO, 1
|
400 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd, SPW_ULIGHT_FIFO, 1
|
401 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69] , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69], SPW_ULIGHT_FIFO, 1
|
402 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66] , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66], SPW_ULIGHT_FIFO, 1
|
403 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|mem~0 , u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|mem~0, SPW_ULIGHT_FIFO, 1
|
404 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|write~0 , u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|write~0, SPW_ULIGHT_FIFO, 1
|
405 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|mem_used[1]~0 , u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|mem_used[1]~0, SPW_ULIGHT_FIFO, 1
|
406 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|mem_used[1] , u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|mem_used[1], SPW_ULIGHT_FIFO, 1
|
407 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|load_next_out_cmd , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|load_next_out_cmd, SPW_ULIGHT_FIFO, 1
|
408 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2] , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
409 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~4 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~4, SPW_ULIGHT_FIFO, 1
|
410 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2] , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2], SPW_ULIGHT_FIFO, 1
|
411 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~3 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~3, SPW_ULIGHT_FIFO, 1
|
412 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3] , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3], SPW_ULIGHT_FIFO, 1
|
413 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1, SPW_ULIGHT_FIFO, 1
|
414 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~2 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~2, SPW_ULIGHT_FIFO, 1
|
415 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4] , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4], SPW_ULIGHT_FIFO, 1
|
416 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0, SPW_ULIGHT_FIFO, 1
|
417 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~1 , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~1, SPW_ULIGHT_FIFO, 1
|
418 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5] , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5], SPW_ULIGHT_FIFO, 1
|
419 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6] , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6], SPW_ULIGHT_FIFO, 1
|
420 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|Add1~9 , R_400_to_2_5_10_100_200_300MHZ|Add1~9, SPW_ULIGHT_FIFO, 1
|
421 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|Add1~1 , R_400_to_2_5_10_100_200_300MHZ|Add1~1, SPW_ULIGHT_FIFO, 1
|
422 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100~1 , R_400_to_2_5_10_100_200_300MHZ|counter_100~1, SPW_ULIGHT_FIFO, 1
|
423 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100[1] , R_400_to_2_5_10_100_200_300MHZ|counter_100[1], SPW_ULIGHT_FIFO, 1
|
424 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|Add1~5 , R_400_to_2_5_10_100_200_300MHZ|Add1~5, SPW_ULIGHT_FIFO, 1
|
425 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100~2 , R_400_to_2_5_10_100_200_300MHZ|counter_100~2, SPW_ULIGHT_FIFO, 1
|
426 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100[2] , R_400_to_2_5_10_100_200_300MHZ|counter_100[2], SPW_ULIGHT_FIFO, 1
|
427 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|Add1~13 , R_400_to_2_5_10_100_200_300MHZ|Add1~13, SPW_ULIGHT_FIFO, 1
|
428 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100~4 , R_400_to_2_5_10_100_200_300MHZ|counter_100~4, SPW_ULIGHT_FIFO, 1
|
429 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100[3] , R_400_to_2_5_10_100_200_300MHZ|counter_100[3], SPW_ULIGHT_FIFO, 1
|
430 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|Add1~17 , R_400_to_2_5_10_100_200_300MHZ|Add1~17, SPW_ULIGHT_FIFO, 1
|
431 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100~5 , R_400_to_2_5_10_100_200_300MHZ|counter_100~5, SPW_ULIGHT_FIFO, 1
|
432 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100[4] , R_400_to_2_5_10_100_200_300MHZ|counter_100[4], SPW_ULIGHT_FIFO, 1
|
433 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|Add1~21 , R_400_to_2_5_10_100_200_300MHZ|Add1~21, SPW_ULIGHT_FIFO, 1
|
434 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100~6 , R_400_to_2_5_10_100_200_300MHZ|counter_100~6, SPW_ULIGHT_FIFO, 1
|
435 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100[5] , R_400_to_2_5_10_100_200_300MHZ|counter_100[5], SPW_ULIGHT_FIFO, 1
|
436 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|Add1~25 , R_400_to_2_5_10_100_200_300MHZ|Add1~25, SPW_ULIGHT_FIFO, 1
|
437 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100~7 , R_400_to_2_5_10_100_200_300MHZ|counter_100~7, SPW_ULIGHT_FIFO, 1
|
438 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100[6] , R_400_to_2_5_10_100_200_300MHZ|counter_100[6], SPW_ULIGHT_FIFO, 1
|
439 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|Add1~29 , R_400_to_2_5_10_100_200_300MHZ|Add1~29, SPW_ULIGHT_FIFO, 1
|
440 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100~8 , R_400_to_2_5_10_100_200_300MHZ|counter_100~8, SPW_ULIGHT_FIFO, 1
|
441 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100[7] , R_400_to_2_5_10_100_200_300MHZ|counter_100[7], SPW_ULIGHT_FIFO, 1
|
442 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|Add1~33 , R_400_to_2_5_10_100_200_300MHZ|Add1~33, SPW_ULIGHT_FIFO, 1
|
443 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100~9 , R_400_to_2_5_10_100_200_300MHZ|counter_100~9, SPW_ULIGHT_FIFO, 1
|
444 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100[8] , R_400_to_2_5_10_100_200_300MHZ|counter_100[8], SPW_ULIGHT_FIFO, 1
|
445 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|LessThan16~0 , R_400_to_2_5_10_100_200_300MHZ|LessThan16~0, SPW_ULIGHT_FIFO, 1
|
446 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|Add1~37 , R_400_to_2_5_10_100_200_300MHZ|Add1~37, SPW_ULIGHT_FIFO, 1
|
447 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100~10 , R_400_to_2_5_10_100_200_300MHZ|counter_100~10, SPW_ULIGHT_FIFO, 1
|
448 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100[9] , R_400_to_2_5_10_100_200_300MHZ|counter_100[9], SPW_ULIGHT_FIFO, 1
|
449 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|Add1~41 , R_400_to_2_5_10_100_200_300MHZ|Add1~41, SPW_ULIGHT_FIFO, 1
|
450 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100~11 , R_400_to_2_5_10_100_200_300MHZ|counter_100~11, SPW_ULIGHT_FIFO, 1
|
451 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100[10] , R_400_to_2_5_10_100_200_300MHZ|counter_100[10], SPW_ULIGHT_FIFO, 1
|
452 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|LessThan16~1 , R_400_to_2_5_10_100_200_300MHZ|LessThan16~1, SPW_ULIGHT_FIFO, 1
|
453 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100[9]~0 , R_400_to_2_5_10_100_200_300MHZ|counter_100[9]~0, SPW_ULIGHT_FIFO, 1
|
454 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100~3 , R_400_to_2_5_10_100_200_300MHZ|counter_100~3, SPW_ULIGHT_FIFO, 1
|
455 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|counter_100[0] , R_400_to_2_5_10_100_200_300MHZ|counter_100[0], SPW_ULIGHT_FIFO, 1
|
456 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|clk_100_reduced_i~0 , R_400_to_2_5_10_100_200_300MHZ|clk_100_reduced_i~0, SPW_ULIGHT_FIFO, 1
|
457 |
|
|
instance = comp, \R_400_to_2_5_10_100_200_300MHZ|clk_100_reduced_i , R_400_to_2_5_10_100_200_300MHZ|clk_100_reduced_i, SPW_ULIGHT_FIFO, 1
|
458 |
|
|
instance = comp, \A_SPW_TOP|tx_data|mem~0feeder , A_SPW_TOP|tx_data|mem~0feeder, SPW_ULIGHT_FIFO, 1
|
459 |
|
|
instance = comp, \sin_a~input , sin_a~input, SPW_ULIGHT_FIFO, 1
|
460 |
|
|
instance = comp, \din_a~input , din_a~input, SPW_ULIGHT_FIFO, 1
|
461 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|got_bit_internal~0 , A_SPW_TOP|SPW|FSM|got_bit_internal~0, SPW_ULIGHT_FIFO, 1
|
462 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|got_bit_internal , A_SPW_TOP|SPW|FSM|got_bit_internal, SPW_ULIGHT_FIFO, 1
|
463 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add2~1 , A_SPW_TOP|SPW|FSM|Add2~1, SPW_ULIGHT_FIFO, 1
|
464 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add2~21 , A_SPW_TOP|SPW|FSM|Add2~21, SPW_ULIGHT_FIFO, 1
|
465 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add2~17 , A_SPW_TOP|SPW|FSM|Add2~17, SPW_ULIGHT_FIFO, 1
|
466 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns~4 , A_SPW_TOP|SPW|FSM|after850ns~4, SPW_ULIGHT_FIFO, 1
|
467 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns[3] , A_SPW_TOP|SPW|FSM|after850ns[3], SPW_ULIGHT_FIFO, 1
|
468 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add2~13 , A_SPW_TOP|SPW|FSM|Add2~13, SPW_ULIGHT_FIFO, 1
|
469 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns~3 , A_SPW_TOP|SPW|FSM|after850ns~3, SPW_ULIGHT_FIFO, 1
|
470 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns[4] , A_SPW_TOP|SPW|FSM|after850ns[4], SPW_ULIGHT_FIFO, 1
|
471 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add2~9 , A_SPW_TOP|SPW|FSM|Add2~9, SPW_ULIGHT_FIFO, 1
|
472 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add2~5 , A_SPW_TOP|SPW|FSM|Add2~5, SPW_ULIGHT_FIFO, 1
|
473 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add2~45 , A_SPW_TOP|SPW|FSM|Add2~45, SPW_ULIGHT_FIFO, 1
|
474 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns~11 , A_SPW_TOP|SPW|FSM|after850ns~11, SPW_ULIGHT_FIFO, 1
|
475 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns[7] , A_SPW_TOP|SPW|FSM|after850ns[7], SPW_ULIGHT_FIFO, 1
|
476 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add2~41 , A_SPW_TOP|SPW|FSM|Add2~41, SPW_ULIGHT_FIFO, 1
|
477 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns~10 , A_SPW_TOP|SPW|FSM|after850ns~10, SPW_ULIGHT_FIFO, 1
|
478 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns[8] , A_SPW_TOP|SPW|FSM|after850ns[8], SPW_ULIGHT_FIFO, 1
|
479 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add2~37 , A_SPW_TOP|SPW|FSM|Add2~37, SPW_ULIGHT_FIFO, 1
|
480 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|LessThan2~1 , A_SPW_TOP|SPW|FSM|LessThan2~1, SPW_ULIGHT_FIFO, 1
|
481 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns~9 , A_SPW_TOP|SPW|FSM|after850ns~9, SPW_ULIGHT_FIFO, 1
|
482 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns[9] , A_SPW_TOP|SPW|FSM|after850ns[9], SPW_ULIGHT_FIFO, 1
|
483 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add2~33 , A_SPW_TOP|SPW|FSM|Add2~33, SPW_ULIGHT_FIFO, 1
|
484 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns~8 , A_SPW_TOP|SPW|FSM|after850ns~8, SPW_ULIGHT_FIFO, 1
|
485 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns[10] , A_SPW_TOP|SPW|FSM|after850ns[10], SPW_ULIGHT_FIFO, 1
|
486 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add2~29 , A_SPW_TOP|SPW|FSM|Add2~29, SPW_ULIGHT_FIFO, 1
|
487 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns~7 , A_SPW_TOP|SPW|FSM|after850ns~7, SPW_ULIGHT_FIFO, 1
|
488 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns[11] , A_SPW_TOP|SPW|FSM|after850ns[11], SPW_ULIGHT_FIFO, 1
|
489 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Equal1~1 , A_SPW_TOP|SPW|FSM|Equal1~1, SPW_ULIGHT_FIFO, 1
|
490 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns~0 , A_SPW_TOP|SPW|FSM|after850ns~0, SPW_ULIGHT_FIFO, 1
|
491 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns[0] , A_SPW_TOP|SPW|FSM|after850ns[0], SPW_ULIGHT_FIFO, 1
|
492 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add2~25 , A_SPW_TOP|SPW|FSM|Add2~25, SPW_ULIGHT_FIFO, 1
|
493 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns~6 , A_SPW_TOP|SPW|FSM|after850ns~6, SPW_ULIGHT_FIFO, 1
|
494 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns[1] , A_SPW_TOP|SPW|FSM|after850ns[1], SPW_ULIGHT_FIFO, 1
|
495 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns~5 , A_SPW_TOP|SPW|FSM|after850ns~5, SPW_ULIGHT_FIFO, 1
|
496 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns[2] , A_SPW_TOP|SPW|FSM|after850ns[2], SPW_ULIGHT_FIFO, 1
|
497 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|LessThan2~0 , A_SPW_TOP|SPW|FSM|LessThan2~0, SPW_ULIGHT_FIFO, 1
|
498 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns~1 , A_SPW_TOP|SPW|FSM|after850ns~1, SPW_ULIGHT_FIFO, 1
|
499 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns[6] , A_SPW_TOP|SPW|FSM|after850ns[6], SPW_ULIGHT_FIFO, 1
|
500 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns~2 , A_SPW_TOP|SPW|FSM|after850ns~2, SPW_ULIGHT_FIFO, 1
|
501 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after850ns[5] , A_SPW_TOP|SPW|FSM|after850ns[5], SPW_ULIGHT_FIFO, 1
|
502 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Equal1~0 , A_SPW_TOP|SPW|FSM|Equal1~0, SPW_ULIGHT_FIFO, 1
|
503 |
|
|
instance = comp, \A_SPW_TOP|SPW|RX|always3~0 , A_SPW_TOP|SPW|RX|always3~0, SPW_ULIGHT_FIFO, 1
|
504 |
|
|
instance = comp, \A_SPW_TOP|SPW|RX|counter_neg[0]~feeder , A_SPW_TOP|SPW|RX|counter_neg[0]~feeder, SPW_ULIGHT_FIFO, 1
|
505 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add1~1 , A_SPW_TOP|SPW|FSM|Add1~1, SPW_ULIGHT_FIFO, 1
|
506 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add1~25 , A_SPW_TOP|SPW|FSM|Add1~25, SPW_ULIGHT_FIFO, 1
|
507 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Equal2~1 , A_SPW_TOP|SPW|FSM|Equal2~1, SPW_ULIGHT_FIFO, 1
|
508 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add1~21 , A_SPW_TOP|SPW|FSM|Add1~21, SPW_ULIGHT_FIFO, 1
|
509 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after64us~6 , A_SPW_TOP|SPW|FSM|after64us~6, SPW_ULIGHT_FIFO, 1
|
510 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after64us[2] , A_SPW_TOP|SPW|FSM|after64us[2], SPW_ULIGHT_FIFO, 1
|
511 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add1~17 , A_SPW_TOP|SPW|FSM|Add1~17, SPW_ULIGHT_FIFO, 1
|
512 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after64us~5 , A_SPW_TOP|SPW|FSM|after64us~5, SPW_ULIGHT_FIFO, 1
|
513 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after64us[3] , A_SPW_TOP|SPW|FSM|after64us[3], SPW_ULIGHT_FIFO, 1
|
514 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add1~13 , A_SPW_TOP|SPW|FSM|Add1~13, SPW_ULIGHT_FIFO, 1
|
515 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after64us~4 , A_SPW_TOP|SPW|FSM|after64us~4, SPW_ULIGHT_FIFO, 1
|
516 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after64us[4] , A_SPW_TOP|SPW|FSM|after64us[4], SPW_ULIGHT_FIFO, 1
|
517 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add1~9 , A_SPW_TOP|SPW|FSM|Add1~9, SPW_ULIGHT_FIFO, 1
|
518 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after64us~3 , A_SPW_TOP|SPW|FSM|after64us~3, SPW_ULIGHT_FIFO, 1
|
519 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after64us[5] , A_SPW_TOP|SPW|FSM|after64us[5], SPW_ULIGHT_FIFO, 1
|
520 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add1~5 , A_SPW_TOP|SPW|FSM|Add1~5, SPW_ULIGHT_FIFO, 1
|
521 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after64us~2 , A_SPW_TOP|SPW|FSM|after64us~2, SPW_ULIGHT_FIFO, 1
|
522 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after64us[6] , A_SPW_TOP|SPW|FSM|after64us[6], SPW_ULIGHT_FIFO, 1
|
523 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add1~45 , A_SPW_TOP|SPW|FSM|Add1~45, SPW_ULIGHT_FIFO, 1
|
524 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add1~41 , A_SPW_TOP|SPW|FSM|Add1~41, SPW_ULIGHT_FIFO, 1
|
525 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after64us~11 , A_SPW_TOP|SPW|FSM|after64us~11, SPW_ULIGHT_FIFO, 1
|
526 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after64us[8] , A_SPW_TOP|SPW|FSM|after64us[8], SPW_ULIGHT_FIFO, 1
|
527 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add1~29 , A_SPW_TOP|SPW|FSM|Add1~29, SPW_ULIGHT_FIFO, 1
|
528 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add1~37 , A_SPW_TOP|SPW|FSM|Add1~37, SPW_ULIGHT_FIFO, 1
|
529 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after64us~10 , A_SPW_TOP|SPW|FSM|after64us~10, SPW_ULIGHT_FIFO, 1
|
530 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after64us[10] , A_SPW_TOP|SPW|FSM|after64us[10], SPW_ULIGHT_FIFO, 1
|
531 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|Add1~33 , A_SPW_TOP|SPW|FSM|Add1~33, SPW_ULIGHT_FIFO, 1
|
532 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after64us~9 , A_SPW_TOP|SPW|FSM|after64us~9, SPW_ULIGHT_FIFO, 1
|
533 |
|
|
instance = comp, \A_SPW_TOP|SPW|FSM|after64us[11] , A_SPW_TOP|SPW|FSM|after64us[11], SPW_ULIGHT_FIFO, 1
|
534 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|always4~0 , u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|always4~0, SPW_ULIGHT_FIFO, 1
|
535 |
|
|
instance = comp, \m_x|counter_neg[0]~feeder , m_x|counter_neg[0]~feeder, SPW_ULIGHT_FIFO, 1
|
536 |
|
|
instance = comp, \m_x|Selector4~0 , m_x|Selector4~0, SPW_ULIGHT_FIFO, 1
|
537 |
|
|
instance = comp, \m_x|counter_neg[2] , m_x|counter_neg[2], SPW_ULIGHT_FIFO, 1
|
538 |
|
|
instance = comp, \m_x|Selector1~0 , m_x|Selector1~0, SPW_ULIGHT_FIFO, 1
|
539 |
|
|
instance = comp, \m_x|counter_neg[5] , m_x|counter_neg[5], SPW_ULIGHT_FIFO, 1
|
540 |
|
|
instance = comp, \m_x|Selector2~0 , m_x|Selector2~0, SPW_ULIGHT_FIFO, 1
|
541 |
|
|
instance = comp, \m_x|Selector2~1 , m_x|Selector2~1, SPW_ULIGHT_FIFO, 1
|
542 |
|
|
instance = comp, \m_x|counter_neg[4] , m_x|counter_neg[4], SPW_ULIGHT_FIFO, 1
|
543 |
|
|
instance = comp, \m_x|WideOr7~0 , m_x|WideOr7~0, SPW_ULIGHT_FIFO, 1
|
544 |
|
|
instance = comp, \m_x|counter_neg[0] , m_x|counter_neg[0], SPW_ULIGHT_FIFO, 1
|
545 |
|
|
instance = comp, \m_x|Selector5~0 , m_x|Selector5~0, SPW_ULIGHT_FIFO, 1
|
546 |
|
|
instance = comp, \m_x|Selector0~0 , m_x|Selector0~0, SPW_ULIGHT_FIFO, 1
|
547 |
|
|
instance = comp, \m_x|Equal1~0 , m_x|Equal1~0, SPW_ULIGHT_FIFO, 1
|
548 |
|
|
instance = comp, \m_x|control_bit_found , m_x|control_bit_found, SPW_ULIGHT_FIFO, 1
|
549 |
|
|
instance = comp, \m_x|Selector0~1 , m_x|Selector0~1, SPW_ULIGHT_FIFO, 1
|
550 |
|
|
instance = comp, \m_x|Selector0~2 , m_x|Selector0~2, SPW_ULIGHT_FIFO, 1
|
551 |
|
|
instance = comp, \m_x|is_control , m_x|is_control, SPW_ULIGHT_FIFO, 1
|
552 |
|
|
instance = comp, \m_x|Selector3~0 , m_x|Selector3~0, SPW_ULIGHT_FIFO, 1
|
553 |
|
|
instance = comp, \m_x|counter_neg[3] , m_x|counter_neg[3], SPW_ULIGHT_FIFO, 1
|
554 |
|
|
instance = comp, \m_x|always2~1 , m_x|always2~1, SPW_ULIGHT_FIFO, 1
|
555 |
|
|
instance = comp, \m_x|Selector5~1 , m_x|Selector5~1, SPW_ULIGHT_FIFO, 1
|
556 |
|
|
instance = comp, \m_x|Selector5~2 , m_x|Selector5~2, SPW_ULIGHT_FIFO, 1
|
557 |
|
|
instance = comp, \m_x|Selector5~3 , m_x|Selector5~3, SPW_ULIGHT_FIFO, 1
|
558 |
|
|
instance = comp, \m_x|counter_neg[1] , m_x|counter_neg[1], SPW_ULIGHT_FIFO, 1
|
559 |
|
|
instance = comp, \m_x|always2~0 , m_x|always2~0, SPW_ULIGHT_FIFO, 1
|
560 |
|
|
instance = comp, \m_x|always1~0 , m_x|always1~0, SPW_ULIGHT_FIFO, 1
|
561 |
|
|
instance = comp, \m_x|bit_c_0 , m_x|bit_c_0, SPW_ULIGHT_FIFO, 1
|
562 |
|
|
instance = comp, \m_x|bit_c_2~feeder , m_x|bit_c_2~feeder, SPW_ULIGHT_FIFO, 1
|
563 |
|
|
instance = comp, \m_x|bit_c_2 , m_x|bit_c_2, SPW_ULIGHT_FIFO, 1
|
564 |
|
|
instance = comp, \m_x|control_r[2]~feeder , m_x|control_r[2]~feeder, SPW_ULIGHT_FIFO, 1
|
565 |
|
|
instance = comp, \m_x|control_r[2] , m_x|control_r[2], SPW_ULIGHT_FIFO, 1
|
566 |
|
|
instance = comp, \m_x|control_p_r[2]~feeder , m_x|control_p_r[2]~feeder, SPW_ULIGHT_FIFO, 1
|
567 |
|
|
instance = comp, \m_x|control_p_r[2] , m_x|control_p_r[2], SPW_ULIGHT_FIFO, 1
|
568 |
|
|
instance = comp, \m_x|ready_control_p_r~0 , m_x|ready_control_p_r~0, SPW_ULIGHT_FIFO, 1
|
569 |
|
|
instance = comp, \m_x|ready_control_p_r , m_x|ready_control_p_r, SPW_ULIGHT_FIFO, 1
|
570 |
|
|
instance = comp, \m_x|control[2] , m_x|control[2], SPW_ULIGHT_FIFO, 1
|
571 |
|
|
instance = comp, \m_x|control_l_r[2] , m_x|control_l_r[2], SPW_ULIGHT_FIFO, 1
|
572 |
|
|
instance = comp, \m_x|info[12]~feeder , m_x|info[12]~feeder, SPW_ULIGHT_FIFO, 1
|
573 |
|
|
instance = comp, \m_x|Equal1~1 , m_x|Equal1~1, SPW_ULIGHT_FIFO, 1
|
574 |
|
|
instance = comp, \m_x|ready_data_p , m_x|ready_data_p, SPW_ULIGHT_FIFO, 1
|
575 |
|
|
instance = comp, \m_x|ready_data_p_r~0 , m_x|ready_data_p_r~0, SPW_ULIGHT_FIFO, 1
|
576 |
|
|
instance = comp, \m_x|ready_data_p_r~1 , m_x|ready_data_p_r~1, SPW_ULIGHT_FIFO, 1
|
577 |
|
|
instance = comp, \m_x|ready_data_p_r , m_x|ready_data_p_r, SPW_ULIGHT_FIFO, 1
|
578 |
|
|
instance = comp, \m_x|data_l_r[7]~0 , m_x|data_l_r[7]~0, SPW_ULIGHT_FIFO, 1
|
579 |
|
|
instance = comp, \m_x|info[12] , m_x|info[12], SPW_ULIGHT_FIFO, 1
|
580 |
|
|
instance = comp, \u0|data_info|read_mux_out[12] , u0|data_info|read_mux_out[12], SPW_ULIGHT_FIFO, 1
|
581 |
|
|
instance = comp, \u0|data_info|readdata[12] , u0|data_info|readdata[12], SPW_ULIGHT_FIFO, 1
|
582 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_translator|av_readdata_pre[12] , u0|mm_interconnect_0|data_info_s1_translator|av_readdata_pre[12], SPW_ULIGHT_FIFO, 1
|
583 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|mem[1][12] , u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|mem[1][12], SPW_ULIGHT_FIFO, 1
|
584 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|mem[1][129] , u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|mem[1][129], SPW_ULIGHT_FIFO, 1
|
585 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|mem~1 , u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|mem~1, SPW_ULIGHT_FIFO, 1
|
586 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|always0~0 , u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|always0~0, SPW_ULIGHT_FIFO, 1
|
587 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|mem[0][129] , u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|mem[0][129], SPW_ULIGHT_FIFO, 1
|
588 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|read~0 , u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|read~0, SPW_ULIGHT_FIFO, 1
|
589 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|mem_used[1]~1 , u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|mem_used[1]~1, SPW_ULIGHT_FIFO, 1
|
590 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|mem_used[1] , u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|mem_used[1], SPW_ULIGHT_FIFO, 1
|
591 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|mem~12 , u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|mem~12, SPW_ULIGHT_FIFO, 1
|
592 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|always0~0 , u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|always0~0, SPW_ULIGHT_FIFO, 1
|
593 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|mem[0][12] , u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|mem[0][12], SPW_ULIGHT_FIFO, 1
|
594 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_mux_001|src_payload~33 , u0|mm_interconnect_0|rsp_mux_001|src_payload~33, SPW_ULIGHT_FIFO, 1
|
595 |
|
|
instance = comp, \m_x|bit_c_1 , m_x|bit_c_1, SPW_ULIGHT_FIFO, 1
|
596 |
|
|
instance = comp, \m_x|bit_c_3 , m_x|bit_c_3, SPW_ULIGHT_FIFO, 1
|
597 |
|
|
instance = comp, \m_x|control_r[3]~feeder , m_x|control_r[3]~feeder, SPW_ULIGHT_FIFO, 1
|
598 |
|
|
instance = comp, \m_x|control_r[3] , m_x|control_r[3], SPW_ULIGHT_FIFO, 1
|
599 |
|
|
instance = comp, \m_x|control_p_r[3]~feeder , m_x|control_p_r[3]~feeder, SPW_ULIGHT_FIFO, 1
|
600 |
|
|
instance = comp, \m_x|control_p_r[3] , m_x|control_p_r[3], SPW_ULIGHT_FIFO, 1
|
601 |
|
|
instance = comp, \m_x|control[3] , m_x|control[3], SPW_ULIGHT_FIFO, 1
|
602 |
|
|
instance = comp, \m_x|control_l_r[3] , m_x|control_l_r[3], SPW_ULIGHT_FIFO, 1
|
603 |
|
|
instance = comp, \m_x|info[13] , m_x|info[13], SPW_ULIGHT_FIFO, 1
|
604 |
|
|
instance = comp, \u0|data_info|read_mux_out[13] , u0|data_info|read_mux_out[13], SPW_ULIGHT_FIFO, 1
|
605 |
|
|
instance = comp, \u0|data_info|readdata[13] , u0|data_info|readdata[13], SPW_ULIGHT_FIFO, 1
|
606 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_translator|av_readdata_pre[13] , u0|mm_interconnect_0|data_info_s1_translator|av_readdata_pre[13], SPW_ULIGHT_FIFO, 1
|
607 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|mem[1][13] , u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|mem[1][13], SPW_ULIGHT_FIFO, 1
|
608 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|mem~13 , u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|mem~13, SPW_ULIGHT_FIFO, 1
|
609 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|mem[0][13] , u0|mm_interconnect_0|data_info_s1_agent_rdata_fifo|mem[0][13], SPW_ULIGHT_FIFO, 1
|
610 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_mux_001|src_payload~34 , u0|mm_interconnect_0|rsp_mux_001|src_payload~34, SPW_ULIGHT_FIFO, 1
|
611 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[1][106] , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[1][106], SPW_ULIGHT_FIFO, 1
|
612 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[1][107] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[1][107], SPW_ULIGHT_FIFO, 1
|
613 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[1][109] , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[1][109], SPW_ULIGHT_FIFO, 1
|
614 |
|
|
instance = comp, \u0|mm_interconnect_0|router_001|Equal13~0 , u0|mm_interconnect_0|router_001|Equal13~0, SPW_ULIGHT_FIFO, 1
|
615 |
|
|
instance = comp, \u0|mm_interconnect_0|router_001|Equal13~1 , u0|mm_interconnect_0|router_001|Equal13~1, SPW_ULIGHT_FIFO, 1
|
616 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[7] , u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[7], SPW_ULIGHT_FIFO, 1
|
617 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux_001|src7_valid~0 , u0|mm_interconnect_0|cmd_demux_001|src7_valid~0, SPW_ULIGHT_FIFO, 1
|
618 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_007|packet_in_progress~0 , u0|mm_interconnect_0|cmd_mux_007|packet_in_progress~0, SPW_ULIGHT_FIFO, 1
|
619 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_007|packet_in_progress , u0|mm_interconnect_0|cmd_mux_007|packet_in_progress, SPW_ULIGHT_FIFO, 1
|
620 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_007|src_valid~0 , u0|mm_interconnect_0|cmd_mux_007|src_valid~0, SPW_ULIGHT_FIFO, 1
|
621 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_translator|waitrequest_reset_override~feeder , u0|mm_interconnect_0|data_flag_rx_s1_translator|waitrequest_reset_override~feeder, SPW_ULIGHT_FIFO, 1
|
622 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_translator|waitrequest_reset_override , u0|mm_interconnect_0|data_flag_rx_s1_translator|waitrequest_reset_override, SPW_ULIGHT_FIFO, 1
|
623 |
|
|
instance = comp, \u0|mm_interconnect_0|router_001|Equal5~0 , u0|mm_interconnect_0|router_001|Equal5~0, SPW_ULIGHT_FIFO, 1
|
624 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[3] , u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[3], SPW_ULIGHT_FIFO, 1
|
625 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_003|last_cycle~0 , u0|mm_interconnect_0|cmd_mux_003|last_cycle~0, SPW_ULIGHT_FIFO, 1
|
626 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_translator|wait_latency_counter~0 , u0|mm_interconnect_0|data_flag_rx_s1_translator|wait_latency_counter~0, SPW_ULIGHT_FIFO, 1
|
627 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_translator|wait_latency_counter[1] , u0|mm_interconnect_0|data_flag_rx_s1_translator|wait_latency_counter[1], SPW_ULIGHT_FIFO, 1
|
628 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|cp_ready~0 , u0|mm_interconnect_0|data_flag_rx_s1_agent|cp_ready~0, SPW_ULIGHT_FIFO, 1
|
629 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder, SPW_ULIGHT_FIFO, 1
|
630 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold, SPW_ULIGHT_FIFO, 1
|
631 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd, SPW_ULIGHT_FIFO, 1
|
632 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69] , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69], SPW_ULIGHT_FIFO, 1
|
633 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66] , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66], SPW_ULIGHT_FIFO, 1
|
634 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem~0 , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem~0, SPW_ULIGHT_FIFO, 1
|
635 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|write~0 , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|write~0, SPW_ULIGHT_FIFO, 1
|
636 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|always0~0 , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|always0~0, SPW_ULIGHT_FIFO, 1
|
637 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem_used[0]~1 , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem_used[0]~1, SPW_ULIGHT_FIFO, 1
|
638 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem_used[0] , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem_used[0], SPW_ULIGHT_FIFO, 1
|
639 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[1][129] , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[1][129], SPW_ULIGHT_FIFO, 1
|
640 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem~1 , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem~1, SPW_ULIGHT_FIFO, 1
|
641 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|always0~0 , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|always0~0, SPW_ULIGHT_FIFO, 1
|
642 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[0][129] , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[0][129], SPW_ULIGHT_FIFO, 1
|
643 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|comb~0 , u0|mm_interconnect_0|data_flag_rx_s1_agent|comb~0, SPW_ULIGHT_FIFO, 1
|
644 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[1][78] , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[1][78], SPW_ULIGHT_FIFO, 1
|
645 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|cp_ready~1 , u0|mm_interconnect_0|data_flag_rx_s1_agent|cp_ready~1, SPW_ULIGHT_FIFO, 1
|
646 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0, SPW_ULIGHT_FIFO, 1
|
647 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder, SPW_ULIGHT_FIFO, 1
|
648 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2] , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
649 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~5 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~5, SPW_ULIGHT_FIFO, 1
|
650 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2] , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
651 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~1 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~1, SPW_ULIGHT_FIFO, 1
|
652 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3] , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3], SPW_ULIGHT_FIFO, 1
|
653 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~4 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~4, SPW_ULIGHT_FIFO, 1
|
654 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4] , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4], SPW_ULIGHT_FIFO, 1
|
655 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0, SPW_ULIGHT_FIFO, 1
|
656 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~3 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~3, SPW_ULIGHT_FIFO, 1
|
657 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5] , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5], SPW_ULIGHT_FIFO, 1
|
658 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~2 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~2, SPW_ULIGHT_FIFO, 1
|
659 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6] , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6], SPW_ULIGHT_FIFO, 1
|
660 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem~3 , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem~3, SPW_ULIGHT_FIFO, 1
|
661 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[0][78] , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[0][78], SPW_ULIGHT_FIFO, 1
|
662 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[1][75] , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[1][75], SPW_ULIGHT_FIFO, 1
|
663 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem~6 , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem~6, SPW_ULIGHT_FIFO, 1
|
664 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[0][75] , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[0][75], SPW_ULIGHT_FIFO, 1
|
665 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[1][74] , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[1][74], SPW_ULIGHT_FIFO, 1
|
666 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem~7 , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem~7, SPW_ULIGHT_FIFO, 1
|
667 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[0][74] , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[0][74], SPW_ULIGHT_FIFO, 1
|
668 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~1 , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~1, SPW_ULIGHT_FIFO, 1
|
669 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[3] , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[3], SPW_ULIGHT_FIFO, 1
|
670 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|Add0~0 , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|Add0~0, SPW_ULIGHT_FIFO, 1
|
671 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[1][76] , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[1][76], SPW_ULIGHT_FIFO, 1
|
672 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem~5 , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem~5, SPW_ULIGHT_FIFO, 1
|
673 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[0][76] , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[0][76], SPW_ULIGHT_FIFO, 1
|
674 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~2 , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~2, SPW_ULIGHT_FIFO, 1
|
675 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[4] , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[4], SPW_ULIGHT_FIFO, 1
|
676 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|Add0~2 , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|Add0~2, SPW_ULIGHT_FIFO, 1
|
677 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[1][77] , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[1][77], SPW_ULIGHT_FIFO, 1
|
678 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem~4 , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem~4, SPW_ULIGHT_FIFO, 1
|
679 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[0][77] , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[0][77], SPW_ULIGHT_FIFO, 1
|
680 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|Add1~1 , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|Add1~1, SPW_ULIGHT_FIFO, 1
|
681 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~4 , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~4, SPW_ULIGHT_FIFO, 1
|
682 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[5] , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[5], SPW_ULIGHT_FIFO, 1
|
683 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|Add0~1 , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|Add0~1, SPW_ULIGHT_FIFO, 1
|
684 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|Add1~0 , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|Add1~0, SPW_ULIGHT_FIFO, 1
|
685 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~3 , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~3, SPW_ULIGHT_FIFO, 1
|
686 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[6] , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[6], SPW_ULIGHT_FIFO, 1
|
687 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~6 , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~6, SPW_ULIGHT_FIFO, 1
|
688 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[7] , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[7], SPW_ULIGHT_FIFO, 1
|
689 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|last_packet_beat~1 , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|last_packet_beat~1, SPW_ULIGHT_FIFO, 1
|
690 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_busy , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_busy, SPW_ULIGHT_FIFO, 1
|
691 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~0 , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~0, SPW_ULIGHT_FIFO, 1
|
692 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~5 , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~5, SPW_ULIGHT_FIFO, 1
|
693 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[2] , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[2], SPW_ULIGHT_FIFO, 1
|
694 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|last_packet_beat~2 , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|last_packet_beat~2, SPW_ULIGHT_FIFO, 1
|
695 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[1][66] , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[1][66], SPW_ULIGHT_FIFO, 1
|
696 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem~2 , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem~2, SPW_ULIGHT_FIFO, 1
|
697 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[0][66] , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem[0][66], SPW_ULIGHT_FIFO, 1
|
698 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|last_packet_beat~0 , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|last_packet_beat~0, SPW_ULIGHT_FIFO, 1
|
699 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|last_packet_beat , u0|mm_interconnect_0|data_flag_rx_s1_agent|uncompressor|last_packet_beat, SPW_ULIGHT_FIFO, 1
|
700 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem_used[1]~0 , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem_used[1]~0, SPW_ULIGHT_FIFO, 1
|
701 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem_used[1] , u0|mm_interconnect_0|data_flag_rx_s1_agent_rsp_fifo|mem_used[1], SPW_ULIGHT_FIFO, 1
|
702 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero~0 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero~0, SPW_ULIGHT_FIFO, 1
|
703 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero, SPW_ULIGHT_FIFO, 1
|
704 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1] , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1], SPW_ULIGHT_FIFO, 1
|
705 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0, SPW_ULIGHT_FIFO, 1
|
706 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg, SPW_ULIGHT_FIFO, 1
|
707 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0] , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0], SPW_ULIGHT_FIFO, 1
|
708 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2] , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2], SPW_ULIGHT_FIFO, 1
|
709 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|cp_ready~2 , u0|mm_interconnect_0|data_flag_rx_s1_agent|cp_ready~2, SPW_ULIGHT_FIFO, 1
|
710 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2] , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2], SPW_ULIGHT_FIFO, 1
|
711 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~3 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~3, SPW_ULIGHT_FIFO, 1
|
712 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4] , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4], SPW_ULIGHT_FIFO, 1
|
713 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~1 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~1, SPW_ULIGHT_FIFO, 1
|
714 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3] , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3], SPW_ULIGHT_FIFO, 1
|
715 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1, SPW_ULIGHT_FIFO, 1
|
716 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~2 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~2, SPW_ULIGHT_FIFO, 1
|
717 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0, SPW_ULIGHT_FIFO, 1
|
718 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~4 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~4, SPW_ULIGHT_FIFO, 1
|
719 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5] , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5], SPW_ULIGHT_FIFO, 1
|
720 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6] , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6], SPW_ULIGHT_FIFO, 1
|
721 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~0 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~0, SPW_ULIGHT_FIFO, 1
|
722 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0, SPW_ULIGHT_FIFO, 1
|
723 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg, SPW_ULIGHT_FIFO, 1
|
724 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1, SPW_ULIGHT_FIFO, 1
|
725 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11, SPW_ULIGHT_FIFO, 1
|
726 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE, SPW_ULIGHT_FIFO, 1
|
727 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg, SPW_ULIGHT_FIFO, 1
|
728 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0, SPW_ULIGHT_FIFO, 1
|
729 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2, SPW_ULIGHT_FIFO, 1
|
730 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~8 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~8, SPW_ULIGHT_FIFO, 1
|
731 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_COMP_TRANS , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_COMP_TRANS, SPW_ULIGHT_FIFO, 1
|
732 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0, SPW_ULIGHT_FIFO, 1
|
733 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_valid~0 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_valid~0, SPW_ULIGHT_FIFO, 1
|
734 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_valid_reg , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_valid_reg, SPW_ULIGHT_FIFO, 1
|
735 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|load_next_out_cmd , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|load_next_out_cmd, SPW_ULIGHT_FIFO, 1
|
736 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor1 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor1, SPW_ULIGHT_FIFO, 1
|
737 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10, SPW_ULIGHT_FIFO, 1
|
738 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST, SPW_ULIGHT_FIFO, 1
|
739 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9, SPW_ULIGHT_FIFO, 1
|
740 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS, SPW_ULIGHT_FIFO, 1
|
741 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0 , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0, SPW_ULIGHT_FIFO, 1
|
742 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_003|packet_in_progress~0 , u0|mm_interconnect_0|cmd_mux_003|packet_in_progress~0, SPW_ULIGHT_FIFO, 1
|
743 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_003|packet_in_progress , u0|mm_interconnect_0|cmd_mux_003|packet_in_progress, SPW_ULIGHT_FIFO, 1
|
744 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_003|update_grant~0 , u0|mm_interconnect_0|cmd_mux_003|update_grant~0, SPW_ULIGHT_FIFO, 1
|
745 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_003|saved_grant[1] , u0|mm_interconnect_0|cmd_mux_003|saved_grant[1], SPW_ULIGHT_FIFO, 1
|
746 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3] , u0|mm_interconnect_0|data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3], SPW_ULIGHT_FIFO, 1
|
747 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|WideOr0~0 , u0|mm_interconnect_0|data_flag_rx_s1_agent|WideOr0~0, SPW_ULIGHT_FIFO, 1
|
748 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_translator|read_latency_shift_reg~0 , u0|mm_interconnect_0|data_flag_rx_s1_translator|read_latency_shift_reg~0, SPW_ULIGHT_FIFO, 1
|
749 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_translator|wait_latency_counter~1 , u0|mm_interconnect_0|data_flag_rx_s1_translator|wait_latency_counter~1, SPW_ULIGHT_FIFO, 1
|
750 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_translator|wait_latency_counter[0] , u0|mm_interconnect_0|data_flag_rx_s1_translator|wait_latency_counter[0], SPW_ULIGHT_FIFO, 1
|
751 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_translator|read_latency_shift_reg~1 , u0|mm_interconnect_0|data_flag_rx_s1_translator|read_latency_shift_reg~1, SPW_ULIGHT_FIFO, 1
|
752 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_translator|read_latency_shift_reg[0] , u0|mm_interconnect_0|data_flag_rx_s1_translator|read_latency_shift_reg[0], SPW_ULIGHT_FIFO, 1
|
753 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rdata_fifo|read~0 , u0|mm_interconnect_0|data_flag_rx_s1_agent_rdata_fifo|read~0, SPW_ULIGHT_FIFO, 1
|
754 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rdata_fifo|mem_used[1]~1 , u0|mm_interconnect_0|data_flag_rx_s1_agent_rdata_fifo|mem_used[1]~1, SPW_ULIGHT_FIFO, 1
|
755 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rdata_fifo|mem_used[1] , u0|mm_interconnect_0|data_flag_rx_s1_agent_rdata_fifo|mem_used[1], SPW_ULIGHT_FIFO, 1
|
756 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rdata_fifo|mem_used[0]~0 , u0|mm_interconnect_0|data_flag_rx_s1_agent_rdata_fifo|mem_used[0]~0, SPW_ULIGHT_FIFO, 1
|
757 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent_rdata_fifo|mem_used[0] , u0|mm_interconnect_0|data_flag_rx_s1_agent_rdata_fifo|mem_used[0], SPW_ULIGHT_FIFO, 1
|
758 |
|
|
instance = comp, \u0|mm_interconnect_0|data_flag_rx_s1_agent|rp_valid , u0|mm_interconnect_0|data_flag_rx_s1_agent|rp_valid, SPW_ULIGHT_FIFO, 1
|
759 |
|
|
instance = comp, \u0|mm_interconnect_0|router_001|Equal18~0 , u0|mm_interconnect_0|router_001|Equal18~0, SPW_ULIGHT_FIFO, 1
|
760 |
|
|
instance = comp, \u0|mm_interconnect_0|router_001|Equal18~1 , u0|mm_interconnect_0|router_001|Equal18~1, SPW_ULIGHT_FIFO, 1
|
761 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[12] , u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[12], SPW_ULIGHT_FIFO, 1
|
762 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_012|last_cycle~0 , u0|mm_interconnect_0|cmd_mux_012|last_cycle~0, SPW_ULIGHT_FIFO, 1
|
763 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder, SPW_ULIGHT_FIFO, 1
|
764 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold, SPW_ULIGHT_FIFO, 1
|
765 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd, SPW_ULIGHT_FIFO, 1
|
766 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg, SPW_ULIGHT_FIFO, 1
|
767 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder, SPW_ULIGHT_FIFO, 1
|
768 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_translator|waitrequest_reset_override~feeder , u0|mm_interconnect_0|fifo_full_tx_status_s1_translator|waitrequest_reset_override~feeder, SPW_ULIGHT_FIFO, 1
|
769 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_translator|waitrequest_reset_override , u0|mm_interconnect_0|fifo_full_tx_status_s1_translator|waitrequest_reset_override, SPW_ULIGHT_FIFO, 1
|
770 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1] , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1], SPW_ULIGHT_FIFO, 1
|
771 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0] , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0], SPW_ULIGHT_FIFO, 1
|
772 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2] , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2], SPW_ULIGHT_FIFO, 1
|
773 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3] , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3], SPW_ULIGHT_FIFO, 1
|
774 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0, SPW_ULIGHT_FIFO, 1
|
775 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg, SPW_ULIGHT_FIFO, 1
|
776 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|WideOr0~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|WideOr0~0, SPW_ULIGHT_FIFO, 1
|
777 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_valid~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_valid~0, SPW_ULIGHT_FIFO, 1
|
778 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_valid_reg , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_valid_reg, SPW_ULIGHT_FIFO, 1
|
779 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_translator|read_latency_shift_reg~1 , u0|mm_interconnect_0|fifo_full_tx_status_s1_translator|read_latency_shift_reg~1, SPW_ULIGHT_FIFO, 1
|
780 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_translator|read_latency_shift_reg[0] , u0|mm_interconnect_0|fifo_full_tx_status_s1_translator|read_latency_shift_reg[0], SPW_ULIGHT_FIFO, 1
|
781 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[1][129] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[1][129], SPW_ULIGHT_FIFO, 1
|
782 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem~1 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem~1, SPW_ULIGHT_FIFO, 1
|
783 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|write~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|write~0, SPW_ULIGHT_FIFO, 1
|
784 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0, SPW_ULIGHT_FIFO, 1
|
785 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~4 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~4, SPW_ULIGHT_FIFO, 1
|
786 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3] , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3], SPW_ULIGHT_FIFO, 1
|
787 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4] , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4], SPW_ULIGHT_FIFO, 1
|
788 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~3 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~3, SPW_ULIGHT_FIFO, 1
|
789 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0, SPW_ULIGHT_FIFO, 1
|
790 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~2 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~2, SPW_ULIGHT_FIFO, 1
|
791 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5] , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5], SPW_ULIGHT_FIFO, 1
|
792 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6] , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6], SPW_ULIGHT_FIFO, 1
|
793 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~1 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~1, SPW_ULIGHT_FIFO, 1
|
794 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor1 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor1, SPW_ULIGHT_FIFO, 1
|
795 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10, SPW_ULIGHT_FIFO, 1
|
796 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST, SPW_ULIGHT_FIFO, 1
|
797 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9, SPW_ULIGHT_FIFO, 1
|
798 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS, SPW_ULIGHT_FIFO, 1
|
799 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~5 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~5, SPW_ULIGHT_FIFO, 1
|
800 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2] , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
801 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[1][74] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[1][74], SPW_ULIGHT_FIFO, 1
|
802 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem~7 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem~7, SPW_ULIGHT_FIFO, 1
|
803 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[0][74] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[0][74], SPW_ULIGHT_FIFO, 1
|
804 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[1][75] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[1][75], SPW_ULIGHT_FIFO, 1
|
805 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem~6 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem~6, SPW_ULIGHT_FIFO, 1
|
806 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[0][75] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[0][75], SPW_ULIGHT_FIFO, 1
|
807 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~1 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~1, SPW_ULIGHT_FIFO, 1
|
808 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[3] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[3], SPW_ULIGHT_FIFO, 1
|
809 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[1][76] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[1][76], SPW_ULIGHT_FIFO, 1
|
810 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem~5 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem~5, SPW_ULIGHT_FIFO, 1
|
811 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[0][76] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[0][76], SPW_ULIGHT_FIFO, 1
|
812 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|Add0~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|Add0~0, SPW_ULIGHT_FIFO, 1
|
813 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~2 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~2, SPW_ULIGHT_FIFO, 1
|
814 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[4] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[4], SPW_ULIGHT_FIFO, 1
|
815 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[1][77] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[1][77], SPW_ULIGHT_FIFO, 1
|
816 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem~4 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem~4, SPW_ULIGHT_FIFO, 1
|
817 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[0][77] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[0][77], SPW_ULIGHT_FIFO, 1
|
818 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|Add1~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|Add1~0, SPW_ULIGHT_FIFO, 1
|
819 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[1][78] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[1][78], SPW_ULIGHT_FIFO, 1
|
820 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem~3 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem~3, SPW_ULIGHT_FIFO, 1
|
821 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[0][78] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[0][78], SPW_ULIGHT_FIFO, 1
|
822 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|Add0~2 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|Add0~2, SPW_ULIGHT_FIFO, 1
|
823 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|Add1~1 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|Add1~1, SPW_ULIGHT_FIFO, 1
|
824 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~4 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~4, SPW_ULIGHT_FIFO, 1
|
825 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[5] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[5], SPW_ULIGHT_FIFO, 1
|
826 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|Add0~1 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|Add0~1, SPW_ULIGHT_FIFO, 1
|
827 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~3 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~3, SPW_ULIGHT_FIFO, 1
|
828 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[6] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[6], SPW_ULIGHT_FIFO, 1
|
829 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|last_packet_beat~1 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|last_packet_beat~1, SPW_ULIGHT_FIFO, 1
|
830 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~6 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~6, SPW_ULIGHT_FIFO, 1
|
831 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[7] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[7], SPW_ULIGHT_FIFO, 1
|
832 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_busy , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_busy, SPW_ULIGHT_FIFO, 1
|
833 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~0, SPW_ULIGHT_FIFO, 1
|
834 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~5 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~5, SPW_ULIGHT_FIFO, 1
|
835 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[2] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[2], SPW_ULIGHT_FIFO, 1
|
836 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|last_packet_beat~2 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|last_packet_beat~2, SPW_ULIGHT_FIFO, 1
|
837 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|last_packet_beat~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|last_packet_beat~0, SPW_ULIGHT_FIFO, 1
|
838 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[1][66] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[1][66], SPW_ULIGHT_FIFO, 1
|
839 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66] , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66], SPW_ULIGHT_FIFO, 1
|
840 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem~2 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem~2, SPW_ULIGHT_FIFO, 1
|
841 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[0][66] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[0][66], SPW_ULIGHT_FIFO, 1
|
842 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|last_packet_beat , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|last_packet_beat, SPW_ULIGHT_FIFO, 1
|
843 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem_used[0]~1 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem_used[0]~1, SPW_ULIGHT_FIFO, 1
|
844 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem_used[0] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem_used[0], SPW_ULIGHT_FIFO, 1
|
845 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|always0~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|always0~0, SPW_ULIGHT_FIFO, 1
|
846 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[0][129] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[0][129], SPW_ULIGHT_FIFO, 1
|
847 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rdata_fifo|read~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rdata_fifo|read~0, SPW_ULIGHT_FIFO, 1
|
848 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rdata_fifo|mem_used[1]~1 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rdata_fifo|mem_used[1]~1, SPW_ULIGHT_FIFO, 1
|
849 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rdata_fifo|mem_used[1] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rdata_fifo|mem_used[1], SPW_ULIGHT_FIFO, 1
|
850 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rdata_fifo|mem_used[0]~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rdata_fifo|mem_used[0]~0, SPW_ULIGHT_FIFO, 1
|
851 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rdata_fifo|mem_used[0] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rdata_fifo|mem_used[0], SPW_ULIGHT_FIFO, 1
|
852 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|comb~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|comb~0, SPW_ULIGHT_FIFO, 1
|
853 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|always0~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|uncompressor|always0~0, SPW_ULIGHT_FIFO, 1
|
854 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem_used[1]~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem_used[1]~0, SPW_ULIGHT_FIFO, 1
|
855 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem_used[1] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem_used[1], SPW_ULIGHT_FIFO, 1
|
856 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69] , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69], SPW_ULIGHT_FIFO, 1
|
857 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem~0, SPW_ULIGHT_FIFO, 1
|
858 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_translator|read_latency_shift_reg~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_translator|read_latency_shift_reg~0, SPW_ULIGHT_FIFO, 1
|
859 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_translator|wait_latency_counter~1 , u0|mm_interconnect_0|fifo_full_tx_status_s1_translator|wait_latency_counter~1, SPW_ULIGHT_FIFO, 1
|
860 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_translator|wait_latency_counter[0] , u0|mm_interconnect_0|fifo_full_tx_status_s1_translator|wait_latency_counter[0], SPW_ULIGHT_FIFO, 1
|
861 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_translator|wait_latency_counter~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_translator|wait_latency_counter~0, SPW_ULIGHT_FIFO, 1
|
862 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_translator|wait_latency_counter[1] , u0|mm_interconnect_0|fifo_full_tx_status_s1_translator|wait_latency_counter[1], SPW_ULIGHT_FIFO, 1
|
863 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|cp_ready~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|cp_ready~0, SPW_ULIGHT_FIFO, 1
|
864 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|load_next_out_cmd , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|load_next_out_cmd, SPW_ULIGHT_FIFO, 1
|
865 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2] , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
866 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~1 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~1, SPW_ULIGHT_FIFO, 1
|
867 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2] , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2], SPW_ULIGHT_FIFO, 1
|
868 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~4 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~4, SPW_ULIGHT_FIFO, 1
|
869 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3] , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3], SPW_ULIGHT_FIFO, 1
|
870 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1, SPW_ULIGHT_FIFO, 1
|
871 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~3 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~3, SPW_ULIGHT_FIFO, 1
|
872 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4] , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4], SPW_ULIGHT_FIFO, 1
|
873 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0, SPW_ULIGHT_FIFO, 1
|
874 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5] , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5], SPW_ULIGHT_FIFO, 1
|
875 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~2 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~2, SPW_ULIGHT_FIFO, 1
|
876 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6] , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6], SPW_ULIGHT_FIFO, 1
|
877 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~0, SPW_ULIGHT_FIFO, 1
|
878 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0, SPW_ULIGHT_FIFO, 1
|
879 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg, SPW_ULIGHT_FIFO, 1
|
880 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero~0, SPW_ULIGHT_FIFO, 1
|
881 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero, SPW_ULIGHT_FIFO, 1
|
882 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0, SPW_ULIGHT_FIFO, 1
|
883 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0, SPW_ULIGHT_FIFO, 1
|
884 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~1 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~1, SPW_ULIGHT_FIFO, 1
|
885 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11, SPW_ULIGHT_FIFO, 1
|
886 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE, SPW_ULIGHT_FIFO, 1
|
887 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~1 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~1, SPW_ULIGHT_FIFO, 1
|
888 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0, SPW_ULIGHT_FIFO, 1
|
889 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|cp_ready~1 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|cp_ready~1, SPW_ULIGHT_FIFO, 1
|
890 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|cp_ready~2 , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent|cp_ready~2, SPW_ULIGHT_FIFO, 1
|
891 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1, SPW_ULIGHT_FIFO, 1
|
892 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2, SPW_ULIGHT_FIFO, 1
|
893 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~8 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~8, SPW_ULIGHT_FIFO, 1
|
894 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_COMP_TRANS , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_COMP_TRANS, SPW_ULIGHT_FIFO, 1
|
895 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~2 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~2, SPW_ULIGHT_FIFO, 1
|
896 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~3 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~3, SPW_ULIGHT_FIFO, 1
|
897 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~4 , u0|mm_interconnect_0|fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~4, SPW_ULIGHT_FIFO, 1
|
898 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_012|packet_in_progress~0 , u0|mm_interconnect_0|cmd_mux_012|packet_in_progress~0, SPW_ULIGHT_FIFO, 1
|
899 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_012|packet_in_progress , u0|mm_interconnect_0|cmd_mux_012|packet_in_progress, SPW_ULIGHT_FIFO, 1
|
900 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_012|update_grant~0 , u0|mm_interconnect_0|cmd_mux_012|update_grant~0, SPW_ULIGHT_FIFO, 1
|
901 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_012|saved_grant[1] , u0|mm_interconnect_0|cmd_mux_012|saved_grant[1], SPW_ULIGHT_FIFO, 1
|
902 |
|
|
instance = comp, \u0|mm_interconnect_0|router_001|Equal19~0 , u0|mm_interconnect_0|router_001|Equal19~0, SPW_ULIGHT_FIFO, 1
|
903 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[13] , u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[13], SPW_ULIGHT_FIFO, 1
|
904 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_013|last_cycle~0 , u0|mm_interconnect_0|cmd_mux_013|last_cycle~0, SPW_ULIGHT_FIFO, 1
|
905 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero~0, SPW_ULIGHT_FIFO, 1
|
906 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder, SPW_ULIGHT_FIFO, 1
|
907 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold, SPW_ULIGHT_FIFO, 1
|
908 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd, SPW_ULIGHT_FIFO, 1
|
909 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero, SPW_ULIGHT_FIFO, 1
|
910 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_translator|waitrequest_reset_override~feeder , u0|mm_interconnect_0|fifo_empty_tx_status_s1_translator|waitrequest_reset_override~feeder, SPW_ULIGHT_FIFO, 1
|
911 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_translator|waitrequest_reset_override , u0|mm_interconnect_0|fifo_empty_tx_status_s1_translator|waitrequest_reset_override, SPW_ULIGHT_FIFO, 1
|
912 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_translator|wait_latency_counter~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_translator|wait_latency_counter~0, SPW_ULIGHT_FIFO, 1
|
913 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_translator|wait_latency_counter[1] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_translator|wait_latency_counter[1], SPW_ULIGHT_FIFO, 1
|
914 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|cp_ready~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|cp_ready~0, SPW_ULIGHT_FIFO, 1
|
915 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0, SPW_ULIGHT_FIFO, 1
|
916 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg, SPW_ULIGHT_FIFO, 1
|
917 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3], SPW_ULIGHT_FIFO, 1
|
918 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0], SPW_ULIGHT_FIFO, 1
|
919 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1], SPW_ULIGHT_FIFO, 1
|
920 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|cp_ready~2 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|cp_ready~2, SPW_ULIGHT_FIFO, 1
|
921 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder, SPW_ULIGHT_FIFO, 1
|
922 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66], SPW_ULIGHT_FIFO, 1
|
923 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69], SPW_ULIGHT_FIFO, 1
|
924 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem~0, SPW_ULIGHT_FIFO, 1
|
925 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|write~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|write~0, SPW_ULIGHT_FIFO, 1
|
926 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[1][129] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[1][129], SPW_ULIGHT_FIFO, 1
|
927 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem~1 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem~1, SPW_ULIGHT_FIFO, 1
|
928 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|cp_ready~1 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|cp_ready~1, SPW_ULIGHT_FIFO, 1
|
929 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0, SPW_ULIGHT_FIFO, 1
|
930 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~5 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~5, SPW_ULIGHT_FIFO, 1
|
931 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
932 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4], SPW_ULIGHT_FIFO, 1
|
933 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~3 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~3, SPW_ULIGHT_FIFO, 1
|
934 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0, SPW_ULIGHT_FIFO, 1
|
935 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~2 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~2, SPW_ULIGHT_FIFO, 1
|
936 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5], SPW_ULIGHT_FIFO, 1
|
937 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6], SPW_ULIGHT_FIFO, 1
|
938 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~1 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~1, SPW_ULIGHT_FIFO, 1
|
939 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor1 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor1, SPW_ULIGHT_FIFO, 1
|
940 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg, SPW_ULIGHT_FIFO, 1
|
941 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0, SPW_ULIGHT_FIFO, 1
|
942 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10, SPW_ULIGHT_FIFO, 1
|
943 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST, SPW_ULIGHT_FIFO, 1
|
944 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9, SPW_ULIGHT_FIFO, 1
|
945 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS, SPW_ULIGHT_FIFO, 1
|
946 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~4 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~4, SPW_ULIGHT_FIFO, 1
|
947 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3], SPW_ULIGHT_FIFO, 1
|
948 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[1][75] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[1][75], SPW_ULIGHT_FIFO, 1
|
949 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem~6 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem~6, SPW_ULIGHT_FIFO, 1
|
950 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[0][75] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[0][75], SPW_ULIGHT_FIFO, 1
|
951 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_busy , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_busy, SPW_ULIGHT_FIFO, 1
|
952 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[1][78] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[1][78], SPW_ULIGHT_FIFO, 1
|
953 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem~3 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem~3, SPW_ULIGHT_FIFO, 1
|
954 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[0][78] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[0][78], SPW_ULIGHT_FIFO, 1
|
955 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[1][76] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[1][76], SPW_ULIGHT_FIFO, 1
|
956 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem~5 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem~5, SPW_ULIGHT_FIFO, 1
|
957 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[0][76] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[0][76], SPW_ULIGHT_FIFO, 1
|
958 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[1][74] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[1][74], SPW_ULIGHT_FIFO, 1
|
959 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem~7 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem~7, SPW_ULIGHT_FIFO, 1
|
960 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[0][74] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[0][74], SPW_ULIGHT_FIFO, 1
|
961 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[1][77] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[1][77], SPW_ULIGHT_FIFO, 1
|
962 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem~4 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem~4, SPW_ULIGHT_FIFO, 1
|
963 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[0][77] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[0][77], SPW_ULIGHT_FIFO, 1
|
964 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|Add1~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|Add1~0, SPW_ULIGHT_FIFO, 1
|
965 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|Add0~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|Add0~0, SPW_ULIGHT_FIFO, 1
|
966 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~2 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~2, SPW_ULIGHT_FIFO, 1
|
967 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[4] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[4], SPW_ULIGHT_FIFO, 1
|
968 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|Add0~2 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|Add0~2, SPW_ULIGHT_FIFO, 1
|
969 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|Add1~1 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|Add1~1, SPW_ULIGHT_FIFO, 1
|
970 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~4 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~4, SPW_ULIGHT_FIFO, 1
|
971 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[5] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[5], SPW_ULIGHT_FIFO, 1
|
972 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|Add0~1 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|Add0~1, SPW_ULIGHT_FIFO, 1
|
973 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~3 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~3, SPW_ULIGHT_FIFO, 1
|
974 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[6] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[6], SPW_ULIGHT_FIFO, 1
|
975 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~6 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~6, SPW_ULIGHT_FIFO, 1
|
976 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[7] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[7], SPW_ULIGHT_FIFO, 1
|
977 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~0, SPW_ULIGHT_FIFO, 1
|
978 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|last_packet_beat~2 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|last_packet_beat~2, SPW_ULIGHT_FIFO, 1
|
979 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~5 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~5, SPW_ULIGHT_FIFO, 1
|
980 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[2] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[2], SPW_ULIGHT_FIFO, 1
|
981 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~1 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter~1, SPW_ULIGHT_FIFO, 1
|
982 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[3] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|burst_uncompress_byte_counter[3], SPW_ULIGHT_FIFO, 1
|
983 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|last_packet_beat~1 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|last_packet_beat~1, SPW_ULIGHT_FIFO, 1
|
984 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|last_packet_beat~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|last_packet_beat~0, SPW_ULIGHT_FIFO, 1
|
985 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[1][66] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[1][66], SPW_ULIGHT_FIFO, 1
|
986 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem~2 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem~2, SPW_ULIGHT_FIFO, 1
|
987 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[0][66] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[0][66], SPW_ULIGHT_FIFO, 1
|
988 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|last_packet_beat , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|last_packet_beat, SPW_ULIGHT_FIFO, 1
|
989 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|always0~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|always0~0, SPW_ULIGHT_FIFO, 1
|
990 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[0][129] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem[0][129], SPW_ULIGHT_FIFO, 1
|
991 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rdata_fifo|read~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rdata_fifo|read~0, SPW_ULIGHT_FIFO, 1
|
992 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rdata_fifo|mem_used[1]~1 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rdata_fifo|mem_used[1]~1, SPW_ULIGHT_FIFO, 1
|
993 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rdata_fifo|mem_used[1] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rdata_fifo|mem_used[1], SPW_ULIGHT_FIFO, 1
|
994 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rdata_fifo|mem_used[0]~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rdata_fifo|mem_used[0]~0, SPW_ULIGHT_FIFO, 1
|
995 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rdata_fifo|mem_used[0] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rdata_fifo|mem_used[0], SPW_ULIGHT_FIFO, 1
|
996 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|comb~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|comb~0, SPW_ULIGHT_FIFO, 1
|
997 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|always0~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|uncompressor|always0~0, SPW_ULIGHT_FIFO, 1
|
998 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem_used[0]~1 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem_used[0]~1, SPW_ULIGHT_FIFO, 1
|
999 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem_used[0] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem_used[0], SPW_ULIGHT_FIFO, 1
|
1000 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem_used[1]~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem_used[1]~0, SPW_ULIGHT_FIFO, 1
|
1001 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem_used[1] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent_rsp_fifo|mem_used[1], SPW_ULIGHT_FIFO, 1
|
1002 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|load_next_out_cmd , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|load_next_out_cmd, SPW_ULIGHT_FIFO, 1
|
1003 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
1004 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~4 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~4, SPW_ULIGHT_FIFO, 1
|
1005 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2], SPW_ULIGHT_FIFO, 1
|
1006 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3], SPW_ULIGHT_FIFO, 1
|
1007 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~3 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~3, SPW_ULIGHT_FIFO, 1
|
1008 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1, SPW_ULIGHT_FIFO, 1
|
1009 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~2 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~2, SPW_ULIGHT_FIFO, 1
|
1010 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4], SPW_ULIGHT_FIFO, 1
|
1011 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0, SPW_ULIGHT_FIFO, 1
|
1012 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5], SPW_ULIGHT_FIFO, 1
|
1013 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~0, SPW_ULIGHT_FIFO, 1
|
1014 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6], SPW_ULIGHT_FIFO, 1
|
1015 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~1 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~1, SPW_ULIGHT_FIFO, 1
|
1016 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0, SPW_ULIGHT_FIFO, 1
|
1017 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg, SPW_ULIGHT_FIFO, 1
|
1018 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1, SPW_ULIGHT_FIFO, 1
|
1019 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11, SPW_ULIGHT_FIFO, 1
|
1020 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE, SPW_ULIGHT_FIFO, 1
|
1021 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0, SPW_ULIGHT_FIFO, 1
|
1022 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2, SPW_ULIGHT_FIFO, 1
|
1023 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~8 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~8, SPW_ULIGHT_FIFO, 1
|
1024 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_COMP_TRANS , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_COMP_TRANS, SPW_ULIGHT_FIFO, 1
|
1025 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_valid~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_valid~0, SPW_ULIGHT_FIFO, 1
|
1026 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_valid_reg , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_valid_reg, SPW_ULIGHT_FIFO, 1
|
1027 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0, SPW_ULIGHT_FIFO, 1
|
1028 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_013|packet_in_progress~0 , u0|mm_interconnect_0|cmd_mux_013|packet_in_progress~0, SPW_ULIGHT_FIFO, 1
|
1029 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_013|packet_in_progress , u0|mm_interconnect_0|cmd_mux_013|packet_in_progress, SPW_ULIGHT_FIFO, 1
|
1030 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_013|update_grant~0 , u0|mm_interconnect_0|cmd_mux_013|update_grant~0, SPW_ULIGHT_FIFO, 1
|
1031 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_013|saved_grant[1] , u0|mm_interconnect_0|cmd_mux_013|saved_grant[1], SPW_ULIGHT_FIFO, 1
|
1032 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2], SPW_ULIGHT_FIFO, 1
|
1033 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|WideOr0~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|WideOr0~0, SPW_ULIGHT_FIFO, 1
|
1034 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_translator|read_latency_shift_reg~0 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_translator|read_latency_shift_reg~0, SPW_ULIGHT_FIFO, 1
|
1035 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_translator|wait_latency_counter~1 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_translator|wait_latency_counter~1, SPW_ULIGHT_FIFO, 1
|
1036 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_translator|wait_latency_counter[0] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_translator|wait_latency_counter[0], SPW_ULIGHT_FIFO, 1
|
1037 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_translator|read_latency_shift_reg~1 , u0|mm_interconnect_0|fifo_empty_tx_status_s1_translator|read_latency_shift_reg~1, SPW_ULIGHT_FIFO, 1
|
1038 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_translator|read_latency_shift_reg[0] , u0|mm_interconnect_0|fifo_empty_tx_status_s1_translator|read_latency_shift_reg[0], SPW_ULIGHT_FIFO, 1
|
1039 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|rp_valid , u0|mm_interconnect_0|fifo_empty_tx_status_s1_agent|rp_valid, SPW_ULIGHT_FIFO, 1
|
1040 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_translator|read_latency_shift_reg~1 , u0|mm_interconnect_0|link_start_s1_translator|read_latency_shift_reg~1, SPW_ULIGHT_FIFO, 1
|
1041 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_translator|read_latency_shift_reg[0] , u0|mm_interconnect_0|link_start_s1_translator|read_latency_shift_reg[0], SPW_ULIGHT_FIFO, 1
|
1042 |
|
|
instance = comp, \u0|mm_interconnect_0|router|Equal13~0 , u0|mm_interconnect_0|router|Equal13~0, SPW_ULIGHT_FIFO, 1
|
1043 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][113] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][113], SPW_ULIGHT_FIFO, 1
|
1044 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_015|packet_in_progress~0 , u0|mm_interconnect_0|cmd_mux_015|packet_in_progress~0, SPW_ULIGHT_FIFO, 1
|
1045 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_015|packet_in_progress , u0|mm_interconnect_0|cmd_mux_015|packet_in_progress, SPW_ULIGHT_FIFO, 1
|
1046 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_015|src_payload[0] , u0|mm_interconnect_0|cmd_mux_015|src_payload[0], SPW_ULIGHT_FIFO, 1
|
1047 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_translator|wait_latency_counter~1 , u0|mm_interconnect_0|timecode_tx_enable_s1_translator|wait_latency_counter~1, SPW_ULIGHT_FIFO, 1
|
1048 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_translator|wait_latency_counter[1] , u0|mm_interconnect_0|timecode_tx_enable_s1_translator|wait_latency_counter[1], SPW_ULIGHT_FIFO, 1
|
1049 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_translator|waitrequest_reset_override~feeder , u0|mm_interconnect_0|timecode_tx_enable_s1_translator|waitrequest_reset_override~feeder, SPW_ULIGHT_FIFO, 1
|
1050 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_translator|waitrequest_reset_override , u0|mm_interconnect_0|timecode_tx_enable_s1_translator|waitrequest_reset_override, SPW_ULIGHT_FIFO, 1
|
1051 |
|
|
instance = comp, \u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[1][115] , u0|mm_interconnect_0|fifo_full_tx_status_s1_agent_rsp_fifo|mem[1][115], SPW_ULIGHT_FIFO, 1
|
1052 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[1][116] , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[1][116], SPW_ULIGHT_FIFO, 1
|
1053 |
|
|
instance = comp, \u0|hps_0|fpga_interfaces|hps2fpga , u0|hps_0|fpga_interfaces|hps2fpga, SPW_ULIGHT_FIFO, 1
|
1054 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_014|src_data[116] , u0|mm_interconnect_0|cmd_mux_014|src_data[116], SPW_ULIGHT_FIFO, 1
|
1055 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[14] , u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[14], SPW_ULIGHT_FIFO, 1
|
1056 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_014|src_valid~0 , u0|mm_interconnect_0|cmd_mux_014|src_valid~0, SPW_ULIGHT_FIFO, 1
|
1057 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder, SPW_ULIGHT_FIFO, 1
|
1058 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold, SPW_ULIGHT_FIFO, 1
|
1059 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|out_data[16]~3 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|out_data[16]~3, SPW_ULIGHT_FIFO, 1
|
1060 |
|
|
instance = comp, \u0|mm_interconnect_0|router|Equal15~0 , u0|mm_interconnect_0|router|Equal15~0, SPW_ULIGHT_FIFO, 1
|
1061 |
|
|
instance = comp, \u0|mm_interconnect_0|router|Equal15~1 , u0|mm_interconnect_0|router|Equal15~1, SPW_ULIGHT_FIFO, 1
|
1062 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Decoder0~2 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Decoder0~2, SPW_ULIGHT_FIFO, 1
|
1063 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Decoder0~3 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Decoder0~3, SPW_ULIGHT_FIFO, 1
|
1064 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Decoder0~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Decoder0~0, SPW_ULIGHT_FIFO, 1
|
1065 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Decoder0~1 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Decoder0~1, SPW_ULIGHT_FIFO, 1
|
1066 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Add1~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Add1~0, SPW_ULIGHT_FIFO, 1
|
1067 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|log2ceil~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|log2ceil~0, SPW_ULIGHT_FIFO, 1
|
1068 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector26~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector26~0, SPW_ULIGHT_FIFO, 1
|
1069 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Decoder0~4 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Decoder0~4, SPW_ULIGHT_FIFO, 1
|
1070 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|out_data[2]~7 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|out_data[2]~7, SPW_ULIGHT_FIFO, 1
|
1071 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Decoder0~5 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Decoder0~5, SPW_ULIGHT_FIFO, 1
|
1072 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Decoder0~6 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Decoder0~6, SPW_ULIGHT_FIFO, 1
|
1073 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Decoder0~7 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Decoder0~7, SPW_ULIGHT_FIFO, 1
|
1074 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add1~21 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add1~21, SPW_ULIGHT_FIFO, 1
|
1075 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~77 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~77, SPW_ULIGHT_FIFO, 1
|
1076 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Add1~1 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Add1~1, SPW_ULIGHT_FIFO, 1
|
1077 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|out_data[0]~9 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|out_data[0]~9, SPW_ULIGHT_FIFO, 1
|
1078 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Selector5~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Selector5~0, SPW_ULIGHT_FIFO, 1
|
1079 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector29~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector29~0, SPW_ULIGHT_FIFO, 1
|
1080 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[0] , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[0], SPW_ULIGHT_FIFO, 1
|
1081 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add1~17 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add1~17, SPW_ULIGHT_FIFO, 1
|
1082 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|aligned_address_bits[1] , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|aligned_address_bits[1], SPW_ULIGHT_FIFO, 1
|
1083 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~73 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~73, SPW_ULIGHT_FIFO, 1
|
1084 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|out_data[1]~8 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|out_data[1]~8, SPW_ULIGHT_FIFO, 1
|
1085 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector28~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector28~0, SPW_ULIGHT_FIFO, 1
|
1086 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[1] , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[1], SPW_ULIGHT_FIFO, 1
|
1087 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add1~13 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add1~13, SPW_ULIGHT_FIFO, 1
|
1088 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~69 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~69, SPW_ULIGHT_FIFO, 1
|
1089 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector27~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector27~0, SPW_ULIGHT_FIFO, 1
|
1090 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[2] , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[2], SPW_ULIGHT_FIFO, 1
|
1091 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add1~9 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add1~9, SPW_ULIGHT_FIFO, 1
|
1092 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~65 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~65, SPW_ULIGHT_FIFO, 1
|
1093 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector26~1 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector26~1, SPW_ULIGHT_FIFO, 1
|
1094 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[3] , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[3], SPW_ULIGHT_FIFO, 1
|
1095 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~9 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~9, SPW_ULIGHT_FIFO, 1
|
1096 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~5 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~5, SPW_ULIGHT_FIFO, 1
|
1097 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add1~5 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add1~5, SPW_ULIGHT_FIFO, 1
|
1098 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add1~1 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add1~1, SPW_ULIGHT_FIFO, 1
|
1099 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector24~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector24~0, SPW_ULIGHT_FIFO, 1
|
1100 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|out_data[5]~4 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|out_data[5]~4, SPW_ULIGHT_FIFO, 1
|
1101 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector24~1 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector24~1, SPW_ULIGHT_FIFO, 1
|
1102 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[5] , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[5], SPW_ULIGHT_FIFO, 1
|
1103 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~17 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~17, SPW_ULIGHT_FIFO, 1
|
1104 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector23~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector23~0, SPW_ULIGHT_FIFO, 1
|
1105 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[6] , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[6], SPW_ULIGHT_FIFO, 1
|
1106 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~13 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~13, SPW_ULIGHT_FIFO, 1
|
1107 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector22~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector22~0, SPW_ULIGHT_FIFO, 1
|
1108 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[7] , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[7], SPW_ULIGHT_FIFO, 1
|
1109 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~25 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~25, SPW_ULIGHT_FIFO, 1
|
1110 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector21~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector21~0, SPW_ULIGHT_FIFO, 1
|
1111 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[8] , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[8], SPW_ULIGHT_FIFO, 1
|
1112 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~21 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~21, SPW_ULIGHT_FIFO, 1
|
1113 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector20~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector20~0, SPW_ULIGHT_FIFO, 1
|
1114 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[9] , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[9], SPW_ULIGHT_FIFO, 1
|
1115 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~41 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~41, SPW_ULIGHT_FIFO, 1
|
1116 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector19~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector19~0, SPW_ULIGHT_FIFO, 1
|
1117 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[10] , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[10], SPW_ULIGHT_FIFO, 1
|
1118 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~37 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~37, SPW_ULIGHT_FIFO, 1
|
1119 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector18~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector18~0, SPW_ULIGHT_FIFO, 1
|
1120 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[11] , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[11], SPW_ULIGHT_FIFO, 1
|
1121 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~33 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~33, SPW_ULIGHT_FIFO, 1
|
1122 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector17~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector17~0, SPW_ULIGHT_FIFO, 1
|
1123 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[12] , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[12], SPW_ULIGHT_FIFO, 1
|
1124 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~49 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~49, SPW_ULIGHT_FIFO, 1
|
1125 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector16~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector16~0, SPW_ULIGHT_FIFO, 1
|
1126 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[13] , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[13], SPW_ULIGHT_FIFO, 1
|
1127 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~29 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~29, SPW_ULIGHT_FIFO, 1
|
1128 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector15~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector15~0, SPW_ULIGHT_FIFO, 1
|
1129 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[14] , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[14], SPW_ULIGHT_FIFO, 1
|
1130 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~45 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Add0~45, SPW_ULIGHT_FIFO, 1
|
1131 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector14~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|Selector14~0, SPW_ULIGHT_FIFO, 1
|
1132 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[15] , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|align_address_to_size|address_burst[15], SPW_ULIGHT_FIFO, 1
|
1133 |
|
|
instance = comp, \u0|mm_interconnect_0|router|Equal6~2 , u0|mm_interconnect_0|router|Equal6~2, SPW_ULIGHT_FIFO, 1
|
1134 |
|
|
instance = comp, \u0|mm_interconnect_0|router|Equal7~2 , u0|mm_interconnect_0|router|Equal7~2, SPW_ULIGHT_FIFO, 1
|
1135 |
|
|
instance = comp, \u0|mm_interconnect_0|router|Equal7~1 , u0|mm_interconnect_0|router|Equal7~1, SPW_ULIGHT_FIFO, 1
|
1136 |
|
|
instance = comp, \u0|mm_interconnect_0|router|Equal7~3 , u0|mm_interconnect_0|router|Equal7~3, SPW_ULIGHT_FIFO, 1
|
1137 |
|
|
instance = comp, \u0|mm_interconnect_0|router|Equal7~4 , u0|mm_interconnect_0|router|Equal7~4, SPW_ULIGHT_FIFO, 1
|
1138 |
|
|
instance = comp, \u0|mm_interconnect_0|router|Equal6~0 , u0|mm_interconnect_0|router|Equal6~0, SPW_ULIGHT_FIFO, 1
|
1139 |
|
|
instance = comp, \u0|mm_interconnect_0|router|Equal6~1 , u0|mm_interconnect_0|router|Equal6~1, SPW_ULIGHT_FIFO, 1
|
1140 |
|
|
instance = comp, \u0|mm_interconnect_0|router|src_data[103]~0 , u0|mm_interconnect_0|router|src_data[103]~0, SPW_ULIGHT_FIFO, 1
|
1141 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_dest_id[3] , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_dest_id[3], SPW_ULIGHT_FIFO, 1
|
1142 |
|
|
instance = comp, \u0|mm_interconnect_0|router|Equal14~1 , u0|mm_interconnect_0|router|Equal14~1, SPW_ULIGHT_FIFO, 1
|
1143 |
|
|
instance = comp, \u0|mm_interconnect_0|router|Equal21~0 , u0|mm_interconnect_0|router|Equal21~0, SPW_ULIGHT_FIFO, 1
|
1144 |
|
|
instance = comp, \u0|mm_interconnect_0|router|Equal20~0 , u0|mm_interconnect_0|router|Equal20~0, SPW_ULIGHT_FIFO, 1
|
1145 |
|
|
instance = comp, \u0|mm_interconnect_0|router|src_data[102]~6 , u0|mm_interconnect_0|router|src_data[102]~6, SPW_ULIGHT_FIFO, 1
|
1146 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_dest_id[2] , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_dest_id[2], SPW_ULIGHT_FIFO, 1
|
1147 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|Equal0~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|Equal0~0, SPW_ULIGHT_FIFO, 1
|
1148 |
|
|
instance = comp, \u0|mm_interconnect_0|router|src_data[100]~2 , u0|mm_interconnect_0|router|src_data[100]~2, SPW_ULIGHT_FIFO, 1
|
1149 |
|
|
instance = comp, \u0|mm_interconnect_0|router|src_data[100]~3 , u0|mm_interconnect_0|router|src_data[100]~3, SPW_ULIGHT_FIFO, 1
|
1150 |
|
|
instance = comp, \u0|mm_interconnect_0|router|src_data[100]~1 , u0|mm_interconnect_0|router|src_data[100]~1, SPW_ULIGHT_FIFO, 1
|
1151 |
|
|
instance = comp, \u0|mm_interconnect_0|router|src_data[100]~7 , u0|mm_interconnect_0|router|src_data[100]~7, SPW_ULIGHT_FIFO, 1
|
1152 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_dest_id[0] , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_dest_id[0], SPW_ULIGHT_FIFO, 1
|
1153 |
|
|
instance = comp, \u0|mm_interconnect_0|router|src_data[104]~9 , u0|mm_interconnect_0|router|src_data[104]~9, SPW_ULIGHT_FIFO, 1
|
1154 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_dest_id[4] , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_dest_id[4], SPW_ULIGHT_FIFO, 1
|
1155 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|Equal0~2 , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|Equal0~2, SPW_ULIGHT_FIFO, 1
|
1156 |
|
|
instance = comp, \u0|mm_interconnect_0|router|src_data[101]~8 , u0|mm_interconnect_0|router|src_data[101]~8, SPW_ULIGHT_FIFO, 1
|
1157 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_dest_id[1] , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_dest_id[1], SPW_ULIGHT_FIFO, 1
|
1158 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|Equal0~1 , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|Equal0~1, SPW_ULIGHT_FIFO, 1
|
1159 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|Equal0~3 , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|Equal0~3, SPW_ULIGHT_FIFO, 1
|
1160 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|internal_valid~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|internal_valid~0, SPW_ULIGHT_FIFO, 1
|
1161 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_channel[9] , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_channel[9], SPW_ULIGHT_FIFO, 1
|
1162 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux|src9_valid~0 , u0|mm_interconnect_0|cmd_demux|src9_valid~0, SPW_ULIGHT_FIFO, 1
|
1163 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux|src9_valid~1 , u0|mm_interconnect_0|cmd_demux|src9_valid~1, SPW_ULIGHT_FIFO, 1
|
1164 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_009|arb|top_priority_reg[0]~2 , u0|mm_interconnect_0|cmd_mux_009|arb|top_priority_reg[0]~2, SPW_ULIGHT_FIFO, 1
|
1165 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[9] , u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[9], SPW_ULIGHT_FIFO, 1
|
1166 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux_001|src9_valid~0 , u0|mm_interconnect_0|cmd_demux_001|src9_valid~0, SPW_ULIGHT_FIFO, 1
|
1167 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_009|arb|top_priority_reg~0 , u0|mm_interconnect_0|cmd_mux_009|arb|top_priority_reg~0, SPW_ULIGHT_FIFO, 1
|
1168 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_009|src_payload[0] , u0|mm_interconnect_0|cmd_mux_009|src_payload[0], SPW_ULIGHT_FIFO, 1
|
1169 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0, SPW_ULIGHT_FIFO, 1
|
1170 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder, SPW_ULIGHT_FIFO, 1
|
1171 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2] , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
1172 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|burst_bytecount[2] , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|burst_bytecount[2], SPW_ULIGHT_FIFO, 1
|
1173 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|write_cp_data[74]~3 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|write_cp_data[74]~3, SPW_ULIGHT_FIFO, 1
|
1174 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~5 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~5, SPW_ULIGHT_FIFO, 1
|
1175 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~6 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~6, SPW_ULIGHT_FIFO, 1
|
1176 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2] , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2], SPW_ULIGHT_FIFO, 1
|
1177 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3] , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3], SPW_ULIGHT_FIFO, 1
|
1178 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~3 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~3, SPW_ULIGHT_FIFO, 1
|
1179 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~4 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~4, SPW_ULIGHT_FIFO, 1
|
1180 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Add7~1 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Add7~1, SPW_ULIGHT_FIFO, 1
|
1181 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|burst_bytecount[4] , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|burst_bytecount[4], SPW_ULIGHT_FIFO, 1
|
1182 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|write_cp_data[76]~1 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|write_cp_data[76]~1, SPW_ULIGHT_FIFO, 1
|
1183 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4] , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4], SPW_ULIGHT_FIFO, 1
|
1184 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1, SPW_ULIGHT_FIFO, 1
|
1185 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~2 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~2, SPW_ULIGHT_FIFO, 1
|
1186 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~0 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~0, SPW_ULIGHT_FIFO, 1
|
1187 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5] , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5], SPW_ULIGHT_FIFO, 1
|
1188 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0, SPW_ULIGHT_FIFO, 1
|
1189 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~1 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~1, SPW_ULIGHT_FIFO, 1
|
1190 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Add7~3 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|Add7~3, SPW_ULIGHT_FIFO, 1
|
1191 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|burst_bytecount[6] , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|burst_bytecount[6], SPW_ULIGHT_FIFO, 1
|
1192 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|write_cp_data[78]~4 , u0|mm_interconnect_0|hps_0_h2f_axi_master_agent|write_cp_data[78]~4, SPW_ULIGHT_FIFO, 1
|
1193 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~7 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~7, SPW_ULIGHT_FIFO, 1
|
1194 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6] , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6], SPW_ULIGHT_FIFO, 1
|
1195 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~8 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~8, SPW_ULIGHT_FIFO, 1
|
1196 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0, SPW_ULIGHT_FIFO, 1
|
1197 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg, SPW_ULIGHT_FIFO, 1
|
1198 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder, SPW_ULIGHT_FIFO, 1
|
1199 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold, SPW_ULIGHT_FIFO, 1
|
1200 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~2 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~2, SPW_ULIGHT_FIFO, 1
|
1201 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~1 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~1, SPW_ULIGHT_FIFO, 1
|
1202 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_009|src_valid~0 , u0|mm_interconnect_0|cmd_mux_009|src_valid~0, SPW_ULIGHT_FIFO, 1
|
1203 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_009|update_grant~0 , u0|mm_interconnect_0|cmd_mux_009|update_grant~0, SPW_ULIGHT_FIFO, 1
|
1204 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_009|packet_in_progress~0 , u0|mm_interconnect_0|cmd_mux_009|packet_in_progress~0, SPW_ULIGHT_FIFO, 1
|
1205 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_009|packet_in_progress , u0|mm_interconnect_0|cmd_mux_009|packet_in_progress, SPW_ULIGHT_FIFO, 1
|
1206 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_009|arb|top_priority_reg~1 , u0|mm_interconnect_0|cmd_mux_009|arb|top_priority_reg~1, SPW_ULIGHT_FIFO, 1
|
1207 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_009|arb|top_priority_reg[0] , u0|mm_interconnect_0|cmd_mux_009|arb|top_priority_reg[0], SPW_ULIGHT_FIFO, 1
|
1208 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_009|arb|top_priority_reg[1] , u0|mm_interconnect_0|cmd_mux_009|arb|top_priority_reg[1], SPW_ULIGHT_FIFO, 1
|
1209 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_009|arb|grant[0]~1 , u0|mm_interconnect_0|cmd_mux_009|arb|grant[0]~1, SPW_ULIGHT_FIFO, 1
|
1210 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_009|saved_grant[0]~feeder , u0|mm_interconnect_0|cmd_mux_009|saved_grant[0]~feeder, SPW_ULIGHT_FIFO, 1
|
1211 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_009|saved_grant[0] , u0|mm_interconnect_0|cmd_mux_009|saved_grant[0], SPW_ULIGHT_FIFO, 1
|
1212 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_009|src_valid~1 , u0|mm_interconnect_0|cmd_mux_009|src_valid~1, SPW_ULIGHT_FIFO, 1
|
1213 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd, SPW_ULIGHT_FIFO, 1
|
1214 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66] , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66], SPW_ULIGHT_FIFO, 1
|
1215 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[1][66] , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[1][66], SPW_ULIGHT_FIFO, 1
|
1216 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem~3 , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem~3, SPW_ULIGHT_FIFO, 1
|
1217 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|always0~0 , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|always0~0, SPW_ULIGHT_FIFO, 1
|
1218 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[0][66] , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[0][66], SPW_ULIGHT_FIFO, 1
|
1219 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[1][78] , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[1][78], SPW_ULIGHT_FIFO, 1
|
1220 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0, SPW_ULIGHT_FIFO, 1
|
1221 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~4 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~4, SPW_ULIGHT_FIFO, 1
|
1222 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2] , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
1223 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~1 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~1, SPW_ULIGHT_FIFO, 1
|
1224 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3] , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3], SPW_ULIGHT_FIFO, 1
|
1225 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~2 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~2, SPW_ULIGHT_FIFO, 1
|
1226 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4] , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4], SPW_ULIGHT_FIFO, 1
|
1227 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0, SPW_ULIGHT_FIFO, 1
|
1228 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~3 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~3, SPW_ULIGHT_FIFO, 1
|
1229 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5] , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5], SPW_ULIGHT_FIFO, 1
|
1230 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~5 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~5, SPW_ULIGHT_FIFO, 1
|
1231 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6] , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6], SPW_ULIGHT_FIFO, 1
|
1232 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem~9 , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem~9, SPW_ULIGHT_FIFO, 1
|
1233 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[0][78] , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[0][78], SPW_ULIGHT_FIFO, 1
|
1234 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[1][76] , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[1][76], SPW_ULIGHT_FIFO, 1
|
1235 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem~7 , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem~7, SPW_ULIGHT_FIFO, 1
|
1236 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[0][76] , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[0][76], SPW_ULIGHT_FIFO, 1
|
1237 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[1][75] , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[1][75], SPW_ULIGHT_FIFO, 1
|
1238 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem~6 , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem~6, SPW_ULIGHT_FIFO, 1
|
1239 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[0][75] , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[0][75], SPW_ULIGHT_FIFO, 1
|
1240 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[1][77] , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[1][77], SPW_ULIGHT_FIFO, 1
|
1241 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem~8 , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem~8, SPW_ULIGHT_FIFO, 1
|
1242 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[0][77] , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[0][77], SPW_ULIGHT_FIFO, 1
|
1243 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent|uncompressor|last_packet_beat~0 , u0|mm_interconnect_0|link_disable_s1_agent|uncompressor|last_packet_beat~0, SPW_ULIGHT_FIFO, 1
|
1244 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[1][130] , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[1][130], SPW_ULIGHT_FIFO, 1
|
1245 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg, SPW_ULIGHT_FIFO, 1
|
1246 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0, SPW_ULIGHT_FIFO, 1
|
1247 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem~4 , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem~4, SPW_ULIGHT_FIFO, 1
|
1248 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[0][130] , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[0][130], SPW_ULIGHT_FIFO, 1
|
1249 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_mux|src_payload~4 , u0|mm_interconnect_0|rsp_mux|src_payload~4, SPW_ULIGHT_FIFO, 1
|
1250 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|arb|top_priority_reg[0]~2 , u0|mm_interconnect_0|cmd_mux_008|arb|top_priority_reg[0]~2, SPW_ULIGHT_FIFO, 1
|
1251 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_channel[8] , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_channel[8], SPW_ULIGHT_FIFO, 1
|
1252 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux|src8_valid~0 , u0|mm_interconnect_0|cmd_demux|src8_valid~0, SPW_ULIGHT_FIFO, 1
|
1253 |
|
|
instance = comp, \u0|mm_interconnect_0|router_001|Equal14~1 , u0|mm_interconnect_0|router_001|Equal14~1, SPW_ULIGHT_FIFO, 1
|
1254 |
|
|
instance = comp, \u0|mm_interconnect_0|router_001|Equal14~2 , u0|mm_interconnect_0|router_001|Equal14~2, SPW_ULIGHT_FIFO, 1
|
1255 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[8] , u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[8], SPW_ULIGHT_FIFO, 1
|
1256 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux_001|src8_valid~0 , u0|mm_interconnect_0|cmd_demux_001|src8_valid~0, SPW_ULIGHT_FIFO, 1
|
1257 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|arb|top_priority_reg[1] , u0|mm_interconnect_0|cmd_mux_008|arb|top_priority_reg[1], SPW_ULIGHT_FIFO, 1
|
1258 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|arb|grant[0]~1 , u0|mm_interconnect_0|cmd_mux_008|arb|grant[0]~1, SPW_ULIGHT_FIFO, 1
|
1259 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder, SPW_ULIGHT_FIFO, 1
|
1260 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor0~0 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor0~0, SPW_ULIGHT_FIFO, 1
|
1261 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|src_valid~0 , u0|mm_interconnect_0|cmd_mux_008|src_valid~0, SPW_ULIGHT_FIFO, 1
|
1262 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_translator|waitrequest_reset_override~feeder , u0|mm_interconnect_0|auto_start_s1_translator|waitrequest_reset_override~feeder, SPW_ULIGHT_FIFO, 1
|
1263 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_translator|waitrequest_reset_override , u0|mm_interconnect_0|auto_start_s1_translator|waitrequest_reset_override, SPW_ULIGHT_FIFO, 1
|
1264 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[68]~feeder , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[68]~feeder, SPW_ULIGHT_FIFO, 1
|
1265 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[68] , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[68], SPW_ULIGHT_FIFO, 1
|
1266 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|local_write , u0|mm_interconnect_0|auto_start_s1_agent|local_write, SPW_ULIGHT_FIFO, 1
|
1267 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66] , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66], SPW_ULIGHT_FIFO, 1
|
1268 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][66] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][66], SPW_ULIGHT_FIFO, 1
|
1269 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~3 , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~3, SPW_ULIGHT_FIFO, 1
|
1270 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][66]~feeder , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][66]~feeder, SPW_ULIGHT_FIFO, 1
|
1271 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][74] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][74], SPW_ULIGHT_FIFO, 1
|
1272 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5] , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5], SPW_ULIGHT_FIFO, 1
|
1273 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0, SPW_ULIGHT_FIFO, 1
|
1274 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~1 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~1, SPW_ULIGHT_FIFO, 1
|
1275 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3] , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3], SPW_ULIGHT_FIFO, 1
|
1276 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~3 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~3, SPW_ULIGHT_FIFO, 1
|
1277 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4] , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4], SPW_ULIGHT_FIFO, 1
|
1278 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0, SPW_ULIGHT_FIFO, 1
|
1279 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~2 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~2, SPW_ULIGHT_FIFO, 1
|
1280 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6] , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6], SPW_ULIGHT_FIFO, 1
|
1281 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~5 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~5, SPW_ULIGHT_FIFO, 1
|
1282 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideOr0 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideOr0, SPW_ULIGHT_FIFO, 1
|
1283 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder, SPW_ULIGHT_FIFO, 1
|
1284 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold, SPW_ULIGHT_FIFO, 1
|
1285 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~12 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~12, SPW_ULIGHT_FIFO, 1
|
1286 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11, SPW_ULIGHT_FIFO, 1
|
1287 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_valid , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_valid, SPW_ULIGHT_FIFO, 1
|
1288 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~15 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~15, SPW_ULIGHT_FIFO, 1
|
1289 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE, SPW_ULIGHT_FIFO, 1
|
1290 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9, SPW_ULIGHT_FIFO, 1
|
1291 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10, SPW_ULIGHT_FIFO, 1
|
1292 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~13 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~13, SPW_ULIGHT_FIFO, 1
|
1293 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS, SPW_ULIGHT_FIFO, 1
|
1294 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~4 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~4, SPW_ULIGHT_FIFO, 1
|
1295 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2] , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
1296 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~5 , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~5, SPW_ULIGHT_FIFO, 1
|
1297 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][74] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][74], SPW_ULIGHT_FIFO, 1
|
1298 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_busy , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_busy, SPW_ULIGHT_FIFO, 1
|
1299 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|last_packet_beat~2 , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|last_packet_beat~2, SPW_ULIGHT_FIFO, 1
|
1300 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][78] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][78], SPW_ULIGHT_FIFO, 1
|
1301 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~9 , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~9, SPW_ULIGHT_FIFO, 1
|
1302 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][78] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][78], SPW_ULIGHT_FIFO, 1
|
1303 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][75] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][75], SPW_ULIGHT_FIFO, 1
|
1304 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~6 , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~6, SPW_ULIGHT_FIFO, 1
|
1305 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][75] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][75], SPW_ULIGHT_FIFO, 1
|
1306 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][76] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][76], SPW_ULIGHT_FIFO, 1
|
1307 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~7 , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~7, SPW_ULIGHT_FIFO, 1
|
1308 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][76] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][76], SPW_ULIGHT_FIFO, 1
|
1309 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][77] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][77], SPW_ULIGHT_FIFO, 1
|
1310 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~8 , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~8, SPW_ULIGHT_FIFO, 1
|
1311 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][77]~feeder , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][77]~feeder, SPW_ULIGHT_FIFO, 1
|
1312 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][77] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][77], SPW_ULIGHT_FIFO, 1
|
1313 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|Add1~0 , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|Add1~0, SPW_ULIGHT_FIFO, 1
|
1314 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|Add1~1 , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|Add1~1, SPW_ULIGHT_FIFO, 1
|
1315 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|Add0~2 , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|Add0~2, SPW_ULIGHT_FIFO, 1
|
1316 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter~4 , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter~4, SPW_ULIGHT_FIFO, 1
|
1317 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter[5] , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter[5], SPW_ULIGHT_FIFO, 1
|
1318 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|Add0~1 , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|Add0~1, SPW_ULIGHT_FIFO, 1
|
1319 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter~3 , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter~3, SPW_ULIGHT_FIFO, 1
|
1320 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter[6] , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter[6], SPW_ULIGHT_FIFO, 1
|
1321 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter~6 , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter~6, SPW_ULIGHT_FIFO, 1
|
1322 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter[7] , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter[7], SPW_ULIGHT_FIFO, 1
|
1323 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter~0 , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter~0, SPW_ULIGHT_FIFO, 1
|
1324 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter~5 , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter~5, SPW_ULIGHT_FIFO, 1
|
1325 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter[2] , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter[2], SPW_ULIGHT_FIFO, 1
|
1326 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter~1 , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter~1, SPW_ULIGHT_FIFO, 1
|
1327 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter[3] , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter[3], SPW_ULIGHT_FIFO, 1
|
1328 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|Add0~0 , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|Add0~0, SPW_ULIGHT_FIFO, 1
|
1329 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter~2 , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter~2, SPW_ULIGHT_FIFO, 1
|
1330 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter[4] , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|burst_uncompress_byte_counter[4], SPW_ULIGHT_FIFO, 1
|
1331 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|last_packet_beat~1 , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|last_packet_beat~1, SPW_ULIGHT_FIFO, 1
|
1332 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|last_packet_beat~0 , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|last_packet_beat~0, SPW_ULIGHT_FIFO, 1
|
1333 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|last_packet_beat , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|last_packet_beat, SPW_ULIGHT_FIFO, 1
|
1334 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|nonposted_write_endofpacket~0 , u0|mm_interconnect_0|auto_start_s1_agent|nonposted_write_endofpacket~0, SPW_ULIGHT_FIFO, 1
|
1335 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|src_data[32] , u0|mm_interconnect_0|cmd_mux_008|src_data[32], SPW_ULIGHT_FIFO, 1
|
1336 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0] , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0], SPW_ULIGHT_FIFO, 1
|
1337 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|src_data[35] , u0|mm_interconnect_0|cmd_mux_008|src_data[35], SPW_ULIGHT_FIFO, 1
|
1338 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3] , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3], SPW_ULIGHT_FIFO, 1
|
1339 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|src_data[88] , u0|mm_interconnect_0|cmd_mux_008|src_data[88], SPW_ULIGHT_FIFO, 1
|
1340 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|src_data[87] , u0|mm_interconnect_0|cmd_mux_008|src_data[87], SPW_ULIGHT_FIFO, 1
|
1341 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0, SPW_ULIGHT_FIFO, 1
|
1342 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg, SPW_ULIGHT_FIFO, 1
|
1343 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|src_data[33] , u0|mm_interconnect_0|cmd_mux_008|src_data[33], SPW_ULIGHT_FIFO, 1
|
1344 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1] , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1], SPW_ULIGHT_FIFO, 1
|
1345 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|src_data[34] , u0|mm_interconnect_0|cmd_mux_008|src_data[34], SPW_ULIGHT_FIFO, 1
|
1346 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2] , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2], SPW_ULIGHT_FIFO, 1
|
1347 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|WideOr0~0 , u0|mm_interconnect_0|auto_start_s1_agent|WideOr0~0, SPW_ULIGHT_FIFO, 1
|
1348 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|cp_ready~4 , u0|mm_interconnect_0|auto_start_s1_agent|cp_ready~4, SPW_ULIGHT_FIFO, 1
|
1349 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|write~0 , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|write~0, SPW_ULIGHT_FIFO, 1
|
1350 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem_used[0]~1 , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem_used[0]~1, SPW_ULIGHT_FIFO, 1
|
1351 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem_used[0] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem_used[0], SPW_ULIGHT_FIFO, 1
|
1352 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|always0~0 , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|always0~0, SPW_ULIGHT_FIFO, 1
|
1353 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][66] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][66], SPW_ULIGHT_FIFO, 1
|
1354 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][69] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][69], SPW_ULIGHT_FIFO, 1
|
1355 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~1 , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~1, SPW_ULIGHT_FIFO, 1
|
1356 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][69]~feeder , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][69]~feeder, SPW_ULIGHT_FIFO, 1
|
1357 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][69] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][69], SPW_ULIGHT_FIFO, 1
|
1358 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][68] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][68], SPW_ULIGHT_FIFO, 1
|
1359 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~2 , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~2, SPW_ULIGHT_FIFO, 1
|
1360 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][68]~feeder , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][68]~feeder, SPW_ULIGHT_FIFO, 1
|
1361 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][68] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][68], SPW_ULIGHT_FIFO, 1
|
1362 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_demux_008|src0_valid~0 , u0|mm_interconnect_0|rsp_demux_008|src0_valid~0, SPW_ULIGHT_FIFO, 1
|
1363 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|always0~0 , u0|mm_interconnect_0|auto_start_s1_agent|uncompressor|always0~0, SPW_ULIGHT_FIFO, 1
|
1364 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem_used[1]~0 , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem_used[1]~0, SPW_ULIGHT_FIFO, 1
|
1365 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem_used[1] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem_used[1], SPW_ULIGHT_FIFO, 1
|
1366 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|m0_write , u0|mm_interconnect_0|auto_start_s1_agent|m0_write, SPW_ULIGHT_FIFO, 1
|
1367 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_translator|read_latency_shift_reg~0 , u0|mm_interconnect_0|auto_start_s1_translator|read_latency_shift_reg~0, SPW_ULIGHT_FIFO, 1
|
1368 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_translator|wait_latency_counter[1]~0 , u0|mm_interconnect_0|auto_start_s1_translator|wait_latency_counter[1]~0, SPW_ULIGHT_FIFO, 1
|
1369 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_translator|wait_latency_counter~2 , u0|mm_interconnect_0|auto_start_s1_translator|wait_latency_counter~2, SPW_ULIGHT_FIFO, 1
|
1370 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_translator|wait_latency_counter[0] , u0|mm_interconnect_0|auto_start_s1_translator|wait_latency_counter[0], SPW_ULIGHT_FIFO, 1
|
1371 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_translator|wait_latency_counter~1 , u0|mm_interconnect_0|auto_start_s1_translator|wait_latency_counter~1, SPW_ULIGHT_FIFO, 1
|
1372 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_translator|wait_latency_counter[1] , u0|mm_interconnect_0|auto_start_s1_translator|wait_latency_counter[1], SPW_ULIGHT_FIFO, 1
|
1373 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|cp_ready~0 , u0|mm_interconnect_0|auto_start_s1_agent|cp_ready~0, SPW_ULIGHT_FIFO, 1
|
1374 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0, SPW_ULIGHT_FIFO, 1
|
1375 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd, SPW_ULIGHT_FIFO, 1
|
1376 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero, SPW_ULIGHT_FIFO, 1
|
1377 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|cp_ready~1 , u0|mm_interconnect_0|auto_start_s1_agent|cp_ready~1, SPW_ULIGHT_FIFO, 1
|
1378 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|cp_ready~2 , u0|mm_interconnect_0|auto_start_s1_agent|cp_ready~2, SPW_ULIGHT_FIFO, 1
|
1379 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|cp_ready~3 , u0|mm_interconnect_0|auto_start_s1_agent|cp_ready~3, SPW_ULIGHT_FIFO, 1
|
1380 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|src_payload[0] , u0|mm_interconnect_0|cmd_mux_008|src_payload[0], SPW_ULIGHT_FIFO, 1
|
1381 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg, SPW_ULIGHT_FIFO, 1
|
1382 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0, SPW_ULIGHT_FIFO, 1
|
1383 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1, SPW_ULIGHT_FIFO, 1
|
1384 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2, SPW_ULIGHT_FIFO, 1
|
1385 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~8 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~8, SPW_ULIGHT_FIFO, 1
|
1386 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_COMP_TRANS , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_COMP_TRANS, SPW_ULIGHT_FIFO, 1
|
1387 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_valid~0 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_valid~0, SPW_ULIGHT_FIFO, 1
|
1388 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_valid_reg , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_valid_reg, SPW_ULIGHT_FIFO, 1
|
1389 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|load_next_out_cmd , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|load_next_out_cmd, SPW_ULIGHT_FIFO, 1
|
1390 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2] , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
1391 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~3 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~3, SPW_ULIGHT_FIFO, 1
|
1392 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~4 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~4, SPW_ULIGHT_FIFO, 1
|
1393 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2] , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2], SPW_ULIGHT_FIFO, 1
|
1394 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~1 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~1, SPW_ULIGHT_FIFO, 1
|
1395 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~2 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~2, SPW_ULIGHT_FIFO, 1
|
1396 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3] , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3], SPW_ULIGHT_FIFO, 1
|
1397 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4] , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4], SPW_ULIGHT_FIFO, 1
|
1398 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0, SPW_ULIGHT_FIFO, 1
|
1399 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~0 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~0, SPW_ULIGHT_FIFO, 1
|
1400 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~5 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~5, SPW_ULIGHT_FIFO, 1
|
1401 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5] , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5], SPW_ULIGHT_FIFO, 1
|
1402 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1, SPW_ULIGHT_FIFO, 1
|
1403 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~6 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~6, SPW_ULIGHT_FIFO, 1
|
1404 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6] , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6], SPW_ULIGHT_FIFO, 1
|
1405 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~7 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~7, SPW_ULIGHT_FIFO, 1
|
1406 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~8 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~8, SPW_ULIGHT_FIFO, 1
|
1407 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0, SPW_ULIGHT_FIFO, 1
|
1408 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg, SPW_ULIGHT_FIFO, 1
|
1409 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0, SPW_ULIGHT_FIFO, 1
|
1410 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~14 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~14, SPW_ULIGHT_FIFO, 1
|
1411 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST, SPW_ULIGHT_FIFO, 1
|
1412 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~2 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~2, SPW_ULIGHT_FIFO, 1
|
1413 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|packet_in_progress~0 , u0|mm_interconnect_0|cmd_mux_008|packet_in_progress~0, SPW_ULIGHT_FIFO, 1
|
1414 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|packet_in_progress , u0|mm_interconnect_0|cmd_mux_008|packet_in_progress, SPW_ULIGHT_FIFO, 1
|
1415 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|update_grant~0 , u0|mm_interconnect_0|cmd_mux_008|update_grant~0, SPW_ULIGHT_FIFO, 1
|
1416 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|saved_grant[0] , u0|mm_interconnect_0|cmd_mux_008|saved_grant[0], SPW_ULIGHT_FIFO, 1
|
1417 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|src_valid~1 , u0|mm_interconnect_0|cmd_mux_008|src_valid~1, SPW_ULIGHT_FIFO, 1
|
1418 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|arb|top_priority_reg~0 , u0|mm_interconnect_0|cmd_mux_008|arb|top_priority_reg~0, SPW_ULIGHT_FIFO, 1
|
1419 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~1 , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~1, SPW_ULIGHT_FIFO, 1
|
1420 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|arb|top_priority_reg~1 , u0|mm_interconnect_0|cmd_mux_008|arb|top_priority_reg~1, SPW_ULIGHT_FIFO, 1
|
1421 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|arb|top_priority_reg[0] , u0|mm_interconnect_0|cmd_mux_008|arb|top_priority_reg[0], SPW_ULIGHT_FIFO, 1
|
1422 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|arb|grant[1]~0 , u0|mm_interconnect_0|cmd_mux_008|arb|grant[1]~0, SPW_ULIGHT_FIFO, 1
|
1423 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|saved_grant[1] , u0|mm_interconnect_0|cmd_mux_008|saved_grant[1], SPW_ULIGHT_FIFO, 1
|
1424 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69] , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69], SPW_ULIGHT_FIFO, 1
|
1425 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|m0_read~0 , u0|mm_interconnect_0|auto_start_s1_agent|m0_read~0, SPW_ULIGHT_FIFO, 1
|
1426 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][129] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][129], SPW_ULIGHT_FIFO, 1
|
1427 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~0 , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~0, SPW_ULIGHT_FIFO, 1
|
1428 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][129] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][129], SPW_ULIGHT_FIFO, 1
|
1429 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_translator|read_latency_shift_reg~1 , u0|mm_interconnect_0|auto_start_s1_translator|read_latency_shift_reg~1, SPW_ULIGHT_FIFO, 1
|
1430 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_translator|read_latency_shift_reg[0] , u0|mm_interconnect_0|auto_start_s1_translator|read_latency_shift_reg[0], SPW_ULIGHT_FIFO, 1
|
1431 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rdata_fifo|read~0 , u0|mm_interconnect_0|auto_start_s1_agent_rdata_fifo|read~0, SPW_ULIGHT_FIFO, 1
|
1432 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rdata_fifo|read~1 , u0|mm_interconnect_0|auto_start_s1_agent_rdata_fifo|read~1, SPW_ULIGHT_FIFO, 1
|
1433 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rdata_fifo|mem_used[1]~1 , u0|mm_interconnect_0|auto_start_s1_agent_rdata_fifo|mem_used[1]~1, SPW_ULIGHT_FIFO, 1
|
1434 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rdata_fifo|mem_used[1] , u0|mm_interconnect_0|auto_start_s1_agent_rdata_fifo|mem_used[1], SPW_ULIGHT_FIFO, 1
|
1435 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rdata_fifo|mem_used[0]~0 , u0|mm_interconnect_0|auto_start_s1_agent_rdata_fifo|mem_used[0]~0, SPW_ULIGHT_FIFO, 1
|
1436 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rdata_fifo|mem_used[0] , u0|mm_interconnect_0|auto_start_s1_agent_rdata_fifo|mem_used[0], SPW_ULIGHT_FIFO, 1
|
1437 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|comb~0 , u0|mm_interconnect_0|auto_start_s1_agent|comb~0, SPW_ULIGHT_FIFO, 1
|
1438 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][130] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][130], SPW_ULIGHT_FIFO, 1
|
1439 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~4 , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~4, SPW_ULIGHT_FIFO, 1
|
1440 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][130] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][130], SPW_ULIGHT_FIFO, 1
|
1441 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_mux|src_payload~3 , u0|mm_interconnect_0|rsp_mux|src_payload~3, SPW_ULIGHT_FIFO, 1
|
1442 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent|rp_valid , u0|mm_interconnect_0|auto_start_s1_agent|rp_valid, SPW_ULIGHT_FIFO, 1
|
1443 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_demux_008|src0_valid~1 , u0|mm_interconnect_0|rsp_demux_008|src0_valid~1, SPW_ULIGHT_FIFO, 1
|
1444 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder, SPW_ULIGHT_FIFO, 1
|
1445 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold, SPW_ULIGHT_FIFO, 1
|
1446 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_010|src_valid~1 , u0|mm_interconnect_0|cmd_mux_010|src_valid~1, SPW_ULIGHT_FIFO, 1
|
1447 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~12 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~12, SPW_ULIGHT_FIFO, 1
|
1448 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0, SPW_ULIGHT_FIFO, 1
|
1449 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder, SPW_ULIGHT_FIFO, 1
|
1450 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2] , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
1451 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3] , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3], SPW_ULIGHT_FIFO, 1
|
1452 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~4 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~4, SPW_ULIGHT_FIFO, 1
|
1453 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2] , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
1454 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~3 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~3, SPW_ULIGHT_FIFO, 1
|
1455 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5] , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5], SPW_ULIGHT_FIFO, 1
|
1456 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0, SPW_ULIGHT_FIFO, 1
|
1457 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~1 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~1, SPW_ULIGHT_FIFO, 1
|
1458 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6] , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6], SPW_ULIGHT_FIFO, 1
|
1459 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~5 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~5, SPW_ULIGHT_FIFO, 1
|
1460 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideOr0 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideOr0, SPW_ULIGHT_FIFO, 1
|
1461 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor0~0 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor0~0, SPW_ULIGHT_FIFO, 1
|
1462 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~2 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~2, SPW_ULIGHT_FIFO, 1
|
1463 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_010|src_valid~0 , u0|mm_interconnect_0|cmd_mux_010|src_valid~0, SPW_ULIGHT_FIFO, 1
|
1464 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0, SPW_ULIGHT_FIFO, 1
|
1465 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd, SPW_ULIGHT_FIFO, 1
|
1466 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero, SPW_ULIGHT_FIFO, 1
|
1467 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_valid , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_valid, SPW_ULIGHT_FIFO, 1
|
1468 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~15 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~15, SPW_ULIGHT_FIFO, 1
|
1469 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE, SPW_ULIGHT_FIFO, 1
|
1470 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_010|src_payload[0] , u0|mm_interconnect_0|cmd_mux_010|src_payload[0], SPW_ULIGHT_FIFO, 1
|
1471 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg, SPW_ULIGHT_FIFO, 1
|
1472 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0, SPW_ULIGHT_FIFO, 1
|
1473 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1, SPW_ULIGHT_FIFO, 1
|
1474 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|cp_ready~2 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|cp_ready~2, SPW_ULIGHT_FIFO, 1
|
1475 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_010|src_data[33] , u0|mm_interconnect_0|cmd_mux_010|src_data[33], SPW_ULIGHT_FIFO, 1
|
1476 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1] , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1], SPW_ULIGHT_FIFO, 1
|
1477 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_010|src_data[32] , u0|mm_interconnect_0|cmd_mux_010|src_data[32], SPW_ULIGHT_FIFO, 1
|
1478 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0] , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0], SPW_ULIGHT_FIFO, 1
|
1479 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_010|src_data[35] , u0|mm_interconnect_0|cmd_mux_010|src_data[35], SPW_ULIGHT_FIFO, 1
|
1480 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3] , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3], SPW_ULIGHT_FIFO, 1
|
1481 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|cp_ready~1 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|cp_ready~1, SPW_ULIGHT_FIFO, 1
|
1482 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_010|src_data[87] , u0|mm_interconnect_0|cmd_mux_010|src_data[87], SPW_ULIGHT_FIFO, 1
|
1483 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_010|src_data[88] , u0|mm_interconnect_0|cmd_mux_010|src_data[88], SPW_ULIGHT_FIFO, 1
|
1484 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0, SPW_ULIGHT_FIFO, 1
|
1485 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg, SPW_ULIGHT_FIFO, 1
|
1486 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|cp_ready~3 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|cp_ready~3, SPW_ULIGHT_FIFO, 1
|
1487 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2, SPW_ULIGHT_FIFO, 1
|
1488 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~7 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~7, SPW_ULIGHT_FIFO, 1
|
1489 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~8 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~8, SPW_ULIGHT_FIFO, 1
|
1490 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2] , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2], SPW_ULIGHT_FIFO, 1
|
1491 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4] , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4], SPW_ULIGHT_FIFO, 1
|
1492 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~5 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~5, SPW_ULIGHT_FIFO, 1
|
1493 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~6 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~6, SPW_ULIGHT_FIFO, 1
|
1494 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3] , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3], SPW_ULIGHT_FIFO, 1
|
1495 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1, SPW_ULIGHT_FIFO, 1
|
1496 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~4 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~4, SPW_ULIGHT_FIFO, 1
|
1497 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~2 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~2, SPW_ULIGHT_FIFO, 1
|
1498 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~0 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~0, SPW_ULIGHT_FIFO, 1
|
1499 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0, SPW_ULIGHT_FIFO, 1
|
1500 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~1 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~1, SPW_ULIGHT_FIFO, 1
|
1501 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5] , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5], SPW_ULIGHT_FIFO, 1
|
1502 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6] , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6], SPW_ULIGHT_FIFO, 1
|
1503 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~3 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~3, SPW_ULIGHT_FIFO, 1
|
1504 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0, SPW_ULIGHT_FIFO, 1
|
1505 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg, SPW_ULIGHT_FIFO, 1
|
1506 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0, SPW_ULIGHT_FIFO, 1
|
1507 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~14 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~14, SPW_ULIGHT_FIFO, 1
|
1508 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST, SPW_ULIGHT_FIFO, 1
|
1509 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9, SPW_ULIGHT_FIFO, 1
|
1510 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11, SPW_ULIGHT_FIFO, 1
|
1511 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10, SPW_ULIGHT_FIFO, 1
|
1512 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~13 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~13, SPW_ULIGHT_FIFO, 1
|
1513 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS, SPW_ULIGHT_FIFO, 1
|
1514 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~2 , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~2, SPW_ULIGHT_FIFO, 1
|
1515 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4] , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4], SPW_ULIGHT_FIFO, 1
|
1516 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[1][76] , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[1][76], SPW_ULIGHT_FIFO, 1
|
1517 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem~7 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem~7, SPW_ULIGHT_FIFO, 1
|
1518 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[0][76] , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[0][76], SPW_ULIGHT_FIFO, 1
|
1519 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[1][74] , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[1][74], SPW_ULIGHT_FIFO, 1
|
1520 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem~5 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem~5, SPW_ULIGHT_FIFO, 1
|
1521 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[0][74] , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[0][74], SPW_ULIGHT_FIFO, 1
|
1522 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[1][75] , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[1][75], SPW_ULIGHT_FIFO, 1
|
1523 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem~6 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem~6, SPW_ULIGHT_FIFO, 1
|
1524 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[0][75] , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[0][75], SPW_ULIGHT_FIFO, 1
|
1525 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~1 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~1, SPW_ULIGHT_FIFO, 1
|
1526 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[3] , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[3], SPW_ULIGHT_FIFO, 1
|
1527 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|Add0~0 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|Add0~0, SPW_ULIGHT_FIFO, 1
|
1528 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~2 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~2, SPW_ULIGHT_FIFO, 1
|
1529 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[4] , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[4], SPW_ULIGHT_FIFO, 1
|
1530 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[1][77] , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[1][77], SPW_ULIGHT_FIFO, 1
|
1531 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem~8 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem~8, SPW_ULIGHT_FIFO, 1
|
1532 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[0][77] , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[0][77], SPW_ULIGHT_FIFO, 1
|
1533 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|Add1~1 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|Add1~1, SPW_ULIGHT_FIFO, 1
|
1534 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|Add0~2 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|Add0~2, SPW_ULIGHT_FIFO, 1
|
1535 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~4 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~4, SPW_ULIGHT_FIFO, 1
|
1536 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[5] , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[5], SPW_ULIGHT_FIFO, 1
|
1537 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|Add1~0 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|Add1~0, SPW_ULIGHT_FIFO, 1
|
1538 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[1][78] , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[1][78], SPW_ULIGHT_FIFO, 1
|
1539 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem~9 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem~9, SPW_ULIGHT_FIFO, 1
|
1540 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[0][78] , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[0][78], SPW_ULIGHT_FIFO, 1
|
1541 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|Add0~1 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|Add0~1, SPW_ULIGHT_FIFO, 1
|
1542 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~3 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~3, SPW_ULIGHT_FIFO, 1
|
1543 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[6] , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[6], SPW_ULIGHT_FIFO, 1
|
1544 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|last_packet_beat~1 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|last_packet_beat~1, SPW_ULIGHT_FIFO, 1
|
1545 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~6 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~6, SPW_ULIGHT_FIFO, 1
|
1546 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[7] , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[7], SPW_ULIGHT_FIFO, 1
|
1547 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~0 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~0, SPW_ULIGHT_FIFO, 1
|
1548 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~5 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~5, SPW_ULIGHT_FIFO, 1
|
1549 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[2] , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[2], SPW_ULIGHT_FIFO, 1
|
1550 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|last_packet_beat~2 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|last_packet_beat~2, SPW_ULIGHT_FIFO, 1
|
1551 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66] , u0|mm_interconnect_0|write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66], SPW_ULIGHT_FIFO, 1
|
1552 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[1][66] , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[1][66], SPW_ULIGHT_FIFO, 1
|
1553 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem~3 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem~3, SPW_ULIGHT_FIFO, 1
|
1554 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[0][66] , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[0][66], SPW_ULIGHT_FIFO, 1
|
1555 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|last_packet_beat , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|last_packet_beat, SPW_ULIGHT_FIFO, 1
|
1556 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_busy , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|burst_uncompress_busy, SPW_ULIGHT_FIFO, 1
|
1557 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|last_packet_beat~0 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent|uncompressor|last_packet_beat~0, SPW_ULIGHT_FIFO, 1
|
1558 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[1][130] , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[1][130], SPW_ULIGHT_FIFO, 1
|
1559 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem~4 , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem~4, SPW_ULIGHT_FIFO, 1
|
1560 |
|
|
instance = comp, \u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[0][130] , u0|mm_interconnect_0|write_data_fifo_tx_s1_agent_rsp_fifo|mem[0][130], SPW_ULIGHT_FIFO, 1
|
1561 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_mux|src_payload~5 , u0|mm_interconnect_0|rsp_mux|src_payload~5, SPW_ULIGHT_FIFO, 1
|
1562 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_009|src_data[32] , u0|mm_interconnect_0|cmd_mux_009|src_data[32], SPW_ULIGHT_FIFO, 1
|
1563 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0] , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0], SPW_ULIGHT_FIFO, 1
|
1564 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_009|src_data[87] , u0|mm_interconnect_0|cmd_mux_009|src_data[87], SPW_ULIGHT_FIFO, 1
|
1565 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_009|src_data[88] , u0|mm_interconnect_0|cmd_mux_009|src_data[88], SPW_ULIGHT_FIFO, 1
|
1566 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0 , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0, SPW_ULIGHT_FIFO, 1
|
1567 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg, SPW_ULIGHT_FIFO, 1
|
1568 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_009|src_data[35] , u0|mm_interconnect_0|cmd_mux_009|src_data[35], SPW_ULIGHT_FIFO, 1
|
1569 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3] , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3], SPW_ULIGHT_FIFO, 1
|
1570 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_009|src_data[34] , u0|mm_interconnect_0|cmd_mux_009|src_data[34], SPW_ULIGHT_FIFO, 1
|
1571 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2] , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2], SPW_ULIGHT_FIFO, 1
|
1572 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_009|src_data[33] , u0|mm_interconnect_0|cmd_mux_009|src_data[33], SPW_ULIGHT_FIFO, 1
|
1573 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1] , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1], SPW_ULIGHT_FIFO, 1
|
1574 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent|WideOr0~0 , u0|mm_interconnect_0|link_disable_s1_agent|WideOr0~0, SPW_ULIGHT_FIFO, 1
|
1575 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[68] , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[68], SPW_ULIGHT_FIFO, 1
|
1576 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent|local_write , u0|mm_interconnect_0|link_disable_s1_agent|local_write, SPW_ULIGHT_FIFO, 1
|
1577 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent|cp_ready~4 , u0|mm_interconnect_0|link_disable_s1_agent|cp_ready~4, SPW_ULIGHT_FIFO, 1
|
1578 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_translator|read_latency_shift_reg~1 , u0|mm_interconnect_0|link_disable_s1_translator|read_latency_shift_reg~1, SPW_ULIGHT_FIFO, 1
|
1579 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_translator|read_latency_shift_reg[0] , u0|mm_interconnect_0|link_disable_s1_translator|read_latency_shift_reg[0], SPW_ULIGHT_FIFO, 1
|
1580 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[1][129] , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[1][129], SPW_ULIGHT_FIFO, 1
|
1581 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent|nonposted_write_endofpacket~0 , u0|mm_interconnect_0|link_disable_s1_agent|nonposted_write_endofpacket~0, SPW_ULIGHT_FIFO, 1
|
1582 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem~0 , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem~0, SPW_ULIGHT_FIFO, 1
|
1583 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[0][129] , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[0][129], SPW_ULIGHT_FIFO, 1
|
1584 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[1][69] , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[1][69], SPW_ULIGHT_FIFO, 1
|
1585 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69] , u0|mm_interconnect_0|link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69], SPW_ULIGHT_FIFO, 1
|
1586 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem~1 , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem~1, SPW_ULIGHT_FIFO, 1
|
1587 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[0][69] , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[0][69], SPW_ULIGHT_FIFO, 1
|
1588 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[1][68] , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[1][68], SPW_ULIGHT_FIFO, 1
|
1589 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem~2 , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem~2, SPW_ULIGHT_FIFO, 1
|
1590 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[0][68] , u0|mm_interconnect_0|link_disable_s1_agent_rsp_fifo|mem[0][68], SPW_ULIGHT_FIFO, 1
|
1591 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_demux_009|src0_valid~0 , u0|mm_interconnect_0|rsp_demux_009|src0_valid~0, SPW_ULIGHT_FIFO, 1
|
1592 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_demux_009|WideOr0~0 , u0|mm_interconnect_0|rsp_demux_009|WideOr0~0, SPW_ULIGHT_FIFO, 1
|
1593 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rdata_fifo|read~0 , u0|mm_interconnect_0|link_disable_s1_agent_rdata_fifo|read~0, SPW_ULIGHT_FIFO, 1
|
1594 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rdata_fifo|mem_used[1]~1 , u0|mm_interconnect_0|link_disable_s1_agent_rdata_fifo|mem_used[1]~1, SPW_ULIGHT_FIFO, 1
|
1595 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rdata_fifo|mem_used[1] , u0|mm_interconnect_0|link_disable_s1_agent_rdata_fifo|mem_used[1], SPW_ULIGHT_FIFO, 1
|
1596 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rdata_fifo|mem_used[0]~0 , u0|mm_interconnect_0|link_disable_s1_agent_rdata_fifo|mem_used[0]~0, SPW_ULIGHT_FIFO, 1
|
1597 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent_rdata_fifo|mem_used[0] , u0|mm_interconnect_0|link_disable_s1_agent_rdata_fifo|mem_used[0], SPW_ULIGHT_FIFO, 1
|
1598 |
|
|
instance = comp, \u0|mm_interconnect_0|link_disable_s1_agent|rp_valid , u0|mm_interconnect_0|link_disable_s1_agent|rp_valid, SPW_ULIGHT_FIFO, 1
|
1599 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_demux_009|src0_valid~1 , u0|mm_interconnect_0|rsp_demux_009|src0_valid~1, SPW_ULIGHT_FIFO, 1
|
1600 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_mux|src_payload~12 , u0|mm_interconnect_0|rsp_mux|src_payload~12, SPW_ULIGHT_FIFO, 1
|
1601 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_demux_014|WideOr0~0 , u0|mm_interconnect_0|rsp_demux_014|WideOr0~0, SPW_ULIGHT_FIFO, 1
|
1602 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[68] , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[68], SPW_ULIGHT_FIFO, 1
|
1603 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|local_write , u0|mm_interconnect_0|timecode_tx_data_s1_agent|local_write, SPW_ULIGHT_FIFO, 1
|
1604 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|nonposted_write_endofpacket~0 , u0|mm_interconnect_0|timecode_tx_data_s1_agent|nonposted_write_endofpacket~0, SPW_ULIGHT_FIFO, 1
|
1605 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[1][129] , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[1][129], SPW_ULIGHT_FIFO, 1
|
1606 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem~0 , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem~0, SPW_ULIGHT_FIFO, 1
|
1607 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_busy , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_busy, SPW_ULIGHT_FIFO, 1
|
1608 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0 , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0, SPW_ULIGHT_FIFO, 1
|
1609 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~4 , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~4, SPW_ULIGHT_FIFO, 1
|
1610 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2] , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
1611 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~1 , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~1, SPW_ULIGHT_FIFO, 1
|
1612 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3] , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3], SPW_ULIGHT_FIFO, 1
|
1613 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~2 , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~2, SPW_ULIGHT_FIFO, 1
|
1614 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4] , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4], SPW_ULIGHT_FIFO, 1
|
1615 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0 , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0, SPW_ULIGHT_FIFO, 1
|
1616 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~3 , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~3, SPW_ULIGHT_FIFO, 1
|
1617 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5] , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5], SPW_ULIGHT_FIFO, 1
|
1618 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[1][77] , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[1][77], SPW_ULIGHT_FIFO, 1
|
1619 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6] , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6], SPW_ULIGHT_FIFO, 1
|
1620 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~5 , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~5, SPW_ULIGHT_FIFO, 1
|
1621 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideOr0 , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideOr0, SPW_ULIGHT_FIFO, 1
|
1622 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~14 , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~14, SPW_ULIGHT_FIFO, 1
|
1623 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST, SPW_ULIGHT_FIFO, 1
|
1624 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem~8 , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem~8, SPW_ULIGHT_FIFO, 1
|
1625 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][77] , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][77], SPW_ULIGHT_FIFO, 1
|
1626 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[1][76] , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[1][76], SPW_ULIGHT_FIFO, 1
|
1627 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem~7 , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem~7, SPW_ULIGHT_FIFO, 1
|
1628 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][76] , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][76], SPW_ULIGHT_FIFO, 1
|
1629 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[1][74] , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[1][74], SPW_ULIGHT_FIFO, 1
|
1630 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem~5 , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem~5, SPW_ULIGHT_FIFO, 1
|
1631 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][74]~feeder , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][74]~feeder, SPW_ULIGHT_FIFO, 1
|
1632 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][74] , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][74], SPW_ULIGHT_FIFO, 1
|
1633 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[1][75] , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[1][75], SPW_ULIGHT_FIFO, 1
|
1634 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem~6 , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem~6, SPW_ULIGHT_FIFO, 1
|
1635 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][75] , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][75], SPW_ULIGHT_FIFO, 1
|
1636 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|Add1~0 , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|Add1~0, SPW_ULIGHT_FIFO, 1
|
1637 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[1][78] , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[1][78], SPW_ULIGHT_FIFO, 1
|
1638 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem~9 , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem~9, SPW_ULIGHT_FIFO, 1
|
1639 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][78] , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][78], SPW_ULIGHT_FIFO, 1
|
1640 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter~1 , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter~1, SPW_ULIGHT_FIFO, 1
|
1641 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter[3] , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter[3], SPW_ULIGHT_FIFO, 1
|
1642 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|Add0~0 , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|Add0~0, SPW_ULIGHT_FIFO, 1
|
1643 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter~2 , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter~2, SPW_ULIGHT_FIFO, 1
|
1644 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter[4] , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter[4], SPW_ULIGHT_FIFO, 1
|
1645 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|Add0~2 , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|Add0~2, SPW_ULIGHT_FIFO, 1
|
1646 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|Add1~1 , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|Add1~1, SPW_ULIGHT_FIFO, 1
|
1647 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter~4 , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter~4, SPW_ULIGHT_FIFO, 1
|
1648 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter[5] , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter[5], SPW_ULIGHT_FIFO, 1
|
1649 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|Add0~1 , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|Add0~1, SPW_ULIGHT_FIFO, 1
|
1650 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter~3 , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter~3, SPW_ULIGHT_FIFO, 1
|
1651 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter[6] , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter[6], SPW_ULIGHT_FIFO, 1
|
1652 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter~6 , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter~6, SPW_ULIGHT_FIFO, 1
|
1653 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter[7] , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter[7], SPW_ULIGHT_FIFO, 1
|
1654 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|last_packet_beat~1 , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|last_packet_beat~1, SPW_ULIGHT_FIFO, 1
|
1655 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter~0 , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter~0, SPW_ULIGHT_FIFO, 1
|
1656 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter~5 , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter~5, SPW_ULIGHT_FIFO, 1
|
1657 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter[2] , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|burst_uncompress_byte_counter[2], SPW_ULIGHT_FIFO, 1
|
1658 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|last_packet_beat~2 , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|last_packet_beat~2, SPW_ULIGHT_FIFO, 1
|
1659 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|last_packet_beat~0 , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|last_packet_beat~0, SPW_ULIGHT_FIFO, 1
|
1660 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[1][66] , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[1][66], SPW_ULIGHT_FIFO, 1
|
1661 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem~3 , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem~3, SPW_ULIGHT_FIFO, 1
|
1662 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][66]~feeder , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][66]~feeder, SPW_ULIGHT_FIFO, 1
|
1663 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][66] , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][66], SPW_ULIGHT_FIFO, 1
|
1664 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|last_packet_beat , u0|mm_interconnect_0|timecode_tx_data_s1_agent|uncompressor|last_packet_beat, SPW_ULIGHT_FIFO, 1
|
1665 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|always0~0 , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|always0~0, SPW_ULIGHT_FIFO, 1
|
1666 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][129] , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][129], SPW_ULIGHT_FIFO, 1
|
1667 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rdata_fifo|read~0 , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rdata_fifo|read~0, SPW_ULIGHT_FIFO, 1
|
1668 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rdata_fifo|mem_used[1]~1 , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rdata_fifo|mem_used[1]~1, SPW_ULIGHT_FIFO, 1
|
1669 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rdata_fifo|mem_used[1] , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rdata_fifo|mem_used[1], SPW_ULIGHT_FIFO, 1
|
1670 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rdata_fifo|mem_used[0]~0 , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rdata_fifo|mem_used[0]~0, SPW_ULIGHT_FIFO, 1
|
1671 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rdata_fifo|mem_used[0] , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rdata_fifo|mem_used[0], SPW_ULIGHT_FIFO, 1
|
1672 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent|rp_valid , u0|mm_interconnect_0|timecode_tx_data_s1_agent|rp_valid, SPW_ULIGHT_FIFO, 1
|
1673 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_demux_014|src0_valid~1 , u0|mm_interconnect_0|rsp_demux_014|src0_valid~1, SPW_ULIGHT_FIFO, 1
|
1674 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][130] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][130], SPW_ULIGHT_FIFO, 1
|
1675 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem~4 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem~4, SPW_ULIGHT_FIFO, 1
|
1676 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|local_write , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|local_write, SPW_ULIGHT_FIFO, 1
|
1677 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|cp_ready~4 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|cp_ready~4, SPW_ULIGHT_FIFO, 1
|
1678 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_translator|read_latency_shift_reg~1 , u0|mm_interconnect_0|timecode_tx_enable_s1_translator|read_latency_shift_reg~1, SPW_ULIGHT_FIFO, 1
|
1679 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_translator|read_latency_shift_reg[0] , u0|mm_interconnect_0|timecode_tx_enable_s1_translator|read_latency_shift_reg[0], SPW_ULIGHT_FIFO, 1
|
1680 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder, SPW_ULIGHT_FIFO, 1
|
1681 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold, SPW_ULIGHT_FIFO, 1
|
1682 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_channel[15] , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_channel[15], SPW_ULIGHT_FIFO, 1
|
1683 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux|src15_valid~0 , u0|mm_interconnect_0|cmd_demux|src15_valid~0, SPW_ULIGHT_FIFO, 1
|
1684 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux|src15_valid~1 , u0|mm_interconnect_0|cmd_demux|src15_valid~1, SPW_ULIGHT_FIFO, 1
|
1685 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~12 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~12, SPW_ULIGHT_FIFO, 1
|
1686 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder, SPW_ULIGHT_FIFO, 1
|
1687 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2] , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
1688 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0, SPW_ULIGHT_FIFO, 1
|
1689 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~4 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~4, SPW_ULIGHT_FIFO, 1
|
1690 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2] , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
1691 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~3 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~3, SPW_ULIGHT_FIFO, 1
|
1692 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3] , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3], SPW_ULIGHT_FIFO, 1
|
1693 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4] , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4], SPW_ULIGHT_FIFO, 1
|
1694 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~2 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~2, SPW_ULIGHT_FIFO, 1
|
1695 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0, SPW_ULIGHT_FIFO, 1
|
1696 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5] , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5], SPW_ULIGHT_FIFO, 1
|
1697 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~1 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~1, SPW_ULIGHT_FIFO, 1
|
1698 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6] , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6], SPW_ULIGHT_FIFO, 1
|
1699 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~5 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~5, SPW_ULIGHT_FIFO, 1
|
1700 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideOr0 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideOr0, SPW_ULIGHT_FIFO, 1
|
1701 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_015|src_valid~0 , u0|mm_interconnect_0|cmd_mux_015|src_valid~0, SPW_ULIGHT_FIFO, 1
|
1702 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_valid , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_valid, SPW_ULIGHT_FIFO, 1
|
1703 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~15 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~15, SPW_ULIGHT_FIFO, 1
|
1704 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE, SPW_ULIGHT_FIFO, 1
|
1705 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~14 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~14, SPW_ULIGHT_FIFO, 1
|
1706 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST, SPW_ULIGHT_FIFO, 1
|
1707 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9, SPW_ULIGHT_FIFO, 1
|
1708 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11, SPW_ULIGHT_FIFO, 1
|
1709 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10, SPW_ULIGHT_FIFO, 1
|
1710 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~13 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~13, SPW_ULIGHT_FIFO, 1
|
1711 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS, SPW_ULIGHT_FIFO, 1
|
1712 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~7 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~7, SPW_ULIGHT_FIFO, 1
|
1713 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~8 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~8, SPW_ULIGHT_FIFO, 1
|
1714 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2] , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2], SPW_ULIGHT_FIFO, 1
|
1715 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~1 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~1, SPW_ULIGHT_FIFO, 1
|
1716 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3] , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3], SPW_ULIGHT_FIFO, 1
|
1717 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~2 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~2, SPW_ULIGHT_FIFO, 1
|
1718 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~3 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~3, SPW_ULIGHT_FIFO, 1
|
1719 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5] , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5], SPW_ULIGHT_FIFO, 1
|
1720 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0, SPW_ULIGHT_FIFO, 1
|
1721 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~0 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~0, SPW_ULIGHT_FIFO, 1
|
1722 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4] , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4], SPW_ULIGHT_FIFO, 1
|
1723 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1, SPW_ULIGHT_FIFO, 1
|
1724 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~4 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~4, SPW_ULIGHT_FIFO, 1
|
1725 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~5 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~5, SPW_ULIGHT_FIFO, 1
|
1726 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6] , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6], SPW_ULIGHT_FIFO, 1
|
1727 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~6 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~6, SPW_ULIGHT_FIFO, 1
|
1728 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|cp_ready~2 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|cp_ready~2, SPW_ULIGHT_FIFO, 1
|
1729 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_015|src_data[88] , u0|mm_interconnect_0|cmd_mux_015|src_data[88], SPW_ULIGHT_FIFO, 1
|
1730 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_015|src_data[87] , u0|mm_interconnect_0|cmd_mux_015|src_data[87], SPW_ULIGHT_FIFO, 1
|
1731 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0, SPW_ULIGHT_FIFO, 1
|
1732 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg, SPW_ULIGHT_FIFO, 1
|
1733 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_015|src_data[34] , u0|mm_interconnect_0|cmd_mux_015|src_data[34], SPW_ULIGHT_FIFO, 1
|
1734 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2] , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2], SPW_ULIGHT_FIFO, 1
|
1735 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_015|src_data[33] , u0|mm_interconnect_0|cmd_mux_015|src_data[33], SPW_ULIGHT_FIFO, 1
|
1736 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1] , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1], SPW_ULIGHT_FIFO, 1
|
1737 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_015|src_data[35] , u0|mm_interconnect_0|cmd_mux_015|src_data[35], SPW_ULIGHT_FIFO, 1
|
1738 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3] , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3], SPW_ULIGHT_FIFO, 1
|
1739 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|cp_ready~1 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|cp_ready~1, SPW_ULIGHT_FIFO, 1
|
1740 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|cp_ready~3 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|cp_ready~3, SPW_ULIGHT_FIFO, 1
|
1741 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg, SPW_ULIGHT_FIFO, 1
|
1742 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0, SPW_ULIGHT_FIFO, 1
|
1743 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1, SPW_ULIGHT_FIFO, 1
|
1744 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2, SPW_ULIGHT_FIFO, 1
|
1745 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0, SPW_ULIGHT_FIFO, 1
|
1746 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg, SPW_ULIGHT_FIFO, 1
|
1747 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~2 , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~2, SPW_ULIGHT_FIFO, 1
|
1748 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd, SPW_ULIGHT_FIFO, 1
|
1749 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69] , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69], SPW_ULIGHT_FIFO, 1
|
1750 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66] , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66], SPW_ULIGHT_FIFO, 1
|
1751 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|m0_read~0 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|m0_read~0, SPW_ULIGHT_FIFO, 1
|
1752 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][129] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][129], SPW_ULIGHT_FIFO, 1
|
1753 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem~0 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem~0, SPW_ULIGHT_FIFO, 1
|
1754 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[0][129] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[0][129], SPW_ULIGHT_FIFO, 1
|
1755 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rdata_fifo|read~0 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rdata_fifo|read~0, SPW_ULIGHT_FIFO, 1
|
1756 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rdata_fifo|mem_used[1]~1 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rdata_fifo|mem_used[1]~1, SPW_ULIGHT_FIFO, 1
|
1757 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rdata_fifo|mem_used[1] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rdata_fifo|mem_used[1], SPW_ULIGHT_FIFO, 1
|
1758 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rdata_fifo|mem_used[0]~0 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rdata_fifo|mem_used[0]~0, SPW_ULIGHT_FIFO, 1
|
1759 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rdata_fifo|mem_used[0] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rdata_fifo|mem_used[0], SPW_ULIGHT_FIFO, 1
|
1760 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|comb~0 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|comb~0, SPW_ULIGHT_FIFO, 1
|
1761 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][78] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][78], SPW_ULIGHT_FIFO, 1
|
1762 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem~9 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem~9, SPW_ULIGHT_FIFO, 1
|
1763 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[0][78] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[0][78], SPW_ULIGHT_FIFO, 1
|
1764 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][76] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][76], SPW_ULIGHT_FIFO, 1
|
1765 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem~7 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem~7, SPW_ULIGHT_FIFO, 1
|
1766 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[0][76] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[0][76], SPW_ULIGHT_FIFO, 1
|
1767 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][74] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][74], SPW_ULIGHT_FIFO, 1
|
1768 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem~5 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem~5, SPW_ULIGHT_FIFO, 1
|
1769 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[0][74] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[0][74], SPW_ULIGHT_FIFO, 1
|
1770 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][77] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][77], SPW_ULIGHT_FIFO, 1
|
1771 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem~8 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem~8, SPW_ULIGHT_FIFO, 1
|
1772 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[0][77] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[0][77], SPW_ULIGHT_FIFO, 1
|
1773 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][75] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][75], SPW_ULIGHT_FIFO, 1
|
1774 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem~6 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem~6, SPW_ULIGHT_FIFO, 1
|
1775 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[0][75] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[0][75], SPW_ULIGHT_FIFO, 1
|
1776 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|Add1~0 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|Add1~0, SPW_ULIGHT_FIFO, 1
|
1777 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter~1 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter~1, SPW_ULIGHT_FIFO, 1
|
1778 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter[3] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter[3], SPW_ULIGHT_FIFO, 1
|
1779 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|Add0~0 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|Add0~0, SPW_ULIGHT_FIFO, 1
|
1780 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter~2 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter~2, SPW_ULIGHT_FIFO, 1
|
1781 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter[4] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter[4], SPW_ULIGHT_FIFO, 1
|
1782 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|Add0~2 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|Add0~2, SPW_ULIGHT_FIFO, 1
|
1783 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|Add1~1 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|Add1~1, SPW_ULIGHT_FIFO, 1
|
1784 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter~4 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter~4, SPW_ULIGHT_FIFO, 1
|
1785 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter[5] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter[5], SPW_ULIGHT_FIFO, 1
|
1786 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|Add0~1 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|Add0~1, SPW_ULIGHT_FIFO, 1
|
1787 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter~3 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter~3, SPW_ULIGHT_FIFO, 1
|
1788 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter[6] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter[6], SPW_ULIGHT_FIFO, 1
|
1789 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter~6 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter~6, SPW_ULIGHT_FIFO, 1
|
1790 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter[7] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter[7], SPW_ULIGHT_FIFO, 1
|
1791 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|last_packet_beat~1 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|last_packet_beat~1, SPW_ULIGHT_FIFO, 1
|
1792 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_busy , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_busy, SPW_ULIGHT_FIFO, 1
|
1793 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter~0 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter~0, SPW_ULIGHT_FIFO, 1
|
1794 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter~5 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter~5, SPW_ULIGHT_FIFO, 1
|
1795 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter[2] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|burst_uncompress_byte_counter[2], SPW_ULIGHT_FIFO, 1
|
1796 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|last_packet_beat~2 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|last_packet_beat~2, SPW_ULIGHT_FIFO, 1
|
1797 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][66] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][66], SPW_ULIGHT_FIFO, 1
|
1798 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem~3 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem~3, SPW_ULIGHT_FIFO, 1
|
1799 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[0][66] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[0][66], SPW_ULIGHT_FIFO, 1
|
1800 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|last_packet_beat~0 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|last_packet_beat~0, SPW_ULIGHT_FIFO, 1
|
1801 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|last_packet_beat , u0|mm_interconnect_0|timecode_tx_enable_s1_agent|uncompressor|last_packet_beat, SPW_ULIGHT_FIFO, 1
|
1802 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|always0~0 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|always0~0, SPW_ULIGHT_FIFO, 1
|
1803 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[0][130] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[0][130], SPW_ULIGHT_FIFO, 1
|
1804 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_mux|src_payload~2 , u0|mm_interconnect_0|rsp_mux|src_payload~2, SPW_ULIGHT_FIFO, 1
|
1805 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[1][130] , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[1][130], SPW_ULIGHT_FIFO, 1
|
1806 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem~4 , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem~4, SPW_ULIGHT_FIFO, 1
|
1807 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|always0~0 , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|always0~0, SPW_ULIGHT_FIFO, 1
|
1808 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[0][130] , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[0][130], SPW_ULIGHT_FIFO, 1
|
1809 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_busy , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_busy, SPW_ULIGHT_FIFO, 1
|
1810 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|last_packet_beat~2 , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|last_packet_beat~2, SPW_ULIGHT_FIFO, 1
|
1811 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_translator|waitrequest_reset_override~feeder , u0|mm_interconnect_0|write_en_tx_s1_translator|waitrequest_reset_override~feeder, SPW_ULIGHT_FIFO, 1
|
1812 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_translator|waitrequest_reset_override , u0|mm_interconnect_0|write_en_tx_s1_translator|waitrequest_reset_override, SPW_ULIGHT_FIFO, 1
|
1813 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|cp_ready~0 , u0|mm_interconnect_0|write_en_tx_s1_agent|cp_ready~0, SPW_ULIGHT_FIFO, 1
|
1814 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|load_next_out_cmd , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|load_next_out_cmd, SPW_ULIGHT_FIFO, 1
|
1815 |
|
|
instance = comp, \u0|mm_interconnect_0|router_001|Equal17~0 , u0|mm_interconnect_0|router_001|Equal17~0, SPW_ULIGHT_FIFO, 1
|
1816 |
|
|
instance = comp, \u0|mm_interconnect_0|router_001|Equal17~1 , u0|mm_interconnect_0|router_001|Equal17~1, SPW_ULIGHT_FIFO, 1
|
1817 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[11] , u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[11], SPW_ULIGHT_FIFO, 1
|
1818 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_011|src_valid~0 , u0|mm_interconnect_0|cmd_mux_011|src_valid~0, SPW_ULIGHT_FIFO, 1
|
1819 |
|
|
instance = comp, \u0|mm_interconnect_0|router|Equal17~0 , u0|mm_interconnect_0|router|Equal17~0, SPW_ULIGHT_FIFO, 1
|
1820 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_channel[11] , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_channel[11], SPW_ULIGHT_FIFO, 1
|
1821 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux|src11_valid~0 , u0|mm_interconnect_0|cmd_demux|src11_valid~0, SPW_ULIGHT_FIFO, 1
|
1822 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_011|src_valid~1 , u0|mm_interconnect_0|cmd_mux_011|src_valid~1, SPW_ULIGHT_FIFO, 1
|
1823 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder, SPW_ULIGHT_FIFO, 1
|
1824 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold, SPW_ULIGHT_FIFO, 1
|
1825 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_valid , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_valid, SPW_ULIGHT_FIFO, 1
|
1826 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10, SPW_ULIGHT_FIFO, 1
|
1827 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~12 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~12, SPW_ULIGHT_FIFO, 1
|
1828 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder, SPW_ULIGHT_FIFO, 1
|
1829 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2] , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
1830 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4] , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4], SPW_ULIGHT_FIFO, 1
|
1831 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0, SPW_ULIGHT_FIFO, 1
|
1832 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~4 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~4, SPW_ULIGHT_FIFO, 1
|
1833 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2] , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
1834 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~1 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~1, SPW_ULIGHT_FIFO, 1
|
1835 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3] , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3], SPW_ULIGHT_FIFO, 1
|
1836 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~2 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~2, SPW_ULIGHT_FIFO, 1
|
1837 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5] , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5], SPW_ULIGHT_FIFO, 1
|
1838 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0, SPW_ULIGHT_FIFO, 1
|
1839 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~3 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~3, SPW_ULIGHT_FIFO, 1
|
1840 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6] , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6], SPW_ULIGHT_FIFO, 1
|
1841 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~5 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~5, SPW_ULIGHT_FIFO, 1
|
1842 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideOr0 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideOr0, SPW_ULIGHT_FIFO, 1
|
1843 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor0~0 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor0~0, SPW_ULIGHT_FIFO, 1
|
1844 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0, SPW_ULIGHT_FIFO, 1
|
1845 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~0 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~0, SPW_ULIGHT_FIFO, 1
|
1846 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~2 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~2, SPW_ULIGHT_FIFO, 1
|
1847 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~5 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~5, SPW_ULIGHT_FIFO, 1
|
1848 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~7 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~7, SPW_ULIGHT_FIFO, 1
|
1849 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~8 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~8, SPW_ULIGHT_FIFO, 1
|
1850 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2] , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2], SPW_ULIGHT_FIFO, 1
|
1851 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~6 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~6, SPW_ULIGHT_FIFO, 1
|
1852 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3] , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3], SPW_ULIGHT_FIFO, 1
|
1853 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1, SPW_ULIGHT_FIFO, 1
|
1854 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~4 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~4, SPW_ULIGHT_FIFO, 1
|
1855 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4] , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4], SPW_ULIGHT_FIFO, 1
|
1856 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0, SPW_ULIGHT_FIFO, 1
|
1857 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~3 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~3, SPW_ULIGHT_FIFO, 1
|
1858 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5] , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5], SPW_ULIGHT_FIFO, 1
|
1859 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6] , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6], SPW_ULIGHT_FIFO, 1
|
1860 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~1 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~1, SPW_ULIGHT_FIFO, 1
|
1861 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0, SPW_ULIGHT_FIFO, 1
|
1862 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg, SPW_ULIGHT_FIFO, 1
|
1863 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~1 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~1, SPW_ULIGHT_FIFO, 1
|
1864 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd, SPW_ULIGHT_FIFO, 1
|
1865 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero, SPW_ULIGHT_FIFO, 1
|
1866 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_011|src_data[88] , u0|mm_interconnect_0|cmd_mux_011|src_data[88], SPW_ULIGHT_FIFO, 1
|
1867 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_011|src_data[87] , u0|mm_interconnect_0|cmd_mux_011|src_data[87], SPW_ULIGHT_FIFO, 1
|
1868 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0, SPW_ULIGHT_FIFO, 1
|
1869 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg, SPW_ULIGHT_FIFO, 1
|
1870 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_011|src_data[32] , u0|mm_interconnect_0|cmd_mux_011|src_data[32], SPW_ULIGHT_FIFO, 1
|
1871 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0] , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0], SPW_ULIGHT_FIFO, 1
|
1872 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_011|src_data[33] , u0|mm_interconnect_0|cmd_mux_011|src_data[33], SPW_ULIGHT_FIFO, 1
|
1873 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1] , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1], SPW_ULIGHT_FIFO, 1
|
1874 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_011|src_data[34] , u0|mm_interconnect_0|cmd_mux_011|src_data[34], SPW_ULIGHT_FIFO, 1
|
1875 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2] , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2], SPW_ULIGHT_FIFO, 1
|
1876 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|cp_ready~1 , u0|mm_interconnect_0|write_en_tx_s1_agent|cp_ready~1, SPW_ULIGHT_FIFO, 1
|
1877 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|cp_ready~2 , u0|mm_interconnect_0|write_en_tx_s1_agent|cp_ready~2, SPW_ULIGHT_FIFO, 1
|
1878 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|cp_ready~3 , u0|mm_interconnect_0|write_en_tx_s1_agent|cp_ready~3, SPW_ULIGHT_FIFO, 1
|
1879 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~15 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~15, SPW_ULIGHT_FIFO, 1
|
1880 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE, SPW_ULIGHT_FIFO, 1
|
1881 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0, SPW_ULIGHT_FIFO, 1
|
1882 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1, SPW_ULIGHT_FIFO, 1
|
1883 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2, SPW_ULIGHT_FIFO, 1
|
1884 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~8 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~8, SPW_ULIGHT_FIFO, 1
|
1885 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_COMP_TRANS , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_COMP_TRANS, SPW_ULIGHT_FIFO, 1
|
1886 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9, SPW_ULIGHT_FIFO, 1
|
1887 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11, SPW_ULIGHT_FIFO, 1
|
1888 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~13 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~13, SPW_ULIGHT_FIFO, 1
|
1889 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS, SPW_ULIGHT_FIFO, 1
|
1890 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~14 , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~14, SPW_ULIGHT_FIFO, 1
|
1891 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST, SPW_ULIGHT_FIFO, 1
|
1892 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[1][74] , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[1][74], SPW_ULIGHT_FIFO, 1
|
1893 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem~5 , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem~5, SPW_ULIGHT_FIFO, 1
|
1894 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[0][74] , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[0][74], SPW_ULIGHT_FIFO, 1
|
1895 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[1][77] , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[1][77], SPW_ULIGHT_FIFO, 1
|
1896 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem~8 , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem~8, SPW_ULIGHT_FIFO, 1
|
1897 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[0][77] , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[0][77], SPW_ULIGHT_FIFO, 1
|
1898 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[1][76] , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[1][76], SPW_ULIGHT_FIFO, 1
|
1899 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem~7 , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem~7, SPW_ULIGHT_FIFO, 1
|
1900 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[0][76] , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[0][76], SPW_ULIGHT_FIFO, 1
|
1901 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[1][75] , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[1][75], SPW_ULIGHT_FIFO, 1
|
1902 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem~6 , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem~6, SPW_ULIGHT_FIFO, 1
|
1903 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[0][75] , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[0][75], SPW_ULIGHT_FIFO, 1
|
1904 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|Add1~0 , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|Add1~0, SPW_ULIGHT_FIFO, 1
|
1905 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[1][78] , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[1][78], SPW_ULIGHT_FIFO, 1
|
1906 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem~9 , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem~9, SPW_ULIGHT_FIFO, 1
|
1907 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[0][78] , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[0][78], SPW_ULIGHT_FIFO, 1
|
1908 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~1 , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~1, SPW_ULIGHT_FIFO, 1
|
1909 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[3] , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[3], SPW_ULIGHT_FIFO, 1
|
1910 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|Add0~2 , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|Add0~2, SPW_ULIGHT_FIFO, 1
|
1911 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|Add1~1 , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|Add1~1, SPW_ULIGHT_FIFO, 1
|
1912 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~4 , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~4, SPW_ULIGHT_FIFO, 1
|
1913 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[5] , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[5], SPW_ULIGHT_FIFO, 1
|
1914 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|Add0~1 , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|Add0~1, SPW_ULIGHT_FIFO, 1
|
1915 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~3 , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~3, SPW_ULIGHT_FIFO, 1
|
1916 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[6] , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[6], SPW_ULIGHT_FIFO, 1
|
1917 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~6 , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~6, SPW_ULIGHT_FIFO, 1
|
1918 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[7] , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[7], SPW_ULIGHT_FIFO, 1
|
1919 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~0 , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~0, SPW_ULIGHT_FIFO, 1
|
1920 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~5 , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~5, SPW_ULIGHT_FIFO, 1
|
1921 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[2] , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[2], SPW_ULIGHT_FIFO, 1
|
1922 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|Add0~0 , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|Add0~0, SPW_ULIGHT_FIFO, 1
|
1923 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~2 , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter~2, SPW_ULIGHT_FIFO, 1
|
1924 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[4] , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|burst_uncompress_byte_counter[4], SPW_ULIGHT_FIFO, 1
|
1925 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|last_packet_beat~1 , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|last_packet_beat~1, SPW_ULIGHT_FIFO, 1
|
1926 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|last_packet_beat~0 , u0|mm_interconnect_0|write_en_tx_s1_agent|uncompressor|last_packet_beat~0, SPW_ULIGHT_FIFO, 1
|
1927 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_mux|src_payload~0 , u0|mm_interconnect_0|rsp_mux|src_payload~0, SPW_ULIGHT_FIFO, 1
|
1928 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[1][130] , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[1][130], SPW_ULIGHT_FIFO, 1
|
1929 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem~4 , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem~4, SPW_ULIGHT_FIFO, 1
|
1930 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][130] , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][130], SPW_ULIGHT_FIFO, 1
|
1931 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_mux|src_payload~1 , u0|mm_interconnect_0|rsp_mux|src_payload~1, SPW_ULIGHT_FIFO, 1
|
1932 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_mux|src_payload~10 , u0|mm_interconnect_0|rsp_mux|src_payload~10, SPW_ULIGHT_FIFO, 1
|
1933 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_demux_007|src0_valid~1 , u0|mm_interconnect_0|rsp_demux_007|src0_valid~1, SPW_ULIGHT_FIFO, 1
|
1934 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder, SPW_ULIGHT_FIFO, 1
|
1935 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_translator|waitrequest_reset_override~feeder , u0|mm_interconnect_0|link_start_s1_translator|waitrequest_reset_override~feeder, SPW_ULIGHT_FIFO, 1
|
1936 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_translator|waitrequest_reset_override , u0|mm_interconnect_0|link_start_s1_translator|waitrequest_reset_override, SPW_ULIGHT_FIFO, 1
|
1937 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|local_write , u0|mm_interconnect_0|link_start_s1_agent|local_write, SPW_ULIGHT_FIFO, 1
|
1938 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|cp_ready~0 , u0|mm_interconnect_0|link_start_s1_agent|cp_ready~0, SPW_ULIGHT_FIFO, 1
|
1939 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|load_next_out_cmd , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|load_next_out_cmd, SPW_ULIGHT_FIFO, 1
|
1940 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2] , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
1941 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~4 , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~4, SPW_ULIGHT_FIFO, 1
|
1942 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2] , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
1943 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~3 , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~3, SPW_ULIGHT_FIFO, 1
|
1944 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3] , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3], SPW_ULIGHT_FIFO, 1
|
1945 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~2 , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~2, SPW_ULIGHT_FIFO, 1
|
1946 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4] , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4], SPW_ULIGHT_FIFO, 1
|
1947 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[1][76] , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[1][76], SPW_ULIGHT_FIFO, 1
|
1948 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~14 , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~14, SPW_ULIGHT_FIFO, 1
|
1949 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST, SPW_ULIGHT_FIFO, 1
|
1950 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem~7 , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem~7, SPW_ULIGHT_FIFO, 1
|
1951 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66] , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66], SPW_ULIGHT_FIFO, 1
|
1952 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69] , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69], SPW_ULIGHT_FIFO, 1
|
1953 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|m0_read~0 , u0|mm_interconnect_0|link_start_s1_agent|m0_read~0, SPW_ULIGHT_FIFO, 1
|
1954 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[1][129] , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[1][129], SPW_ULIGHT_FIFO, 1
|
1955 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|nonposted_write_endofpacket~0 , u0|mm_interconnect_0|link_start_s1_agent|nonposted_write_endofpacket~0, SPW_ULIGHT_FIFO, 1
|
1956 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem~0 , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem~0, SPW_ULIGHT_FIFO, 1
|
1957 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[0][129] , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[0][129], SPW_ULIGHT_FIFO, 1
|
1958 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|always0~0 , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|always0~0, SPW_ULIGHT_FIFO, 1
|
1959 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem_used[0]~1 , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem_used[0]~1, SPW_ULIGHT_FIFO, 1
|
1960 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem_used[0] , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem_used[0], SPW_ULIGHT_FIFO, 1
|
1961 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|comb~0 , u0|mm_interconnect_0|link_start_s1_agent|comb~0, SPW_ULIGHT_FIFO, 1
|
1962 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[1][74] , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[1][74], SPW_ULIGHT_FIFO, 1
|
1963 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem~5 , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem~5, SPW_ULIGHT_FIFO, 1
|
1964 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[0][74] , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[0][74], SPW_ULIGHT_FIFO, 1
|
1965 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[1][78] , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[1][78], SPW_ULIGHT_FIFO, 1
|
1966 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0 , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0, SPW_ULIGHT_FIFO, 1
|
1967 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5] , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5], SPW_ULIGHT_FIFO, 1
|
1968 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~5 , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~5, SPW_ULIGHT_FIFO, 1
|
1969 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6] , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6], SPW_ULIGHT_FIFO, 1
|
1970 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem~9 , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem~9, SPW_ULIGHT_FIFO, 1
|
1971 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[0][78] , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[0][78], SPW_ULIGHT_FIFO, 1
|
1972 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[1][77] , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[1][77], SPW_ULIGHT_FIFO, 1
|
1973 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem~8 , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem~8, SPW_ULIGHT_FIFO, 1
|
1974 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[0][77] , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[0][77], SPW_ULIGHT_FIFO, 1
|
1975 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[1][75] , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[1][75], SPW_ULIGHT_FIFO, 1
|
1976 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem~6 , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem~6, SPW_ULIGHT_FIFO, 1
|
1977 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[0][75] , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[0][75], SPW_ULIGHT_FIFO, 1
|
1978 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|Add1~0 , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|Add1~0, SPW_ULIGHT_FIFO, 1
|
1979 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|Add0~0 , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|Add0~0, SPW_ULIGHT_FIFO, 1
|
1980 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter~2 , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter~2, SPW_ULIGHT_FIFO, 1
|
1981 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter[4] , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter[4], SPW_ULIGHT_FIFO, 1
|
1982 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|Add1~1 , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|Add1~1, SPW_ULIGHT_FIFO, 1
|
1983 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|Add0~2 , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|Add0~2, SPW_ULIGHT_FIFO, 1
|
1984 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter~4 , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter~4, SPW_ULIGHT_FIFO, 1
|
1985 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter[5] , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter[5], SPW_ULIGHT_FIFO, 1
|
1986 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|Add0~1 , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|Add0~1, SPW_ULIGHT_FIFO, 1
|
1987 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter~3 , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter~3, SPW_ULIGHT_FIFO, 1
|
1988 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter[6] , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter[6], SPW_ULIGHT_FIFO, 1
|
1989 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter~6 , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter~6, SPW_ULIGHT_FIFO, 1
|
1990 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter[7] , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter[7], SPW_ULIGHT_FIFO, 1
|
1991 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_busy , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_busy, SPW_ULIGHT_FIFO, 1
|
1992 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter~0 , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter~0, SPW_ULIGHT_FIFO, 1
|
1993 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|last_packet_beat~2 , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|last_packet_beat~2, SPW_ULIGHT_FIFO, 1
|
1994 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter~5 , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter~5, SPW_ULIGHT_FIFO, 1
|
1995 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter[2] , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter[2], SPW_ULIGHT_FIFO, 1
|
1996 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter~1 , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter~1, SPW_ULIGHT_FIFO, 1
|
1997 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter[3] , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|burst_uncompress_byte_counter[3], SPW_ULIGHT_FIFO, 1
|
1998 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|last_packet_beat~1 , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|last_packet_beat~1, SPW_ULIGHT_FIFO, 1
|
1999 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[1][66] , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[1][66], SPW_ULIGHT_FIFO, 1
|
2000 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem~3 , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem~3, SPW_ULIGHT_FIFO, 1
|
2001 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[0][66] , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[0][66], SPW_ULIGHT_FIFO, 1
|
2002 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|last_packet_beat , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|last_packet_beat, SPW_ULIGHT_FIFO, 1
|
2003 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|always0~0 , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|always0~0, SPW_ULIGHT_FIFO, 1
|
2004 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[0][76] , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[0][76], SPW_ULIGHT_FIFO, 1
|
2005 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|uncompressor|last_packet_beat~0 , u0|mm_interconnect_0|link_start_s1_agent|uncompressor|last_packet_beat~0, SPW_ULIGHT_FIFO, 1
|
2006 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[1][130] , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[1][130], SPW_ULIGHT_FIFO, 1
|
2007 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem~4 , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem~4, SPW_ULIGHT_FIFO, 1
|
2008 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[0][130] , u0|mm_interconnect_0|link_start_s1_agent_rsp_fifo|mem[0][130], SPW_ULIGHT_FIFO, 1
|
2009 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_mux|src_payload~8 , u0|mm_interconnect_0|rsp_mux|src_payload~8, SPW_ULIGHT_FIFO, 1
|
2010 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux|packet_in_progress~0 , u0|mm_interconnect_0|cmd_mux|packet_in_progress~0, SPW_ULIGHT_FIFO, 1
|
2011 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux|packet_in_progress , u0|mm_interconnect_0|cmd_mux|packet_in_progress, SPW_ULIGHT_FIFO, 1
|
2012 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux|src_valid~0 , u0|mm_interconnect_0|cmd_mux|src_valid~0, SPW_ULIGHT_FIFO, 1
|
2013 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~0 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~0, SPW_ULIGHT_FIFO, 1
|
2014 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5] , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5], SPW_ULIGHT_FIFO, 1
|
2015 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~7 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~7, SPW_ULIGHT_FIFO, 1
|
2016 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~2 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~2, SPW_ULIGHT_FIFO, 1
|
2017 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~3 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~3, SPW_ULIGHT_FIFO, 1
|
2018 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2] , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2], SPW_ULIGHT_FIFO, 1
|
2019 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~8 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~8, SPW_ULIGHT_FIFO, 1
|
2020 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3] , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3], SPW_ULIGHT_FIFO, 1
|
2021 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1, SPW_ULIGHT_FIFO, 1
|
2022 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~6 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~6, SPW_ULIGHT_FIFO, 1
|
2023 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4] , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4], SPW_ULIGHT_FIFO, 1
|
2024 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0, SPW_ULIGHT_FIFO, 1
|
2025 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~1 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~1, SPW_ULIGHT_FIFO, 1
|
2026 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~4 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~4, SPW_ULIGHT_FIFO, 1
|
2027 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6] , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6], SPW_ULIGHT_FIFO, 1
|
2028 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~5 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~5, SPW_ULIGHT_FIFO, 1
|
2029 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0, SPW_ULIGHT_FIFO, 1
|
2030 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg, SPW_ULIGHT_FIFO, 1
|
2031 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux|src_data[34] , u0|mm_interconnect_0|cmd_mux|src_data[34], SPW_ULIGHT_FIFO, 1
|
2032 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder, SPW_ULIGHT_FIFO, 1
|
2033 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold, SPW_ULIGHT_FIFO, 1
|
2034 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~1 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~1, SPW_ULIGHT_FIFO, 1
|
2035 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~3 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~3, SPW_ULIGHT_FIFO, 1
|
2036 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd, SPW_ULIGHT_FIFO, 1
|
2037 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2] , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2], SPW_ULIGHT_FIFO, 1
|
2038 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux|src_data[33] , u0|mm_interconnect_0|cmd_mux|src_data[33], SPW_ULIGHT_FIFO, 1
|
2039 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1] , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1], SPW_ULIGHT_FIFO, 1
|
2040 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux|src_data[35] , u0|mm_interconnect_0|cmd_mux|src_data[35], SPW_ULIGHT_FIFO, 1
|
2041 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3] , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3], SPW_ULIGHT_FIFO, 1
|
2042 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux|src_data[32] , u0|mm_interconnect_0|cmd_mux|src_data[32], SPW_ULIGHT_FIFO, 1
|
2043 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0] , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0], SPW_ULIGHT_FIFO, 1
|
2044 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|cp_ready~2 , u0|mm_interconnect_0|led_pio_test_s1_agent|cp_ready~2, SPW_ULIGHT_FIFO, 1
|
2045 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_translator|waitrequest_reset_override~feeder , u0|mm_interconnect_0|led_pio_test_s1_translator|waitrequest_reset_override~feeder, SPW_ULIGHT_FIFO, 1
|
2046 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_translator|waitrequest_reset_override , u0|mm_interconnect_0|led_pio_test_s1_translator|waitrequest_reset_override, SPW_ULIGHT_FIFO, 1
|
2047 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|cp_ready~3 , u0|mm_interconnect_0|led_pio_test_s1_agent|cp_ready~3, SPW_ULIGHT_FIFO, 1
|
2048 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux|src_data[87] , u0|mm_interconnect_0|cmd_mux|src_data[87], SPW_ULIGHT_FIFO, 1
|
2049 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux|src_data[88] , u0|mm_interconnect_0|cmd_mux|src_data[88], SPW_ULIGHT_FIFO, 1
|
2050 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0, SPW_ULIGHT_FIFO, 1
|
2051 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg, SPW_ULIGHT_FIFO, 1
|
2052 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|cp_ready~4 , u0|mm_interconnect_0|led_pio_test_s1_agent|cp_ready~4, SPW_ULIGHT_FIFO, 1
|
2053 |
|
|
instance = comp, \u0|mm_interconnect_0|router|src_data[103]~4 , u0|mm_interconnect_0|router|src_data[103]~4, SPW_ULIGHT_FIFO, 1
|
2054 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux|src0_valid~2 , u0|mm_interconnect_0|cmd_demux|src0_valid~2, SPW_ULIGHT_FIFO, 1
|
2055 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_channel[0] , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_channel[0], SPW_ULIGHT_FIFO, 1
|
2056 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux|src0_valid~0 , u0|mm_interconnect_0|cmd_demux|src0_valid~0, SPW_ULIGHT_FIFO, 1
|
2057 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_valid , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_valid, SPW_ULIGHT_FIFO, 1
|
2058 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~15 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~15, SPW_ULIGHT_FIFO, 1
|
2059 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE, SPW_ULIGHT_FIFO, 1
|
2060 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux|src_payload[0] , u0|mm_interconnect_0|cmd_mux|src_payload[0], SPW_ULIGHT_FIFO, 1
|
2061 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg, SPW_ULIGHT_FIFO, 1
|
2062 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0, SPW_ULIGHT_FIFO, 1
|
2063 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1, SPW_ULIGHT_FIFO, 1
|
2064 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2, SPW_ULIGHT_FIFO, 1
|
2065 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~8 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~8, SPW_ULIGHT_FIFO, 1
|
2066 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_COMP_TRANS , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_COMP_TRANS, SPW_ULIGHT_FIFO, 1
|
2067 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_valid~0 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_valid~0, SPW_ULIGHT_FIFO, 1
|
2068 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_valid_reg , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_valid_reg, SPW_ULIGHT_FIFO, 1
|
2069 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0, SPW_ULIGHT_FIFO, 1
|
2070 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5] , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5], SPW_ULIGHT_FIFO, 1
|
2071 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~4 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~4, SPW_ULIGHT_FIFO, 1
|
2072 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2] , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
2073 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~1 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~1, SPW_ULIGHT_FIFO, 1
|
2074 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3] , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3], SPW_ULIGHT_FIFO, 1
|
2075 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~2 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~2, SPW_ULIGHT_FIFO, 1
|
2076 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4] , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4], SPW_ULIGHT_FIFO, 1
|
2077 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0, SPW_ULIGHT_FIFO, 1
|
2078 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~3 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~3, SPW_ULIGHT_FIFO, 1
|
2079 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6] , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6], SPW_ULIGHT_FIFO, 1
|
2080 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~5 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~5, SPW_ULIGHT_FIFO, 1
|
2081 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideOr0 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideOr0, SPW_ULIGHT_FIFO, 1
|
2082 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~12 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~12, SPW_ULIGHT_FIFO, 1
|
2083 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10, SPW_ULIGHT_FIFO, 1
|
2084 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11, SPW_ULIGHT_FIFO, 1
|
2085 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9, SPW_ULIGHT_FIFO, 1
|
2086 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~13 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~13, SPW_ULIGHT_FIFO, 1
|
2087 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS, SPW_ULIGHT_FIFO, 1
|
2088 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0, SPW_ULIGHT_FIFO, 1
|
2089 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~2 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~2, SPW_ULIGHT_FIFO, 1
|
2090 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux|last_cycle~0 , u0|mm_interconnect_0|cmd_mux|last_cycle~0, SPW_ULIGHT_FIFO, 1
|
2091 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux|update_grant~0 , u0|mm_interconnect_0|cmd_mux|update_grant~0, SPW_ULIGHT_FIFO, 1
|
2092 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux|saved_grant[1] , u0|mm_interconnect_0|cmd_mux|saved_grant[1], SPW_ULIGHT_FIFO, 1
|
2093 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor0~1 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor0~1, SPW_ULIGHT_FIFO, 1
|
2094 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero, SPW_ULIGHT_FIFO, 1
|
2095 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0, SPW_ULIGHT_FIFO, 1
|
2096 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~14 , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~14, SPW_ULIGHT_FIFO, 1
|
2097 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST, SPW_ULIGHT_FIFO, 1
|
2098 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[1][75] , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[1][75], SPW_ULIGHT_FIFO, 1
|
2099 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem~6 , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem~6, SPW_ULIGHT_FIFO, 1
|
2100 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[0][75]~feeder , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[0][75]~feeder, SPW_ULIGHT_FIFO, 1
|
2101 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|always0~0 , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|always0~0, SPW_ULIGHT_FIFO, 1
|
2102 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[0][75] , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[0][75], SPW_ULIGHT_FIFO, 1
|
2103 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[1][77] , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[1][77], SPW_ULIGHT_FIFO, 1
|
2104 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem~8 , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem~8, SPW_ULIGHT_FIFO, 1
|
2105 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[0][77] , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[0][77], SPW_ULIGHT_FIFO, 1
|
2106 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[1][78] , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[1][78], SPW_ULIGHT_FIFO, 1
|
2107 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem~9 , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem~9, SPW_ULIGHT_FIFO, 1
|
2108 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[0][78] , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[0][78], SPW_ULIGHT_FIFO, 1
|
2109 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[1][76] , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[1][76], SPW_ULIGHT_FIFO, 1
|
2110 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem~7 , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem~7, SPW_ULIGHT_FIFO, 1
|
2111 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[0][76] , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[0][76], SPW_ULIGHT_FIFO, 1
|
2112 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|last_packet_beat~0 , u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|last_packet_beat~0, SPW_ULIGHT_FIFO, 1
|
2113 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|burst_uncompress_byte_counter~1 , u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|burst_uncompress_byte_counter~1, SPW_ULIGHT_FIFO, 1
|
2114 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|burst_uncompress_byte_counter[3] , u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|burst_uncompress_byte_counter[3], SPW_ULIGHT_FIFO, 1
|
2115 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|Add1~1 , u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|Add1~1, SPW_ULIGHT_FIFO, 1
|
2116 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|Add0~0 , u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|Add0~0, SPW_ULIGHT_FIFO, 1
|
2117 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|burst_uncompress_byte_counter~2 , u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|burst_uncompress_byte_counter~2, SPW_ULIGHT_FIFO, 1
|
2118 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|burst_uncompress_byte_counter[4] , u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|burst_uncompress_byte_counter[4], SPW_ULIGHT_FIFO, 1
|
2119 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|Add0~2 , u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|Add0~2, SPW_ULIGHT_FIFO, 1
|
2120 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|burst_uncompress_byte_counter~4 , u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|burst_uncompress_byte_counter~4, SPW_ULIGHT_FIFO, 1
|
2121 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|burst_uncompress_byte_counter[5] , u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|burst_uncompress_byte_counter[5], SPW_ULIGHT_FIFO, 1
|
2122 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|Add0~1 , u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|Add0~1, SPW_ULIGHT_FIFO, 1
|
2123 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|burst_uncompress_byte_counter~3 , u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|burst_uncompress_byte_counter~3, SPW_ULIGHT_FIFO, 1
|
2124 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|burst_uncompress_byte_counter[6] , u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|burst_uncompress_byte_counter[6], SPW_ULIGHT_FIFO, 1
|
2125 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|last_packet_beat~1 , u0|mm_interconnect_0|led_pio_test_s1_agent|uncompressor|last_packet_beat~1, SPW_ULIGHT_FIFO, 1
|
2126 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[1][130] , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[1][130], SPW_ULIGHT_FIFO, 1
|
2127 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem~4 , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem~4, SPW_ULIGHT_FIFO, 1
|
2128 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[0][130] , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[0][130], SPW_ULIGHT_FIFO, 1
|
2129 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|WideOr0~0 , u0|mm_interconnect_0|led_pio_test_s1_agent|WideOr0~0, SPW_ULIGHT_FIFO, 1
|
2130 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66] , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66], SPW_ULIGHT_FIFO, 1
|
2131 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69] , u0|mm_interconnect_0|led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69], SPW_ULIGHT_FIFO, 1
|
2132 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|m0_read~0 , u0|mm_interconnect_0|led_pio_test_s1_agent|m0_read~0, SPW_ULIGHT_FIFO, 1
|
2133 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_translator|read_latency_shift_reg~0 , u0|mm_interconnect_0|led_pio_test_s1_translator|read_latency_shift_reg~0, SPW_ULIGHT_FIFO, 1
|
2134 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|cp_ready~1 , u0|mm_interconnect_0|led_pio_test_s1_agent|cp_ready~1, SPW_ULIGHT_FIFO, 1
|
2135 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_translator|read_latency_shift_reg~1 , u0|mm_interconnect_0|led_pio_test_s1_translator|read_latency_shift_reg~1, SPW_ULIGHT_FIFO, 1
|
2136 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_translator|read_latency_shift_reg[0] , u0|mm_interconnect_0|led_pio_test_s1_translator|read_latency_shift_reg[0], SPW_ULIGHT_FIFO, 1
|
2137 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|nonposted_write_endofpacket~0 , u0|mm_interconnect_0|led_pio_test_s1_agent|nonposted_write_endofpacket~0, SPW_ULIGHT_FIFO, 1
|
2138 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[1][129] , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[1][129], SPW_ULIGHT_FIFO, 1
|
2139 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem~0 , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem~0, SPW_ULIGHT_FIFO, 1
|
2140 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[0][129] , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[0][129], SPW_ULIGHT_FIFO, 1
|
2141 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rdata_fifo|read~0 , u0|mm_interconnect_0|led_pio_test_s1_agent_rdata_fifo|read~0, SPW_ULIGHT_FIFO, 1
|
2142 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rdata_fifo|read~1 , u0|mm_interconnect_0|led_pio_test_s1_agent_rdata_fifo|read~1, SPW_ULIGHT_FIFO, 1
|
2143 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rdata_fifo|mem_used[1]~1 , u0|mm_interconnect_0|led_pio_test_s1_agent_rdata_fifo|mem_used[1]~1, SPW_ULIGHT_FIFO, 1
|
2144 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rdata_fifo|mem_used[1] , u0|mm_interconnect_0|led_pio_test_s1_agent_rdata_fifo|mem_used[1], SPW_ULIGHT_FIFO, 1
|
2145 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rdata_fifo|mem_used[0]~0 , u0|mm_interconnect_0|led_pio_test_s1_agent_rdata_fifo|mem_used[0]~0, SPW_ULIGHT_FIFO, 1
|
2146 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rdata_fifo|mem_used[0] , u0|mm_interconnect_0|led_pio_test_s1_agent_rdata_fifo|mem_used[0], SPW_ULIGHT_FIFO, 1
|
2147 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent|comb~0 , u0|mm_interconnect_0|led_pio_test_s1_agent|comb~0, SPW_ULIGHT_FIFO, 1
|
2148 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[1][66] , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[1][66], SPW_ULIGHT_FIFO, 1
|
2149 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem~3 , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem~3, SPW_ULIGHT_FIFO, 1
|
2150 |
|
|
instance = comp, \u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[0][66] , u0|mm_interconnect_0|led_pio_test_s1_agent_rsp_fifo|mem[0][66], SPW_ULIGHT_FIFO, 1
|
2151 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_mux|src_payload~6 , u0|mm_interconnect_0|rsp_mux|src_payload~6, SPW_ULIGHT_FIFO, 1
|
2152 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor0~0 , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor0~0, SPW_ULIGHT_FIFO, 1
|
2153 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder, SPW_ULIGHT_FIFO, 1
|
2154 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold, SPW_ULIGHT_FIFO, 1
|
2155 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0 , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0, SPW_ULIGHT_FIFO, 1
|
2156 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3] , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3], SPW_ULIGHT_FIFO, 1
|
2157 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder, SPW_ULIGHT_FIFO, 1
|
2158 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2] , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
2159 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~2 , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~2, SPW_ULIGHT_FIFO, 1
|
2160 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0 , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0, SPW_ULIGHT_FIFO, 1
|
2161 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5] , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5], SPW_ULIGHT_FIFO, 1
|
2162 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~3 , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~3, SPW_ULIGHT_FIFO, 1
|
2163 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6] , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6], SPW_ULIGHT_FIFO, 1
|
2164 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~5 , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~5, SPW_ULIGHT_FIFO, 1
|
2165 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideOr0 , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideOr0, SPW_ULIGHT_FIFO, 1
|
2166 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~14 , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~14, SPW_ULIGHT_FIFO, 1
|
2167 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST, SPW_ULIGHT_FIFO, 1
|
2168 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0 , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0, SPW_ULIGHT_FIFO, 1
|
2169 |
|
|
instance = comp, \u0|mm_interconnect_0|router_001|Equal7~1 , u0|mm_interconnect_0|router_001|Equal7~1, SPW_ULIGHT_FIFO, 1
|
2170 |
|
|
instance = comp, \u0|mm_interconnect_0|router_001|Equal7~2 , u0|mm_interconnect_0|router_001|Equal7~2, SPW_ULIGHT_FIFO, 1
|
2171 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[4] , u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[4], SPW_ULIGHT_FIFO, 1
|
2172 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux_001|src4_valid~0 , u0|mm_interconnect_0|cmd_demux_001|src4_valid~0, SPW_ULIGHT_FIFO, 1
|
2173 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_004|src_valid~0 , u0|mm_interconnect_0|cmd_mux_004|src_valid~0, SPW_ULIGHT_FIFO, 1
|
2174 |
|
|
instance = comp, \u0|mm_interconnect_0|router|Equal7~9 , u0|mm_interconnect_0|router|Equal7~9, SPW_ULIGHT_FIFO, 1
|
2175 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_channel[4] , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_channel[4], SPW_ULIGHT_FIFO, 1
|
2176 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux|src4_valid~0 , u0|mm_interconnect_0|cmd_demux|src4_valid~0, SPW_ULIGHT_FIFO, 1
|
2177 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_004|WideOr1 , u0|mm_interconnect_0|cmd_mux_004|WideOr1, SPW_ULIGHT_FIFO, 1
|
2178 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd, SPW_ULIGHT_FIFO, 1
|
2179 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero, SPW_ULIGHT_FIFO, 1
|
2180 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_004|src_payload[0] , u0|mm_interconnect_0|cmd_mux_004|src_payload[0], SPW_ULIGHT_FIFO, 1
|
2181 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg, SPW_ULIGHT_FIFO, 1
|
2182 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0 , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0, SPW_ULIGHT_FIFO, 1
|
2183 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_valid , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_valid, SPW_ULIGHT_FIFO, 1
|
2184 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_valid~0 , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_valid~0, SPW_ULIGHT_FIFO, 1
|
2185 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_valid_reg , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_valid_reg, SPW_ULIGHT_FIFO, 1
|
2186 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[68] , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[68], SPW_ULIGHT_FIFO, 1
|
2187 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|local_write , u0|mm_interconnect_0|data_read_en_rx_s1_agent|local_write, SPW_ULIGHT_FIFO, 1
|
2188 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|cp_ready~4 , u0|mm_interconnect_0|data_read_en_rx_s1_agent|cp_ready~4, SPW_ULIGHT_FIFO, 1
|
2189 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_translator|read_latency_shift_reg~1 , u0|mm_interconnect_0|data_read_en_rx_s1_translator|read_latency_shift_reg~1, SPW_ULIGHT_FIFO, 1
|
2190 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_translator|read_latency_shift_reg[0] , u0|mm_interconnect_0|data_read_en_rx_s1_translator|read_latency_shift_reg[0], SPW_ULIGHT_FIFO, 1
|
2191 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_demux_004|WideOr0~0 , u0|mm_interconnect_0|rsp_demux_004|WideOr0~0, SPW_ULIGHT_FIFO, 1
|
2192 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|always0~0 , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|always0~0, SPW_ULIGHT_FIFO, 1
|
2193 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69] , u0|mm_interconnect_0|data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69], SPW_ULIGHT_FIFO, 1
|
2194 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|m0_read~0 , u0|mm_interconnect_0|data_read_en_rx_s1_agent|m0_read~0, SPW_ULIGHT_FIFO, 1
|
2195 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|nonposted_write_endofpacket~0 , u0|mm_interconnect_0|data_read_en_rx_s1_agent|nonposted_write_endofpacket~0, SPW_ULIGHT_FIFO, 1
|
2196 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|write~0 , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|write~0, SPW_ULIGHT_FIFO, 1
|
2197 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem_used[0]~1 , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem_used[0]~1, SPW_ULIGHT_FIFO, 1
|
2198 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem_used[0] , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem_used[0], SPW_ULIGHT_FIFO, 1
|
2199 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[1][129] , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[1][129], SPW_ULIGHT_FIFO, 1
|
2200 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem~0 , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem~0, SPW_ULIGHT_FIFO, 1
|
2201 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|always0~0 , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|always0~0, SPW_ULIGHT_FIFO, 1
|
2202 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[0][129] , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[0][129], SPW_ULIGHT_FIFO, 1
|
2203 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rdata_fifo|read~0 , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rdata_fifo|read~0, SPW_ULIGHT_FIFO, 1
|
2204 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rdata_fifo|mem_used[1]~1 , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rdata_fifo|mem_used[1]~1, SPW_ULIGHT_FIFO, 1
|
2205 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rdata_fifo|mem_used[1] , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rdata_fifo|mem_used[1], SPW_ULIGHT_FIFO, 1
|
2206 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rdata_fifo|mem_used[0]~0 , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rdata_fifo|mem_used[0]~0, SPW_ULIGHT_FIFO, 1
|
2207 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rdata_fifo|mem_used[0] , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rdata_fifo|mem_used[0], SPW_ULIGHT_FIFO, 1
|
2208 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|comb~0 , u0|mm_interconnect_0|data_read_en_rx_s1_agent|comb~0, SPW_ULIGHT_FIFO, 1
|
2209 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[1][74] , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[1][74], SPW_ULIGHT_FIFO, 1
|
2210 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem~5 , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem~5, SPW_ULIGHT_FIFO, 1
|
2211 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[0][74] , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[0][74], SPW_ULIGHT_FIFO, 1
|
2212 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_busy , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_busy, SPW_ULIGHT_FIFO, 1
|
2213 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[1][77] , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[1][77], SPW_ULIGHT_FIFO, 1
|
2214 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem~8 , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem~8, SPW_ULIGHT_FIFO, 1
|
2215 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[0][77] , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[0][77], SPW_ULIGHT_FIFO, 1
|
2216 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[1][75] , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[1][75], SPW_ULIGHT_FIFO, 1
|
2217 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem~6 , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem~6, SPW_ULIGHT_FIFO, 1
|
2218 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[0][75] , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[0][75], SPW_ULIGHT_FIFO, 1
|
2219 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|Add1~0 , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|Add1~0, SPW_ULIGHT_FIFO, 1
|
2220 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[1][78] , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[1][78], SPW_ULIGHT_FIFO, 1
|
2221 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem~9 , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem~9, SPW_ULIGHT_FIFO, 1
|
2222 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[0][78] , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[0][78], SPW_ULIGHT_FIFO, 1
|
2223 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|Add0~1 , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|Add0~1, SPW_ULIGHT_FIFO, 1
|
2224 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~4 , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~4, SPW_ULIGHT_FIFO, 1
|
2225 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[6] , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[6], SPW_ULIGHT_FIFO, 1
|
2226 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|last_packet_beat~3 , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|last_packet_beat~3, SPW_ULIGHT_FIFO, 1
|
2227 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~6 , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~6, SPW_ULIGHT_FIFO, 1
|
2228 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[7] , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[7], SPW_ULIGHT_FIFO, 1
|
2229 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~0 , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~0, SPW_ULIGHT_FIFO, 1
|
2230 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~1 , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~1, SPW_ULIGHT_FIFO, 1
|
2231 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[2] , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[2], SPW_ULIGHT_FIFO, 1
|
2232 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~2 , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~2, SPW_ULIGHT_FIFO, 1
|
2233 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[3] , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[3], SPW_ULIGHT_FIFO, 1
|
2234 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|Add0~0 , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|Add0~0, SPW_ULIGHT_FIFO, 1
|
2235 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~3 , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~3, SPW_ULIGHT_FIFO, 1
|
2236 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[4] , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[4], SPW_ULIGHT_FIFO, 1
|
2237 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|Add0~2 , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|Add0~2, SPW_ULIGHT_FIFO, 1
|
2238 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|Add1~1 , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|Add1~1, SPW_ULIGHT_FIFO, 1
|
2239 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~5 , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter~5, SPW_ULIGHT_FIFO, 1
|
2240 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[5] , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|burst_uncompress_byte_counter[5], SPW_ULIGHT_FIFO, 1
|
2241 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|last_packet_beat~0 , u0|mm_interconnect_0|data_read_en_rx_s1_agent|uncompressor|last_packet_beat~0, SPW_ULIGHT_FIFO, 1
|
2242 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[1][130] , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[1][130], SPW_ULIGHT_FIFO, 1
|
2243 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem~4 , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem~4, SPW_ULIGHT_FIFO, 1
|
2244 |
|
|
instance = comp, \u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[0][130] , u0|mm_interconnect_0|data_read_en_rx_s1_agent_rsp_fifo|mem[0][130], SPW_ULIGHT_FIFO, 1
|
2245 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_mux|src_payload~7 , u0|mm_interconnect_0|rsp_mux|src_payload~7, SPW_ULIGHT_FIFO, 1
|
2246 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_mux|src_payload~11 , u0|mm_interconnect_0|rsp_mux|src_payload~11, SPW_ULIGHT_FIFO, 1
|
2247 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66] , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66], SPW_ULIGHT_FIFO, 1
|
2248 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][66] , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][66], SPW_ULIGHT_FIFO, 1
|
2249 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem~3 , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem~3, SPW_ULIGHT_FIFO, 1
|
2250 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder, SPW_ULIGHT_FIFO, 1
|
2251 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2] , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
2252 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_translator|wait_latency_counter~1 , u0|mm_interconnect_0|clock_sel_s1_translator|wait_latency_counter~1, SPW_ULIGHT_FIFO, 1
|
2253 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_translator|wait_latency_counter[1] , u0|mm_interconnect_0|clock_sel_s1_translator|wait_latency_counter[1], SPW_ULIGHT_FIFO, 1
|
2254 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_018|src_data[35] , u0|mm_interconnect_0|cmd_mux_018|src_data[35], SPW_ULIGHT_FIFO, 1
|
2255 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3] , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3], SPW_ULIGHT_FIFO, 1
|
2256 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_018|src_data[34] , u0|mm_interconnect_0|cmd_mux_018|src_data[34], SPW_ULIGHT_FIFO, 1
|
2257 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2] , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2], SPW_ULIGHT_FIFO, 1
|
2258 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_018|src_data[32] , u0|mm_interconnect_0|cmd_mux_018|src_data[32], SPW_ULIGHT_FIFO, 1
|
2259 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0] , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0], SPW_ULIGHT_FIFO, 1
|
2260 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_018|src_data[33] , u0|mm_interconnect_0|cmd_mux_018|src_data[33], SPW_ULIGHT_FIFO, 1
|
2261 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1] , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1], SPW_ULIGHT_FIFO, 1
|
2262 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_018|src_data[87] , u0|mm_interconnect_0|cmd_mux_018|src_data[87], SPW_ULIGHT_FIFO, 1
|
2263 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_018|src_data[88] , u0|mm_interconnect_0|cmd_mux_018|src_data[88], SPW_ULIGHT_FIFO, 1
|
2264 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0 , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0, SPW_ULIGHT_FIFO, 1
|
2265 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg, SPW_ULIGHT_FIFO, 1
|
2266 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|WideOr0~0 , u0|mm_interconnect_0|clock_sel_s1_agent|WideOr0~0, SPW_ULIGHT_FIFO, 1
|
2267 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|local_write , u0|mm_interconnect_0|clock_sel_s1_agent|local_write, SPW_ULIGHT_FIFO, 1
|
2268 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|m0_write , u0|mm_interconnect_0|clock_sel_s1_agent|m0_write, SPW_ULIGHT_FIFO, 1
|
2269 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_translator|waitrequest_reset_override~feeder , u0|mm_interconnect_0|clock_sel_s1_translator|waitrequest_reset_override~feeder, SPW_ULIGHT_FIFO, 1
|
2270 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_translator|waitrequest_reset_override , u0|mm_interconnect_0|clock_sel_s1_translator|waitrequest_reset_override, SPW_ULIGHT_FIFO, 1
|
2271 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69] , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69], SPW_ULIGHT_FIFO, 1
|
2272 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|m0_read~0 , u0|mm_interconnect_0|clock_sel_s1_agent|m0_read~0, SPW_ULIGHT_FIFO, 1
|
2273 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_translator|read_latency_shift_reg~0 , u0|mm_interconnect_0|clock_sel_s1_translator|read_latency_shift_reg~0, SPW_ULIGHT_FIFO, 1
|
2274 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_translator|wait_latency_counter[1]~0 , u0|mm_interconnect_0|clock_sel_s1_translator|wait_latency_counter[1]~0, SPW_ULIGHT_FIFO, 1
|
2275 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_translator|wait_latency_counter~2 , u0|mm_interconnect_0|clock_sel_s1_translator|wait_latency_counter~2, SPW_ULIGHT_FIFO, 1
|
2276 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_translator|wait_latency_counter[0] , u0|mm_interconnect_0|clock_sel_s1_translator|wait_latency_counter[0], SPW_ULIGHT_FIFO, 1
|
2277 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|cp_ready~0 , u0|mm_interconnect_0|clock_sel_s1_agent|cp_ready~0, SPW_ULIGHT_FIFO, 1
|
2278 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0 , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0, SPW_ULIGHT_FIFO, 1
|
2279 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~4 , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~4, SPW_ULIGHT_FIFO, 1
|
2280 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2] , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
2281 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~3 , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~3, SPW_ULIGHT_FIFO, 1
|
2282 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3] , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3], SPW_ULIGHT_FIFO, 1
|
2283 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~2 , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~2, SPW_ULIGHT_FIFO, 1
|
2284 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4] , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4], SPW_ULIGHT_FIFO, 1
|
2285 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][76] , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][76], SPW_ULIGHT_FIFO, 1
|
2286 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0 , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0, SPW_ULIGHT_FIFO, 1
|
2287 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~1 , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~1, SPW_ULIGHT_FIFO, 1
|
2288 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5] , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5], SPW_ULIGHT_FIFO, 1
|
2289 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6] , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6], SPW_ULIGHT_FIFO, 1
|
2290 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~5 , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~5, SPW_ULIGHT_FIFO, 1
|
2291 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideOr0 , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideOr0, SPW_ULIGHT_FIFO, 1
|
2292 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~14 , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~14, SPW_ULIGHT_FIFO, 1
|
2293 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST, SPW_ULIGHT_FIFO, 1
|
2294 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem~7 , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem~7, SPW_ULIGHT_FIFO, 1
|
2295 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[0][76] , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[0][76], SPW_ULIGHT_FIFO, 1
|
2296 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_busy , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_busy, SPW_ULIGHT_FIFO, 1
|
2297 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][74] , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][74], SPW_ULIGHT_FIFO, 1
|
2298 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem~5 , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem~5, SPW_ULIGHT_FIFO, 1
|
2299 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[0][74] , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[0][74], SPW_ULIGHT_FIFO, 1
|
2300 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][77] , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][77], SPW_ULIGHT_FIFO, 1
|
2301 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem~8 , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem~8, SPW_ULIGHT_FIFO, 1
|
2302 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[0][77] , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[0][77], SPW_ULIGHT_FIFO, 1
|
2303 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][78] , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][78], SPW_ULIGHT_FIFO, 1
|
2304 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem~9 , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem~9, SPW_ULIGHT_FIFO, 1
|
2305 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[0][78] , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[0][78], SPW_ULIGHT_FIFO, 1
|
2306 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][75] , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][75], SPW_ULIGHT_FIFO, 1
|
2307 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem~6 , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem~6, SPW_ULIGHT_FIFO, 1
|
2308 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[0][75] , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[0][75], SPW_ULIGHT_FIFO, 1
|
2309 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|last_packet_beat~0 , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|last_packet_beat~0, SPW_ULIGHT_FIFO, 1
|
2310 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter~1 , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter~1, SPW_ULIGHT_FIFO, 1
|
2311 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter[3] , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter[3], SPW_ULIGHT_FIFO, 1
|
2312 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|Add0~0 , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|Add0~0, SPW_ULIGHT_FIFO, 1
|
2313 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter~2 , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter~2, SPW_ULIGHT_FIFO, 1
|
2314 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter[4] , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter[4], SPW_ULIGHT_FIFO, 1
|
2315 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|Add0~2 , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|Add0~2, SPW_ULIGHT_FIFO, 1
|
2316 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|Add1~1 , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|Add1~1, SPW_ULIGHT_FIFO, 1
|
2317 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter~4 , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter~4, SPW_ULIGHT_FIFO, 1
|
2318 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter[5] , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter[5], SPW_ULIGHT_FIFO, 1
|
2319 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|Add0~1 , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|Add0~1, SPW_ULIGHT_FIFO, 1
|
2320 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|Add1~0 , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|Add1~0, SPW_ULIGHT_FIFO, 1
|
2321 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter~3 , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter~3, SPW_ULIGHT_FIFO, 1
|
2322 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter[6] , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter[6], SPW_ULIGHT_FIFO, 1
|
2323 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|last_packet_beat~1 , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|last_packet_beat~1, SPW_ULIGHT_FIFO, 1
|
2324 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter~6 , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter~6, SPW_ULIGHT_FIFO, 1
|
2325 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter[7] , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter[7], SPW_ULIGHT_FIFO, 1
|
2326 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter~0 , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter~0, SPW_ULIGHT_FIFO, 1
|
2327 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter~5 , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter~5, SPW_ULIGHT_FIFO, 1
|
2328 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter[2] , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|burst_uncompress_byte_counter[2], SPW_ULIGHT_FIFO, 1
|
2329 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|cp_ready~3 , u0|mm_interconnect_0|clock_sel_s1_agent|cp_ready~3, SPW_ULIGHT_FIFO, 1
|
2330 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_translator|read_latency_shift_reg~1 , u0|mm_interconnect_0|clock_sel_s1_translator|read_latency_shift_reg~1, SPW_ULIGHT_FIFO, 1
|
2331 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_translator|read_latency_shift_reg[0] , u0|mm_interconnect_0|clock_sel_s1_translator|read_latency_shift_reg[0], SPW_ULIGHT_FIFO, 1
|
2332 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|nonposted_write_endofpacket~0 , u0|mm_interconnect_0|clock_sel_s1_agent|nonposted_write_endofpacket~0, SPW_ULIGHT_FIFO, 1
|
2333 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][129] , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][129], SPW_ULIGHT_FIFO, 1
|
2334 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem~0 , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem~0, SPW_ULIGHT_FIFO, 1
|
2335 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[0][129] , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[0][129], SPW_ULIGHT_FIFO, 1
|
2336 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rdata_fifo|read~0 , u0|mm_interconnect_0|clock_sel_s1_agent_rdata_fifo|read~0, SPW_ULIGHT_FIFO, 1
|
2337 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rdata_fifo|mem_used[1]~1 , u0|mm_interconnect_0|clock_sel_s1_agent_rdata_fifo|mem_used[1]~1, SPW_ULIGHT_FIFO, 1
|
2338 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rdata_fifo|mem_used[1] , u0|mm_interconnect_0|clock_sel_s1_agent_rdata_fifo|mem_used[1], SPW_ULIGHT_FIFO, 1
|
2339 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rdata_fifo|mem_used[0]~0 , u0|mm_interconnect_0|clock_sel_s1_agent_rdata_fifo|mem_used[0]~0, SPW_ULIGHT_FIFO, 1
|
2340 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rdata_fifo|mem_used[0] , u0|mm_interconnect_0|clock_sel_s1_agent_rdata_fifo|mem_used[0], SPW_ULIGHT_FIFO, 1
|
2341 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|comb~0 , u0|mm_interconnect_0|clock_sel_s1_agent|comb~0, SPW_ULIGHT_FIFO, 1
|
2342 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|last_packet_beat , u0|mm_interconnect_0|clock_sel_s1_agent|uncompressor|last_packet_beat, SPW_ULIGHT_FIFO, 1
|
2343 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|always0~0 , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|always0~0, SPW_ULIGHT_FIFO, 1
|
2344 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[0][66] , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[0][66], SPW_ULIGHT_FIFO, 1
|
2345 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][69] , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][69], SPW_ULIGHT_FIFO, 1
|
2346 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem~1 , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem~1, SPW_ULIGHT_FIFO, 1
|
2347 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[0][69] , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[0][69], SPW_ULIGHT_FIFO, 1
|
2348 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_demux_018|src0_valid~0 , u0|mm_interconnect_0|rsp_demux_018|src0_valid~0, SPW_ULIGHT_FIFO, 1
|
2349 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][130] , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][130], SPW_ULIGHT_FIFO, 1
|
2350 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem~4 , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem~4, SPW_ULIGHT_FIFO, 1
|
2351 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[0][130] , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[0][130], SPW_ULIGHT_FIFO, 1
|
2352 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_mux|src_payload~9 , u0|mm_interconnect_0|rsp_mux|src_payload~9, SPW_ULIGHT_FIFO, 1
|
2353 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|response_sink_accepted , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|response_sink_accepted, SPW_ULIGHT_FIFO, 1
|
2354 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|pending_response_count[0]~1 , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|pending_response_count[0]~1, SPW_ULIGHT_FIFO, 1
|
2355 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux|sink_ready~7 , u0|mm_interconnect_0|cmd_demux|sink_ready~7, SPW_ULIGHT_FIFO, 1
|
2356 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux|sink_ready~6 , u0|mm_interconnect_0|cmd_demux|sink_ready~6, SPW_ULIGHT_FIFO, 1
|
2357 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux|sink_ready~5 , u0|mm_interconnect_0|cmd_demux|sink_ready~5, SPW_ULIGHT_FIFO, 1
|
2358 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux|WideOr0~1 , u0|mm_interconnect_0|cmd_demux|WideOr0~1, SPW_ULIGHT_FIFO, 1
|
2359 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux|sink_ready~3 , u0|mm_interconnect_0|cmd_demux|sink_ready~3, SPW_ULIGHT_FIFO, 1
|
2360 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux|sink_ready~4 , u0|mm_interconnect_0|cmd_demux|sink_ready~4, SPW_ULIGHT_FIFO, 1
|
2361 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux|sink_ready~9 , u0|mm_interconnect_0|cmd_demux|sink_ready~9, SPW_ULIGHT_FIFO, 1
|
2362 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor0~0 , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor0~0, SPW_ULIGHT_FIFO, 1
|
2363 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero, SPW_ULIGHT_FIFO, 1
|
2364 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_007|src_data[88] , u0|mm_interconnect_0|cmd_mux_007|src_data[88], SPW_ULIGHT_FIFO, 1
|
2365 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_007|src_data[87] , u0|mm_interconnect_0|cmd_mux_007|src_data[87], SPW_ULIGHT_FIFO, 1
|
2366 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0 , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0, SPW_ULIGHT_FIFO, 1
|
2367 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg, SPW_ULIGHT_FIFO, 1
|
2368 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_007|src_data[34] , u0|mm_interconnect_0|cmd_mux_007|src_data[34], SPW_ULIGHT_FIFO, 1
|
2369 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2] , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2], SPW_ULIGHT_FIFO, 1
|
2370 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_007|src_data[32] , u0|mm_interconnect_0|cmd_mux_007|src_data[32], SPW_ULIGHT_FIFO, 1
|
2371 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0] , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0], SPW_ULIGHT_FIFO, 1
|
2372 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_007|src_data[35] , u0|mm_interconnect_0|cmd_mux_007|src_data[35], SPW_ULIGHT_FIFO, 1
|
2373 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3] , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3], SPW_ULIGHT_FIFO, 1
|
2374 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|cp_ready~1 , u0|mm_interconnect_0|link_start_s1_agent|cp_ready~1, SPW_ULIGHT_FIFO, 1
|
2375 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|cp_ready~2 , u0|mm_interconnect_0|link_start_s1_agent|cp_ready~2, SPW_ULIGHT_FIFO, 1
|
2376 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_agent|cp_ready~3 , u0|mm_interconnect_0|link_start_s1_agent|cp_ready~3, SPW_ULIGHT_FIFO, 1
|
2377 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder, SPW_ULIGHT_FIFO, 1
|
2378 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold, SPW_ULIGHT_FIFO, 1
|
2379 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_valid , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_valid, SPW_ULIGHT_FIFO, 1
|
2380 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~15 , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~15, SPW_ULIGHT_FIFO, 1
|
2381 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE, SPW_ULIGHT_FIFO, 1
|
2382 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_007|src_payload[0] , u0|mm_interconnect_0|cmd_mux_007|src_payload[0], SPW_ULIGHT_FIFO, 1
|
2383 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg, SPW_ULIGHT_FIFO, 1
|
2384 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0 , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0, SPW_ULIGHT_FIFO, 1
|
2385 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1 , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1, SPW_ULIGHT_FIFO, 1
|
2386 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2 , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2, SPW_ULIGHT_FIFO, 1
|
2387 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~8 , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~8, SPW_ULIGHT_FIFO, 1
|
2388 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_COMP_TRANS , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_COMP_TRANS, SPW_ULIGHT_FIFO, 1
|
2389 |
|
|
instance = comp, \u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0 , u0|mm_interconnect_0|link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0, SPW_ULIGHT_FIFO, 1
|
2390 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux|sink_ready~8 , u0|mm_interconnect_0|cmd_demux|sink_ready~8, SPW_ULIGHT_FIFO, 1
|
2391 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux|WideOr0~2 , u0|mm_interconnect_0|cmd_demux|WideOr0~2, SPW_ULIGHT_FIFO, 1
|
2392 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux|WideOr0~3 , u0|mm_interconnect_0|cmd_demux|WideOr0~3, SPW_ULIGHT_FIFO, 1
|
2393 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|pending_response_count[1]~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|pending_response_count[1]~0, SPW_ULIGHT_FIFO, 1
|
2394 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|pending_response_count[0] , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|pending_response_count[0], SPW_ULIGHT_FIFO, 1
|
2395 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|Add0~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|Add0~0, SPW_ULIGHT_FIFO, 1
|
2396 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|pending_response_count[1] , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|pending_response_count[1], SPW_ULIGHT_FIFO, 1
|
2397 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|has_pending_responses~0 , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|has_pending_responses~0, SPW_ULIGHT_FIFO, 1
|
2398 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|has_pending_responses , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|has_pending_responses, SPW_ULIGHT_FIFO, 1
|
2399 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_channel[14] , u0|mm_interconnect_0|hps_0_h2f_axi_master_wr_limiter|last_channel[14], SPW_ULIGHT_FIFO, 1
|
2400 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux|src14_valid~0 , u0|mm_interconnect_0|cmd_demux|src14_valid~0, SPW_ULIGHT_FIFO, 1
|
2401 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_demux|src14_valid~1 , u0|mm_interconnect_0|cmd_demux|src14_valid~1, SPW_ULIGHT_FIFO, 1
|
2402 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd, SPW_ULIGHT_FIFO, 1
|
2403 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[116] , u0|mm_interconnect_0|timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[116], SPW_ULIGHT_FIFO, 1
|
2404 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem~21 , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem~21, SPW_ULIGHT_FIFO, 1
|
2405 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][116] , u0|mm_interconnect_0|timecode_tx_data_s1_agent_rsp_fifo|mem[0][116], SPW_ULIGHT_FIFO, 1
|
2406 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_011|src_data[116] , u0|mm_interconnect_0|cmd_mux_011|src_data[116], SPW_ULIGHT_FIFO, 1
|
2407 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[116] , u0|mm_interconnect_0|write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[116], SPW_ULIGHT_FIFO, 1
|
2408 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[1][116] , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[1][116], SPW_ULIGHT_FIFO, 1
|
2409 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem~21 , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem~21, SPW_ULIGHT_FIFO, 1
|
2410 |
|
|
instance = comp, \u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[0][116] , u0|mm_interconnect_0|write_en_tx_s1_agent_rsp_fifo|mem[0][116], SPW_ULIGHT_FIFO, 1
|
2411 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_demux_014|src1_valid , u0|mm_interconnect_0|rsp_demux_014|src1_valid, SPW_ULIGHT_FIFO, 1
|
2412 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_mux_001|src_data[116]~201 , u0|mm_interconnect_0|rsp_mux_001|src_data[116]~201, SPW_ULIGHT_FIFO, 1
|
2413 |
|
|
instance = comp, \u0|mm_interconnect_0|router_001|Equal8~0 , u0|mm_interconnect_0|router_001|Equal8~0, SPW_ULIGHT_FIFO, 1
|
2414 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[19] , u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[19], SPW_ULIGHT_FIFO, 1
|
2415 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_019|last_cycle~0 , u0|mm_interconnect_0|cmd_mux_019|last_cycle~0, SPW_ULIGHT_FIFO, 1
|
2416 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder, SPW_ULIGHT_FIFO, 1
|
2417 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold, SPW_ULIGHT_FIFO, 1
|
2418 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4] , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4], SPW_ULIGHT_FIFO, 1
|
2419 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder, SPW_ULIGHT_FIFO, 1
|
2420 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2] , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
2421 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~2 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~2, SPW_ULIGHT_FIFO, 1
|
2422 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2] , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2], SPW_ULIGHT_FIFO, 1
|
2423 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~0 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~0, SPW_ULIGHT_FIFO, 1
|
2424 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3] , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3], SPW_ULIGHT_FIFO, 1
|
2425 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1, SPW_ULIGHT_FIFO, 1
|
2426 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~4 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~4, SPW_ULIGHT_FIFO, 1
|
2427 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0, SPW_ULIGHT_FIFO, 1
|
2428 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6] , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6], SPW_ULIGHT_FIFO, 1
|
2429 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~1 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~1, SPW_ULIGHT_FIFO, 1
|
2430 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5] , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5], SPW_ULIGHT_FIFO, 1
|
2431 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~3 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~3, SPW_ULIGHT_FIFO, 1
|
2432 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_translator|waitrequest_reset_override~feeder , u0|mm_interconnect_0|fsm_info_s1_translator|waitrequest_reset_override~feeder, SPW_ULIGHT_FIFO, 1
|
2433 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_translator|waitrequest_reset_override , u0|mm_interconnect_0|fsm_info_s1_translator|waitrequest_reset_override, SPW_ULIGHT_FIFO, 1
|
2434 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd, SPW_ULIGHT_FIFO, 1
|
2435 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66] , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66], SPW_ULIGHT_FIFO, 1
|
2436 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69] , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[69], SPW_ULIGHT_FIFO, 1
|
2437 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_translator|wait_latency_counter~0 , u0|mm_interconnect_0|fsm_info_s1_translator|wait_latency_counter~0, SPW_ULIGHT_FIFO, 1
|
2438 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_translator|wait_latency_counter[1] , u0|mm_interconnect_0|fsm_info_s1_translator|wait_latency_counter[1], SPW_ULIGHT_FIFO, 1
|
2439 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_translator|read_latency_shift_reg~1 , u0|mm_interconnect_0|fsm_info_s1_translator|read_latency_shift_reg~1, SPW_ULIGHT_FIFO, 1
|
2440 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_translator|read_latency_shift_reg[0] , u0|mm_interconnect_0|fsm_info_s1_translator|read_latency_shift_reg[0], SPW_ULIGHT_FIFO, 1
|
2441 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2] , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
2442 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|cp_ready~1 , u0|mm_interconnect_0|fsm_info_s1_agent|cp_ready~1, SPW_ULIGHT_FIFO, 1
|
2443 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0, SPW_ULIGHT_FIFO, 1
|
2444 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~5 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~5, SPW_ULIGHT_FIFO, 1
|
2445 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4] , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4], SPW_ULIGHT_FIFO, 1
|
2446 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~2 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~2, SPW_ULIGHT_FIFO, 1
|
2447 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5] , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5], SPW_ULIGHT_FIFO, 1
|
2448 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0, SPW_ULIGHT_FIFO, 1
|
2449 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~3 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~3, SPW_ULIGHT_FIFO, 1
|
2450 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6] , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6], SPW_ULIGHT_FIFO, 1
|
2451 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~4 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~4, SPW_ULIGHT_FIFO, 1
|
2452 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor1 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor1, SPW_ULIGHT_FIFO, 1
|
2453 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~10, SPW_ULIGHT_FIFO, 1
|
2454 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_WR_SUBBURST, SPW_ULIGHT_FIFO, 1
|
2455 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9, SPW_ULIGHT_FIFO, 1
|
2456 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS, SPW_ULIGHT_FIFO, 1
|
2457 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~1 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~1, SPW_ULIGHT_FIFO, 1
|
2458 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3] , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3], SPW_ULIGHT_FIFO, 1
|
2459 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[1][75] , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[1][75], SPW_ULIGHT_FIFO, 1
|
2460 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem~6 , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem~6, SPW_ULIGHT_FIFO, 1
|
2461 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|always0~0 , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|always0~0, SPW_ULIGHT_FIFO, 1
|
2462 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[0][75] , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[0][75], SPW_ULIGHT_FIFO, 1
|
2463 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[1][76] , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[1][76], SPW_ULIGHT_FIFO, 1
|
2464 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem~5 , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem~5, SPW_ULIGHT_FIFO, 1
|
2465 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[0][76] , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[0][76], SPW_ULIGHT_FIFO, 1
|
2466 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[1][74] , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[1][74], SPW_ULIGHT_FIFO, 1
|
2467 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem~7 , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem~7, SPW_ULIGHT_FIFO, 1
|
2468 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[0][74] , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[0][74], SPW_ULIGHT_FIFO, 1
|
2469 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[1][77] , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[1][77], SPW_ULIGHT_FIFO, 1
|
2470 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem~4 , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem~4, SPW_ULIGHT_FIFO, 1
|
2471 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[0][77] , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[0][77], SPW_ULIGHT_FIFO, 1
|
2472 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|Add1~0 , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|Add1~0, SPW_ULIGHT_FIFO, 1
|
2473 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[1][78] , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[1][78], SPW_ULIGHT_FIFO, 1
|
2474 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem~3 , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem~3, SPW_ULIGHT_FIFO, 1
|
2475 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[0][78] , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[0][78], SPW_ULIGHT_FIFO, 1
|
2476 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter~1 , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter~1, SPW_ULIGHT_FIFO, 1
|
2477 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter[3] , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter[3], SPW_ULIGHT_FIFO, 1
|
2478 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|Add0~2 , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|Add0~2, SPW_ULIGHT_FIFO, 1
|
2479 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|Add1~1 , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|Add1~1, SPW_ULIGHT_FIFO, 1
|
2480 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter~4 , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter~4, SPW_ULIGHT_FIFO, 1
|
2481 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter[5] , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter[5], SPW_ULIGHT_FIFO, 1
|
2482 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|Add0~1 , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|Add0~1, SPW_ULIGHT_FIFO, 1
|
2483 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter~3 , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter~3, SPW_ULIGHT_FIFO, 1
|
2484 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter[6] , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter[6], SPW_ULIGHT_FIFO, 1
|
2485 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter~6 , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter~6, SPW_ULIGHT_FIFO, 1
|
2486 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter[7] , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter[7], SPW_ULIGHT_FIFO, 1
|
2487 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_busy , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_busy, SPW_ULIGHT_FIFO, 1
|
2488 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter~0 , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter~0, SPW_ULIGHT_FIFO, 1
|
2489 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|last_packet_beat~2 , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|last_packet_beat~2, SPW_ULIGHT_FIFO, 1
|
2490 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter~5 , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter~5, SPW_ULIGHT_FIFO, 1
|
2491 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter[2] , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter[2], SPW_ULIGHT_FIFO, 1
|
2492 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|Add0~0 , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|Add0~0, SPW_ULIGHT_FIFO, 1
|
2493 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter~2 , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter~2, SPW_ULIGHT_FIFO, 1
|
2494 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter[4] , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|burst_uncompress_byte_counter[4], SPW_ULIGHT_FIFO, 1
|
2495 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|last_packet_beat~1 , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|last_packet_beat~1, SPW_ULIGHT_FIFO, 1
|
2496 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|last_packet_beat~0 , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|last_packet_beat~0, SPW_ULIGHT_FIFO, 1
|
2497 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[1][66] , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[1][66], SPW_ULIGHT_FIFO, 1
|
2498 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem~2 , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem~2, SPW_ULIGHT_FIFO, 1
|
2499 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[0][66] , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[0][66], SPW_ULIGHT_FIFO, 1
|
2500 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|last_packet_beat , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|last_packet_beat, SPW_ULIGHT_FIFO, 1
|
2501 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|write~0 , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|write~0, SPW_ULIGHT_FIFO, 1
|
2502 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem_used[0]~1 , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem_used[0]~1, SPW_ULIGHT_FIFO, 1
|
2503 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem_used[0] , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem_used[0], SPW_ULIGHT_FIFO, 1
|
2504 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rdata_fifo|read~0 , u0|mm_interconnect_0|fsm_info_s1_agent_rdata_fifo|read~0, SPW_ULIGHT_FIFO, 1
|
2505 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rdata_fifo|mem_used[1]~1 , u0|mm_interconnect_0|fsm_info_s1_agent_rdata_fifo|mem_used[1]~1, SPW_ULIGHT_FIFO, 1
|
2506 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rdata_fifo|mem_used[1] , u0|mm_interconnect_0|fsm_info_s1_agent_rdata_fifo|mem_used[1], SPW_ULIGHT_FIFO, 1
|
2507 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rdata_fifo|mem_used[0]~0 , u0|mm_interconnect_0|fsm_info_s1_agent_rdata_fifo|mem_used[0]~0, SPW_ULIGHT_FIFO, 1
|
2508 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rdata_fifo|mem_used[0] , u0|mm_interconnect_0|fsm_info_s1_agent_rdata_fifo|mem_used[0], SPW_ULIGHT_FIFO, 1
|
2509 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|comb~0 , u0|mm_interconnect_0|fsm_info_s1_agent|comb~0, SPW_ULIGHT_FIFO, 1
|
2510 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|always0~0 , u0|mm_interconnect_0|fsm_info_s1_agent|uncompressor|always0~0, SPW_ULIGHT_FIFO, 1
|
2511 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem_used[1]~0 , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem_used[1]~0, SPW_ULIGHT_FIFO, 1
|
2512 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem_used[1] , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem_used[1], SPW_ULIGHT_FIFO, 1
|
2513 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem~0 , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem~0, SPW_ULIGHT_FIFO, 1
|
2514 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_translator|read_latency_shift_reg~0 , u0|mm_interconnect_0|fsm_info_s1_translator|read_latency_shift_reg~0, SPW_ULIGHT_FIFO, 1
|
2515 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_translator|wait_latency_counter~1 , u0|mm_interconnect_0|fsm_info_s1_translator|wait_latency_counter~1, SPW_ULIGHT_FIFO, 1
|
2516 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_translator|wait_latency_counter[0] , u0|mm_interconnect_0|fsm_info_s1_translator|wait_latency_counter[0], SPW_ULIGHT_FIFO, 1
|
2517 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|cp_ready~0 , u0|mm_interconnect_0|fsm_info_s1_agent|cp_ready~0, SPW_ULIGHT_FIFO, 1
|
2518 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero~0 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero~0, SPW_ULIGHT_FIFO, 1
|
2519 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero, SPW_ULIGHT_FIFO, 1
|
2520 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3] , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[3], SPW_ULIGHT_FIFO, 1
|
2521 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1] , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[1], SPW_ULIGHT_FIFO, 1
|
2522 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0] , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[0], SPW_ULIGHT_FIFO, 1
|
2523 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|LessThan0~0, SPW_ULIGHT_FIFO, 1
|
2524 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_narrow_reg, SPW_ULIGHT_FIFO, 1
|
2525 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|cp_ready~2 , u0|mm_interconnect_0|fsm_info_s1_agent|cp_ready~2, SPW_ULIGHT_FIFO, 1
|
2526 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~1, SPW_ULIGHT_FIFO, 1
|
2527 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11, SPW_ULIGHT_FIFO, 1
|
2528 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE, SPW_ULIGHT_FIFO, 1
|
2529 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg, SPW_ULIGHT_FIFO, 1
|
2530 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~0, SPW_ULIGHT_FIFO, 1
|
2531 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Selector1~2, SPW_ULIGHT_FIFO, 1
|
2532 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0, SPW_ULIGHT_FIFO, 1
|
2533 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg, SPW_ULIGHT_FIFO, 1
|
2534 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~1 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~1, SPW_ULIGHT_FIFO, 1
|
2535 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_valid~0 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_valid~0, SPW_ULIGHT_FIFO, 1
|
2536 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_valid_reg , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_valid_reg, SPW_ULIGHT_FIFO, 1
|
2537 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|load_next_out_cmd , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|load_next_out_cmd, SPW_ULIGHT_FIFO, 1
|
2538 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~8 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~8, SPW_ULIGHT_FIFO, 1
|
2539 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_COMP_TRANS , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_COMP_TRANS, SPW_ULIGHT_FIFO, 1
|
2540 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0, SPW_ULIGHT_FIFO, 1
|
2541 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~0, SPW_ULIGHT_FIFO, 1
|
2542 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~1 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~1, SPW_ULIGHT_FIFO, 1
|
2543 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~2 , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_in_ready~2, SPW_ULIGHT_FIFO, 1
|
2544 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_019|packet_in_progress~0 , u0|mm_interconnect_0|cmd_mux_019|packet_in_progress~0, SPW_ULIGHT_FIFO, 1
|
2545 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_019|packet_in_progress , u0|mm_interconnect_0|cmd_mux_019|packet_in_progress, SPW_ULIGHT_FIFO, 1
|
2546 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_019|update_grant~0 , u0|mm_interconnect_0|cmd_mux_019|update_grant~0, SPW_ULIGHT_FIFO, 1
|
2547 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_019|saved_grant[1] , u0|mm_interconnect_0|cmd_mux_019|saved_grant[1], SPW_ULIGHT_FIFO, 1
|
2548 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2] , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_byteen_reg[2], SPW_ULIGHT_FIFO, 1
|
2549 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|WideOr0~0 , u0|mm_interconnect_0|fsm_info_s1_agent|WideOr0~0, SPW_ULIGHT_FIFO, 1
|
2550 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[1][129] , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[1][129], SPW_ULIGHT_FIFO, 1
|
2551 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem~1 , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem~1, SPW_ULIGHT_FIFO, 1
|
2552 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[0][129] , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[0][129], SPW_ULIGHT_FIFO, 1
|
2553 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent|rp_valid , u0|mm_interconnect_0|fsm_info_s1_agent|rp_valid, SPW_ULIGHT_FIFO, 1
|
2554 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[1][116] , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[1][116], SPW_ULIGHT_FIFO, 1
|
2555 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_019|src_payload~11 , u0|mm_interconnect_0|cmd_mux_019|src_payload~11, SPW_ULIGHT_FIFO, 1
|
2556 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[116] , u0|mm_interconnect_0|fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[116], SPW_ULIGHT_FIFO, 1
|
2557 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem~20 , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem~20, SPW_ULIGHT_FIFO, 1
|
2558 |
|
|
instance = comp, \u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[0][116] , u0|mm_interconnect_0|fsm_info_s1_agent_rsp_fifo|mem[0][116], SPW_ULIGHT_FIFO, 1
|
2559 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_008|src_data[116] , u0|mm_interconnect_0|cmd_mux_008|src_data[116], SPW_ULIGHT_FIFO, 1
|
2560 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[116] , u0|mm_interconnect_0|auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[116], SPW_ULIGHT_FIFO, 1
|
2561 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][116] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[1][116], SPW_ULIGHT_FIFO, 1
|
2562 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~21 , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem~21, SPW_ULIGHT_FIFO, 1
|
2563 |
|
|
instance = comp, \u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][116] , u0|mm_interconnect_0|auto_start_s1_agent_rsp_fifo|mem[0][116], SPW_ULIGHT_FIFO, 1
|
2564 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_mux_001|src_data[116]~198 , u0|mm_interconnect_0|rsp_mux_001|src_data[116]~198, SPW_ULIGHT_FIFO, 1
|
2565 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[1][116] , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[1][116], SPW_ULIGHT_FIFO, 1
|
2566 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_021|src_payload~11 , u0|mm_interconnect_0|cmd_mux_021|src_payload~11, SPW_ULIGHT_FIFO, 1
|
2567 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder, SPW_ULIGHT_FIFO, 1
|
2568 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold, SPW_ULIGHT_FIFO, 1
|
2569 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd, SPW_ULIGHT_FIFO, 1
|
2570 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[116] , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[116], SPW_ULIGHT_FIFO, 1
|
2571 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem~20 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem~20, SPW_ULIGHT_FIFO, 1
|
2572 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[0][116]~feeder , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[0][116]~feeder, SPW_ULIGHT_FIFO, 1
|
2573 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0 , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt~0, SPW_ULIGHT_FIFO, 1
|
2574 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~4 , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~4, SPW_ULIGHT_FIFO, 1
|
2575 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3] , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3], SPW_ULIGHT_FIFO, 1
|
2576 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~3 , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~3, SPW_ULIGHT_FIFO, 1
|
2577 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4] , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4], SPW_ULIGHT_FIFO, 1
|
2578 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0 , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0, SPW_ULIGHT_FIFO, 1
|
2579 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~2 , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~2, SPW_ULIGHT_FIFO, 1
|
2580 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5] , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5], SPW_ULIGHT_FIFO, 1
|
2581 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6] , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6], SPW_ULIGHT_FIFO, 1
|
2582 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~1 , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[6]~1, SPW_ULIGHT_FIFO, 1
|
2583 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor1 , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|WideNor1, SPW_ULIGHT_FIFO, 1
|
2584 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9 , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~9, SPW_ULIGHT_FIFO, 1
|
2585 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_UNCOMP_TRANS, SPW_ULIGHT_FIFO, 1
|
2586 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~5 , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[2]~5, SPW_ULIGHT_FIFO, 1
|
2587 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2] , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
2588 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[1][74] , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[1][74], SPW_ULIGHT_FIFO, 1
|
2589 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem~7 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem~7, SPW_ULIGHT_FIFO, 1
|
2590 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[0][74] , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[0][74], SPW_ULIGHT_FIFO, 1
|
2591 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[1][77] , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[1][77], SPW_ULIGHT_FIFO, 1
|
2592 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem~4 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem~4, SPW_ULIGHT_FIFO, 1
|
2593 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[0][77] , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[0][77], SPW_ULIGHT_FIFO, 1
|
2594 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[1][76] , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[1][76], SPW_ULIGHT_FIFO, 1
|
2595 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem~5 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem~5, SPW_ULIGHT_FIFO, 1
|
2596 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[0][76] , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[0][76], SPW_ULIGHT_FIFO, 1
|
2597 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[1][75] , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[1][75], SPW_ULIGHT_FIFO, 1
|
2598 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem~6 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem~6, SPW_ULIGHT_FIFO, 1
|
2599 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[0][75] , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[0][75], SPW_ULIGHT_FIFO, 1
|
2600 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|Add1~0 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|Add1~0, SPW_ULIGHT_FIFO, 1
|
2601 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[1][78] , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[1][78], SPW_ULIGHT_FIFO, 1
|
2602 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem~3 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem~3, SPW_ULIGHT_FIFO, 1
|
2603 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[0][78] , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[0][78], SPW_ULIGHT_FIFO, 1
|
2604 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~1 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~1, SPW_ULIGHT_FIFO, 1
|
2605 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[3] , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[3], SPW_ULIGHT_FIFO, 1
|
2606 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|Add1~1 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|Add1~1, SPW_ULIGHT_FIFO, 1
|
2607 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|Add0~0 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|Add0~0, SPW_ULIGHT_FIFO, 1
|
2608 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~2 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~2, SPW_ULIGHT_FIFO, 1
|
2609 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[4] , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[4], SPW_ULIGHT_FIFO, 1
|
2610 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|Add0~2 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|Add0~2, SPW_ULIGHT_FIFO, 1
|
2611 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~4 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~4, SPW_ULIGHT_FIFO, 1
|
2612 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[5] , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[5], SPW_ULIGHT_FIFO, 1
|
2613 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|Add0~1 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|Add0~1, SPW_ULIGHT_FIFO, 1
|
2614 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~3 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~3, SPW_ULIGHT_FIFO, 1
|
2615 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[6] , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[6], SPW_ULIGHT_FIFO, 1
|
2616 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~6 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~6, SPW_ULIGHT_FIFO, 1
|
2617 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[7] , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[7], SPW_ULIGHT_FIFO, 1
|
2618 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|last_packet_beat~1 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|last_packet_beat~1, SPW_ULIGHT_FIFO, 1
|
2619 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_busy , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_busy, SPW_ULIGHT_FIFO, 1
|
2620 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~0 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~0, SPW_ULIGHT_FIFO, 1
|
2621 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~5 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter~5, SPW_ULIGHT_FIFO, 1
|
2622 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[2] , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|burst_uncompress_byte_counter[2], SPW_ULIGHT_FIFO, 1
|
2623 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|last_packet_beat~2 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|last_packet_beat~2, SPW_ULIGHT_FIFO, 1
|
2624 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|last_packet_beat~0 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|last_packet_beat~0, SPW_ULIGHT_FIFO, 1
|
2625 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[1][66] , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[1][66], SPW_ULIGHT_FIFO, 1
|
2626 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66] , u0|mm_interconnect_0|counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[66], SPW_ULIGHT_FIFO, 1
|
2627 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem~2 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem~2, SPW_ULIGHT_FIFO, 1
|
2628 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[0][66]~feeder , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[0][66]~feeder, SPW_ULIGHT_FIFO, 1
|
2629 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[0][66] , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[0][66], SPW_ULIGHT_FIFO, 1
|
2630 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|last_packet_beat , u0|mm_interconnect_0|counter_rx_fifo_s1_agent|uncompressor|last_packet_beat, SPW_ULIGHT_FIFO, 1
|
2631 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|always0~0 , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|always0~0, SPW_ULIGHT_FIFO, 1
|
2632 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[0][116] , u0|mm_interconnect_0|counter_rx_fifo_s1_agent_rsp_fifo|mem[0][116], SPW_ULIGHT_FIFO, 1
|
2633 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[1][116] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[1][116], SPW_ULIGHT_FIFO, 1
|
2634 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_020|src_payload~11 , u0|mm_interconnect_0|cmd_mux_020|src_payload~11, SPW_ULIGHT_FIFO, 1
|
2635 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[116] , u0|mm_interconnect_0|counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[116], SPW_ULIGHT_FIFO, 1
|
2636 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem~20 , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem~20, SPW_ULIGHT_FIFO, 1
|
2637 |
|
|
instance = comp, \u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[0][116] , u0|mm_interconnect_0|counter_tx_fifo_s1_agent_rsp_fifo|mem[0][116], SPW_ULIGHT_FIFO, 1
|
2638 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_mux_001|src_data[116]~199 , u0|mm_interconnect_0|rsp_mux_001|src_data[116]~199, SPW_ULIGHT_FIFO, 1
|
2639 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_015|src_data[116] , u0|mm_interconnect_0|cmd_mux_015|src_data[116], SPW_ULIGHT_FIFO, 1
|
2640 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[116] , u0|mm_interconnect_0|timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[116], SPW_ULIGHT_FIFO, 1
|
2641 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][116] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[1][116], SPW_ULIGHT_FIFO, 1
|
2642 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem~21 , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem~21, SPW_ULIGHT_FIFO, 1
|
2643 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[0][116] , u0|mm_interconnect_0|timecode_tx_enable_s1_agent_rsp_fifo|mem[0][116], SPW_ULIGHT_FIFO, 1
|
2644 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_018|src_data[116] , u0|mm_interconnect_0|cmd_mux_018|src_data[116], SPW_ULIGHT_FIFO, 1
|
2645 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[116] , u0|mm_interconnect_0|clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[116], SPW_ULIGHT_FIFO, 1
|
2646 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][116] , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[1][116], SPW_ULIGHT_FIFO, 1
|
2647 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem~21 , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem~21, SPW_ULIGHT_FIFO, 1
|
2648 |
|
|
instance = comp, \u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[0][116] , u0|mm_interconnect_0|clock_sel_s1_agent_rsp_fifo|mem[0][116], SPW_ULIGHT_FIFO, 1
|
2649 |
|
|
instance = comp, \u0|mm_interconnect_0|rsp_mux_001|src_data[116]~202 , u0|mm_interconnect_0|rsp_mux_001|src_data[116]~202, SPW_ULIGHT_FIFO, 1
|
2650 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|mem[1][116] , u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|mem[1][116], SPW_ULIGHT_FIFO, 1
|
2651 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_017|src_payload~11 , u0|mm_interconnect_0|cmd_mux_017|src_payload~11, SPW_ULIGHT_FIFO, 1
|
2652 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[116] , u0|mm_interconnect_0|data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[116], SPW_ULIGHT_FIFO, 1
|
2653 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|mem~20 , u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|mem~20, SPW_ULIGHT_FIFO, 1
|
2654 |
|
|
instance = comp, \u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|mem[0][116] , u0|mm_interconnect_0|data_info_s1_agent_rsp_fifo|mem[0][116], SPW_ULIGHT_FIFO, 1
|
2655 |
|
|
instance = comp, \u0|mm_interconnect_0|router_001|src_channel[16]~1 , u0|mm_interconnect_0|router_001|src_channel[16]~1, SPW_ULIGHT_FIFO, 1
|
2656 |
|
|
instance = comp, \u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[16] , u0|mm_interconnect_0|hps_0_h2f_axi_master_rd_limiter|last_channel[16], SPW_ULIGHT_FIFO, 1
|
2657 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_016|last_cycle~0 , u0|mm_interconnect_0|cmd_mux_016|last_cycle~0, SPW_ULIGHT_FIFO, 1
|
2658 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_translator|waitrequest_reset_override~feeder , u0|mm_interconnect_0|timecode_tx_ready_s1_translator|waitrequest_reset_override~feeder, SPW_ULIGHT_FIFO, 1
|
2659 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_translator|waitrequest_reset_override , u0|mm_interconnect_0|timecode_tx_ready_s1_translator|waitrequest_reset_override, SPW_ULIGHT_FIFO, 1
|
2660 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_translator|wait_latency_counter~0 , u0|mm_interconnect_0|timecode_tx_ready_s1_translator|wait_latency_counter~0, SPW_ULIGHT_FIFO, 1
|
2661 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_translator|wait_latency_counter[1] , u0|mm_interconnect_0|timecode_tx_ready_s1_translator|wait_latency_counter[1], SPW_ULIGHT_FIFO, 1
|
2662 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_agent|cp_ready~0 , u0|mm_interconnect_0|timecode_tx_ready_s1_agent|cp_ready~0, SPW_ULIGHT_FIFO, 1
|
2663 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2]~feeder, SPW_ULIGHT_FIFO, 1
|
2664 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2] , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_byte_cnt_reg[2], SPW_ULIGHT_FIFO, 1
|
2665 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold~feeder, SPW_ULIGHT_FIFO, 1
|
2666 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_ready_hold, SPW_ULIGHT_FIFO, 1
|
2667 |
|
|
instance = comp, \u0|mm_interconnect_0|cmd_mux_016|last_cycle~1 , u0|mm_interconnect_0|cmd_mux_016|last_cycle~1, SPW_ULIGHT_FIFO, 1
|
2668 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|NON_PIPELINED_INPUTS.load_next_cmd, SPW_ULIGHT_FIFO, 1
|
2669 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_eop_reg, SPW_ULIGHT_FIFO, 1
|
2670 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero~0 , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero~0, SPW_ULIGHT_FIFO, 1
|
2671 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_bytecount_reg_zero, SPW_ULIGHT_FIFO, 1
|
2672 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~1 , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[2]~1, SPW_ULIGHT_FIFO, 1
|
2673 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2] , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[2], SPW_ULIGHT_FIFO, 1
|
2674 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~3 , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[3]~3, SPW_ULIGHT_FIFO, 1
|
2675 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3] , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[3], SPW_ULIGHT_FIFO, 1
|
2676 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0 , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~0, SPW_ULIGHT_FIFO, 1
|
2677 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~0 , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[4]~0, SPW_ULIGHT_FIFO, 1
|
2678 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4] , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[4], SPW_ULIGHT_FIFO, 1
|
2679 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1 , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add1~1, SPW_ULIGHT_FIFO, 1
|
2680 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6] , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[6], SPW_ULIGHT_FIFO, 1
|
2681 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~2 , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[5]~2, SPW_ULIGHT_FIFO, 1
|
2682 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5] , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|int_bytes_remaining_reg[5], SPW_ULIGHT_FIFO, 1
|
2683 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~4 , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|d0_int_bytes_remaining[6]~4, SPW_ULIGHT_FIFO, 1
|
2684 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0 , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg~0, SPW_ULIGHT_FIFO, 1
|
2685 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|new_burst_reg, SPW_ULIGHT_FIFO, 1
|
2686 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0 , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_out_eop~0, SPW_ULIGHT_FIFO, 1
|
2687 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11 , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state~11, SPW_ULIGHT_FIFO, 1
|
2688 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|state.ST_IDLE, SPW_ULIGHT_FIFO, 1
|
2689 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3] , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[3], SPW_ULIGHT_FIFO, 1
|
2690 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~2 , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[3]~2, SPW_ULIGHT_FIFO, 1
|
2691 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~4 , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[4]~4, SPW_ULIGHT_FIFO, 1
|
2692 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4] , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[4], SPW_ULIGHT_FIFO, 1
|
2693 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0 , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|Add4~0, SPW_ULIGHT_FIFO, 1
|
2694 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~3 , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|nxt_uncomp_subburst_byte_cnt[5]~3, SPW_ULIGHT_FIFO, 1
|
2695 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5] , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[5], SPW_ULIGHT_FIFO, 1
|
2696 |
|
|
instance = comp, \u0|mm_interconnect_0|timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|out_uncomp_byte_cnt_reg[6] , u0|mm_interconnect_0|timecode_tx_ready_s1_burst_a
|