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[/] [spacewiresystemc/] [trunk/] [altera_work/] [spw_fifo_ulight/] [ulight_fifo/] [synthesis/] [submodules/] [ulight_fifo_mm_interconnect_0_rsp_mux.sv] - Blame information for rev 40

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1 32 redbear
// (C) 2001-2017 Intel Corporation. All rights reserved.
2
// Your use of Intel Corporation's design tools, logic functions and other
3
// software and tools, and its AMPP partner logic functions, and any output
4 40 redbear
// files from any of the foregoing (including device programming or simulation
5 32 redbear
// files), and any associated documentation or information are expressly subject
6
// to the terms and conditions of the Intel Program License Subscription
7 40 redbear
// Agreement, Intel FPGA IP License Agreement, or other applicable
8 32 redbear
// license agreement, including, without limitation, that your use is for the
9
// sole purpose of programming logic devices manufactured by Intel and sold by
10
// Intel or its authorized distributors.  Please refer to the applicable
11
// agreement for further details.
12
 
13
 
14
// (C) 2001-2014 Altera Corporation. All rights reserved.
15
// Your use of Altera Corporation's design tools, logic functions and other
16
// software and tools, and its AMPP partner logic functions, and any output
17
// files any of the foregoing (including device programming or simulation
18
// files), and any associated documentation or information are expressly subject
19
// to the terms and conditions of the Altera Program License Subscription
20
// Agreement, Altera MegaCore Function License Agreement, or other applicable
21
// license agreement, including, without limitation, that your use is for the
22
// sole purpose of programming logic devices manufactured by Altera and sold by
23
// Altera or its authorized distributors.  Please refer to the applicable
24
// agreement for further details.
25
 
26
 
27 40 redbear
// $Id: //acds/rel/17.1std/ip/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer.sv.terp#1 $
28 32 redbear
// $Revision: #1 $
29 40 redbear
// $Date: 2017/07/30 $
30 32 redbear
// $Author: swbranch $
31
 
32
// ------------------------------------------
33
// Merlin Multiplexer
34
// ------------------------------------------
35
 
36
`timescale 1 ns / 1 ns
37
 
38
 
39
// ------------------------------------------
40
// Generation parameters:
41
//   output_name:         ulight_fifo_mm_interconnect_0_rsp_mux
42
//   NUM_INPUTS:          22
43
//   ARBITRATION_SHARES:  1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
44
//   ARBITRATION_SCHEME   "no-arb"
45
//   PIPELINE_ARB:        0
46
//   PKT_TRANS_LOCK:      70 (arbitration locking enabled)
47
//   ST_DATA_W:           129
48
//   ST_CHANNEL_W:        22
49
// ------------------------------------------
50
 
51
module ulight_fifo_mm_interconnect_0_rsp_mux
52
(
53
    // ----------------------
54
    // Sinks
55
    // ----------------------
56
    input                       sink0_valid,
57
    input [129-1   : 0]  sink0_data,
58
    input [22-1: 0]  sink0_channel,
59
    input                       sink0_startofpacket,
60
    input                       sink0_endofpacket,
61
    output                      sink0_ready,
62
 
63
    input                       sink1_valid,
64
    input [129-1   : 0]  sink1_data,
65
    input [22-1: 0]  sink1_channel,
66
    input                       sink1_startofpacket,
67
    input                       sink1_endofpacket,
68
    output                      sink1_ready,
69
 
70
    input                       sink2_valid,
71
    input [129-1   : 0]  sink2_data,
72
    input [22-1: 0]  sink2_channel,
73
    input                       sink2_startofpacket,
74
    input                       sink2_endofpacket,
75
    output                      sink2_ready,
76
 
77
    input                       sink3_valid,
78
    input [129-1   : 0]  sink3_data,
79
    input [22-1: 0]  sink3_channel,
80
    input                       sink3_startofpacket,
81
    input                       sink3_endofpacket,
82
    output                      sink3_ready,
83
 
84
    input                       sink4_valid,
85
    input [129-1   : 0]  sink4_data,
86
    input [22-1: 0]  sink4_channel,
87
    input                       sink4_startofpacket,
88
    input                       sink4_endofpacket,
89
    output                      sink4_ready,
90
 
91
    input                       sink5_valid,
92
    input [129-1   : 0]  sink5_data,
93
    input [22-1: 0]  sink5_channel,
94
    input                       sink5_startofpacket,
95
    input                       sink5_endofpacket,
96
    output                      sink5_ready,
97
 
98
    input                       sink6_valid,
99
    input [129-1   : 0]  sink6_data,
100
    input [22-1: 0]  sink6_channel,
101
    input                       sink6_startofpacket,
102
    input                       sink6_endofpacket,
103
    output                      sink6_ready,
104
 
105
    input                       sink7_valid,
106
    input [129-1   : 0]  sink7_data,
107
    input [22-1: 0]  sink7_channel,
108
    input                       sink7_startofpacket,
109
    input                       sink7_endofpacket,
110
    output                      sink7_ready,
111
 
112
    input                       sink8_valid,
113
    input [129-1   : 0]  sink8_data,
114
    input [22-1: 0]  sink8_channel,
115
    input                       sink8_startofpacket,
116
    input                       sink8_endofpacket,
117
    output                      sink8_ready,
118
 
119
    input                       sink9_valid,
120
    input [129-1   : 0]  sink9_data,
121
    input [22-1: 0]  sink9_channel,
122
    input                       sink9_startofpacket,
123
    input                       sink9_endofpacket,
124
    output                      sink9_ready,
125
 
126
    input                       sink10_valid,
127
    input [129-1   : 0]  sink10_data,
128
    input [22-1: 0]  sink10_channel,
129
    input                       sink10_startofpacket,
130
    input                       sink10_endofpacket,
131
    output                      sink10_ready,
132
 
133
    input                       sink11_valid,
134
    input [129-1   : 0]  sink11_data,
135
    input [22-1: 0]  sink11_channel,
136
    input                       sink11_startofpacket,
137
    input                       sink11_endofpacket,
138
    output                      sink11_ready,
139
 
140
    input                       sink12_valid,
141
    input [129-1   : 0]  sink12_data,
142
    input [22-1: 0]  sink12_channel,
143
    input                       sink12_startofpacket,
144
    input                       sink12_endofpacket,
145
    output                      sink12_ready,
146
 
147
    input                       sink13_valid,
148
    input [129-1   : 0]  sink13_data,
149
    input [22-1: 0]  sink13_channel,
150
    input                       sink13_startofpacket,
151
    input                       sink13_endofpacket,
152
    output                      sink13_ready,
153
 
154
    input                       sink14_valid,
155
    input [129-1   : 0]  sink14_data,
156
    input [22-1: 0]  sink14_channel,
157
    input                       sink14_startofpacket,
158
    input                       sink14_endofpacket,
159
    output                      sink14_ready,
160
 
161
    input                       sink15_valid,
162
    input [129-1   : 0]  sink15_data,
163
    input [22-1: 0]  sink15_channel,
164
    input                       sink15_startofpacket,
165
    input                       sink15_endofpacket,
166
    output                      sink15_ready,
167
 
168
    input                       sink16_valid,
169
    input [129-1   : 0]  sink16_data,
170
    input [22-1: 0]  sink16_channel,
171
    input                       sink16_startofpacket,
172
    input                       sink16_endofpacket,
173
    output                      sink16_ready,
174
 
175
    input                       sink17_valid,
176
    input [129-1   : 0]  sink17_data,
177
    input [22-1: 0]  sink17_channel,
178
    input                       sink17_startofpacket,
179
    input                       sink17_endofpacket,
180
    output                      sink17_ready,
181
 
182
    input                       sink18_valid,
183
    input [129-1   : 0]  sink18_data,
184
    input [22-1: 0]  sink18_channel,
185
    input                       sink18_startofpacket,
186
    input                       sink18_endofpacket,
187
    output                      sink18_ready,
188
 
189
    input                       sink19_valid,
190
    input [129-1   : 0]  sink19_data,
191
    input [22-1: 0]  sink19_channel,
192
    input                       sink19_startofpacket,
193
    input                       sink19_endofpacket,
194
    output                      sink19_ready,
195
 
196
    input                       sink20_valid,
197
    input [129-1   : 0]  sink20_data,
198
    input [22-1: 0]  sink20_channel,
199
    input                       sink20_startofpacket,
200
    input                       sink20_endofpacket,
201
    output                      sink20_ready,
202
 
203
    input                       sink21_valid,
204
    input [129-1   : 0]  sink21_data,
205
    input [22-1: 0]  sink21_channel,
206
    input                       sink21_startofpacket,
207
    input                       sink21_endofpacket,
208
    output                      sink21_ready,
209
 
210
 
211
    // ----------------------
212
    // Source
213
    // ----------------------
214
    output                      src_valid,
215
    output [129-1    : 0] src_data,
216
    output [22-1 : 0] src_channel,
217
    output                      src_startofpacket,
218
    output                      src_endofpacket,
219
    input                       src_ready,
220
 
221
    // ----------------------
222
    // Clock & Reset
223
    // ----------------------
224
    input clk,
225
    input reset
226
);
227
    localparam PAYLOAD_W        = 129 + 22 + 2;
228
    localparam NUM_INPUTS       = 22;
229
    localparam SHARE_COUNTER_W  = 1;
230
    localparam PIPELINE_ARB     = 0;
231
    localparam ST_DATA_W        = 129;
232
    localparam ST_CHANNEL_W     = 22;
233
    localparam PKT_TRANS_LOCK   = 70;
234
 
235
    // ------------------------------------------
236
    // Signals
237
    // ------------------------------------------
238
    wire [NUM_INPUTS - 1 : 0]      request;
239
    wire [NUM_INPUTS - 1 : 0]      valid;
240
    wire [NUM_INPUTS - 1 : 0]      grant;
241
    wire [NUM_INPUTS - 1 : 0]      next_grant;
242
    reg [NUM_INPUTS - 1 : 0]       saved_grant;
243
    reg [PAYLOAD_W - 1 : 0]        src_payload;
244
    wire                           last_cycle;
245
    reg                            packet_in_progress;
246
    reg                            update_grant;
247
 
248
    wire [PAYLOAD_W - 1 : 0] sink0_payload;
249
    wire [PAYLOAD_W - 1 : 0] sink1_payload;
250
    wire [PAYLOAD_W - 1 : 0] sink2_payload;
251
    wire [PAYLOAD_W - 1 : 0] sink3_payload;
252
    wire [PAYLOAD_W - 1 : 0] sink4_payload;
253
    wire [PAYLOAD_W - 1 : 0] sink5_payload;
254
    wire [PAYLOAD_W - 1 : 0] sink6_payload;
255
    wire [PAYLOAD_W - 1 : 0] sink7_payload;
256
    wire [PAYLOAD_W - 1 : 0] sink8_payload;
257
    wire [PAYLOAD_W - 1 : 0] sink9_payload;
258
    wire [PAYLOAD_W - 1 : 0] sink10_payload;
259
    wire [PAYLOAD_W - 1 : 0] sink11_payload;
260
    wire [PAYLOAD_W - 1 : 0] sink12_payload;
261
    wire [PAYLOAD_W - 1 : 0] sink13_payload;
262
    wire [PAYLOAD_W - 1 : 0] sink14_payload;
263
    wire [PAYLOAD_W - 1 : 0] sink15_payload;
264
    wire [PAYLOAD_W - 1 : 0] sink16_payload;
265
    wire [PAYLOAD_W - 1 : 0] sink17_payload;
266
    wire [PAYLOAD_W - 1 : 0] sink18_payload;
267
    wire [PAYLOAD_W - 1 : 0] sink19_payload;
268
    wire [PAYLOAD_W - 1 : 0] sink20_payload;
269
    wire [PAYLOAD_W - 1 : 0] sink21_payload;
270
 
271
    assign valid[0] = sink0_valid;
272
    assign valid[1] = sink1_valid;
273
    assign valid[2] = sink2_valid;
274
    assign valid[3] = sink3_valid;
275
    assign valid[4] = sink4_valid;
276
    assign valid[5] = sink5_valid;
277
    assign valid[6] = sink6_valid;
278
    assign valid[7] = sink7_valid;
279
    assign valid[8] = sink8_valid;
280
    assign valid[9] = sink9_valid;
281
    assign valid[10] = sink10_valid;
282
    assign valid[11] = sink11_valid;
283
    assign valid[12] = sink12_valid;
284
    assign valid[13] = sink13_valid;
285
    assign valid[14] = sink14_valid;
286
    assign valid[15] = sink15_valid;
287
    assign valid[16] = sink16_valid;
288
    assign valid[17] = sink17_valid;
289
    assign valid[18] = sink18_valid;
290
    assign valid[19] = sink19_valid;
291
    assign valid[20] = sink20_valid;
292
    assign valid[21] = sink21_valid;
293
 
294
 
295
    // ------------------------------------------
296
    // ------------------------------------------
297
    // Grant Logic & Updates
298
    // ------------------------------------------
299
    // ------------------------------------------
300
    reg [NUM_INPUTS - 1 : 0] lock;
301
    always @* begin
302
      lock[0] = sink0_data[70];
303
      lock[1] = sink1_data[70];
304
      lock[2] = sink2_data[70];
305
      lock[3] = sink3_data[70];
306
      lock[4] = sink4_data[70];
307
      lock[5] = sink5_data[70];
308
      lock[6] = sink6_data[70];
309
      lock[7] = sink7_data[70];
310
      lock[8] = sink8_data[70];
311
      lock[9] = sink9_data[70];
312
      lock[10] = sink10_data[70];
313
      lock[11] = sink11_data[70];
314
      lock[12] = sink12_data[70];
315
      lock[13] = sink13_data[70];
316
      lock[14] = sink14_data[70];
317
      lock[15] = sink15_data[70];
318
      lock[16] = sink16_data[70];
319
      lock[17] = sink17_data[70];
320
      lock[18] = sink18_data[70];
321
      lock[19] = sink19_data[70];
322
      lock[20] = sink20_data[70];
323
      lock[21] = sink21_data[70];
324
    end
325
 
326
    assign last_cycle = src_valid & src_ready & src_endofpacket & ~(|(lock & grant));
327
 
328
    // ------------------------------------------
329
    // We're working on a packet at any time valid is high, except
330
    // when this is the endofpacket.
331
    // ------------------------------------------
332
    always @(posedge clk or posedge reset) begin
333
      if (reset) begin
334
        packet_in_progress <= 1'b0;
335
      end
336
      else begin
337
        if (last_cycle)
338
          packet_in_progress <= 1'b0;
339
        else if (src_valid)
340
          packet_in_progress <= 1'b1;
341
      end
342
    end
343
 
344
 
345
    // ------------------------------------------
346
    // Shares
347
    //
348
    // Special case: all-equal shares _should_ be optimized into assigning a
349
    // constant to next_grant_share.
350
    // Special case: all-1's shares _should_ result in the share counter
351
    // being optimized away.
352
    // ------------------------------------------
353
    // Input  |  arb shares  |  counter load value
354
    // 0      |      1       |  0
355
    // 1      |      1       |  0
356
    // 2      |      1       |  0
357
    // 3      |      1       |  0
358
    // 4      |      1       |  0
359
    // 5      |      1       |  0
360
    // 6      |      1       |  0
361
    // 7      |      1       |  0
362
    // 8      |      1       |  0
363
    // 9      |      1       |  0
364
    // 10      |      1       |  0
365
    // 11      |      1       |  0
366
    // 12      |      1       |  0
367
    // 13      |      1       |  0
368
    // 14      |      1       |  0
369
    // 15      |      1       |  0
370
    // 16      |      1       |  0
371
    // 17      |      1       |  0
372
    // 18      |      1       |  0
373
    // 19      |      1       |  0
374
    // 20      |      1       |  0
375
    // 21      |      1       |  0
376
     wire [SHARE_COUNTER_W - 1 : 0] share_0 = 1'd0;
377
     wire [SHARE_COUNTER_W - 1 : 0] share_1 = 1'd0;
378
     wire [SHARE_COUNTER_W - 1 : 0] share_2 = 1'd0;
379
     wire [SHARE_COUNTER_W - 1 : 0] share_3 = 1'd0;
380
     wire [SHARE_COUNTER_W - 1 : 0] share_4 = 1'd0;
381
     wire [SHARE_COUNTER_W - 1 : 0] share_5 = 1'd0;
382
     wire [SHARE_COUNTER_W - 1 : 0] share_6 = 1'd0;
383
     wire [SHARE_COUNTER_W - 1 : 0] share_7 = 1'd0;
384
     wire [SHARE_COUNTER_W - 1 : 0] share_8 = 1'd0;
385
     wire [SHARE_COUNTER_W - 1 : 0] share_9 = 1'd0;
386
     wire [SHARE_COUNTER_W - 1 : 0] share_10 = 1'd0;
387
     wire [SHARE_COUNTER_W - 1 : 0] share_11 = 1'd0;
388
     wire [SHARE_COUNTER_W - 1 : 0] share_12 = 1'd0;
389
     wire [SHARE_COUNTER_W - 1 : 0] share_13 = 1'd0;
390
     wire [SHARE_COUNTER_W - 1 : 0] share_14 = 1'd0;
391
     wire [SHARE_COUNTER_W - 1 : 0] share_15 = 1'd0;
392
     wire [SHARE_COUNTER_W - 1 : 0] share_16 = 1'd0;
393
     wire [SHARE_COUNTER_W - 1 : 0] share_17 = 1'd0;
394
     wire [SHARE_COUNTER_W - 1 : 0] share_18 = 1'd0;
395
     wire [SHARE_COUNTER_W - 1 : 0] share_19 = 1'd0;
396
     wire [SHARE_COUNTER_W - 1 : 0] share_20 = 1'd0;
397
     wire [SHARE_COUNTER_W - 1 : 0] share_21 = 1'd0;
398
 
399
    // ------------------------------------------
400
    // Choose the share value corresponding to the grant.
401
    // ------------------------------------------
402
    reg [SHARE_COUNTER_W - 1 : 0] next_grant_share;
403
    always @* begin
404
      next_grant_share =
405
    share_0 & { SHARE_COUNTER_W {next_grant[0]} } |
406
    share_1 & { SHARE_COUNTER_W {next_grant[1]} } |
407
    share_2 & { SHARE_COUNTER_W {next_grant[2]} } |
408
    share_3 & { SHARE_COUNTER_W {next_grant[3]} } |
409
    share_4 & { SHARE_COUNTER_W {next_grant[4]} } |
410
    share_5 & { SHARE_COUNTER_W {next_grant[5]} } |
411
    share_6 & { SHARE_COUNTER_W {next_grant[6]} } |
412
    share_7 & { SHARE_COUNTER_W {next_grant[7]} } |
413
    share_8 & { SHARE_COUNTER_W {next_grant[8]} } |
414
    share_9 & { SHARE_COUNTER_W {next_grant[9]} } |
415
    share_10 & { SHARE_COUNTER_W {next_grant[10]} } |
416
    share_11 & { SHARE_COUNTER_W {next_grant[11]} } |
417
    share_12 & { SHARE_COUNTER_W {next_grant[12]} } |
418
    share_13 & { SHARE_COUNTER_W {next_grant[13]} } |
419
    share_14 & { SHARE_COUNTER_W {next_grant[14]} } |
420
    share_15 & { SHARE_COUNTER_W {next_grant[15]} } |
421
    share_16 & { SHARE_COUNTER_W {next_grant[16]} } |
422
    share_17 & { SHARE_COUNTER_W {next_grant[17]} } |
423
    share_18 & { SHARE_COUNTER_W {next_grant[18]} } |
424
    share_19 & { SHARE_COUNTER_W {next_grant[19]} } |
425
    share_20 & { SHARE_COUNTER_W {next_grant[20]} } |
426
    share_21 & { SHARE_COUNTER_W {next_grant[21]} };
427
    end
428
 
429
    // ------------------------------------------
430
    // Flag to indicate first packet of an arb sequence.
431
    // ------------------------------------------
432
    wire grant_changed = ~packet_in_progress && ~(|(saved_grant & valid));
433
    reg first_packet_r;
434
    wire first_packet = grant_changed | first_packet_r;
435
    always @(posedge clk or posedge reset) begin
436
      if (reset) begin
437
        first_packet_r <= 1'b0;
438
      end
439
      else begin
440
        if (update_grant)
441
          first_packet_r <= 1'b1;
442
        else if (last_cycle)
443
          first_packet_r <= 1'b0;
444
        else if (grant_changed)
445
          first_packet_r <= 1'b1;
446
      end
447
    end
448
 
449
    // ------------------------------------------
450
    // Compute the next share-count value.
451
    // ------------------------------------------
452
    reg [SHARE_COUNTER_W - 1 : 0] p1_share_count;
453
    reg [SHARE_COUNTER_W - 1 : 0] share_count;
454
    reg share_count_zero_flag;
455
 
456
    always @* begin
457
      if (first_packet) begin
458
        p1_share_count = next_grant_share;
459
      end
460
      else begin
461
            // Update the counter, but don't decrement below 0.
462
        p1_share_count = share_count_zero_flag ? '0 : share_count - 1'b1;
463
      end
464
     end
465
 
466
    // ------------------------------------------
467
    // Update the share counter and share-counter=zero flag.
468
    // ------------------------------------------
469
    always @(posedge clk or posedge reset) begin
470
      if (reset) begin
471
        share_count <= '0;
472
        share_count_zero_flag <= 1'b1;
473
      end
474
      else begin
475
        if (last_cycle) begin
476
          share_count <= p1_share_count;
477
          share_count_zero_flag <= (p1_share_count == '0);
478
        end
479
      end
480
    end
481
 
482
    // ------------------------------------------
483
    // For each input, maintain a final_packet signal which goes active for the
484
    // last packet of a full-share packet sequence.  Example: if I have 4
485
    // shares and I'm continuously requesting, final_packet is active in the
486
    // 4th packet.
487
    // ------------------------------------------
488
    wire final_packet_0 = 1'b1;
489
 
490
    wire final_packet_1 = 1'b1;
491
 
492
    wire final_packet_2 = 1'b1;
493
 
494
    wire final_packet_3 = 1'b1;
495
 
496
    wire final_packet_4 = 1'b1;
497
 
498
    wire final_packet_5 = 1'b1;
499
 
500
    wire final_packet_6 = 1'b1;
501
 
502
    wire final_packet_7 = 1'b1;
503
 
504
    wire final_packet_8 = 1'b1;
505
 
506
    wire final_packet_9 = 1'b1;
507
 
508
    wire final_packet_10 = 1'b1;
509
 
510
    wire final_packet_11 = 1'b1;
511
 
512
    wire final_packet_12 = 1'b1;
513
 
514
    wire final_packet_13 = 1'b1;
515
 
516
    wire final_packet_14 = 1'b1;
517
 
518
    wire final_packet_15 = 1'b1;
519
 
520
    wire final_packet_16 = 1'b1;
521
 
522
    wire final_packet_17 = 1'b1;
523
 
524
    wire final_packet_18 = 1'b1;
525
 
526
    wire final_packet_19 = 1'b1;
527
 
528
    wire final_packet_20 = 1'b1;
529
 
530
    wire final_packet_21 = 1'b1;
531
 
532
 
533
    // ------------------------------------------
534
    // Concatenate all final_packet signals (wire or reg) into a handy vector.
535
    // ------------------------------------------
536
    wire [NUM_INPUTS - 1 : 0] final_packet = {
537
    final_packet_21,
538
    final_packet_20,
539
    final_packet_19,
540
    final_packet_18,
541
    final_packet_17,
542
    final_packet_16,
543
    final_packet_15,
544
    final_packet_14,
545
    final_packet_13,
546
    final_packet_12,
547
    final_packet_11,
548
    final_packet_10,
549
    final_packet_9,
550
    final_packet_8,
551
    final_packet_7,
552
    final_packet_6,
553
    final_packet_5,
554
    final_packet_4,
555
    final_packet_3,
556
    final_packet_2,
557
    final_packet_1,
558
    final_packet_0
559
    };
560
 
561
    // ------------------------------------------
562
    // ------------------------------------------
563
    wire p1_done = |(final_packet & grant);
564
 
565
    // ------------------------------------------
566
    // Flag for the first cycle of packets within an
567
    // arb sequence
568
    // ------------------------------------------
569
    reg first_cycle;
570
    always @(posedge clk, posedge reset) begin
571
      if (reset)
572
        first_cycle <= 0;
573
      else
574
        first_cycle <= last_cycle && ~p1_done;
575
    end
576
 
577
 
578
    always @* begin
579
      update_grant = 0;
580
 
581
        // ------------------------------------------
582
        // No arbitration pipeline, update grant whenever
583
        // the current arb winner has consumed all shares,
584
        // or all requests are low
585
        // ------------------------------------------
586
  update_grant = (last_cycle && p1_done) || (first_cycle && ~(|valid));
587
  update_grant = last_cycle;
588
    end
589
 
590
    wire save_grant;
591
    assign save_grant = 1;
592
    assign grant = next_grant;
593
 
594
    always @(posedge clk, posedge reset) begin
595
      if (reset)
596
        saved_grant <= '0;
597
      else if (save_grant)
598
        saved_grant <= next_grant;
599
    end
600
 
601
    // ------------------------------------------
602
    // ------------------------------------------
603
    // Arbitrator
604
    // ------------------------------------------
605
    // ------------------------------------------
606
 
607
    // ------------------------------------------
608
    // Create a request vector that stays high during
609
    // the packet for unpipelined arbitration.
610
    //
611
    // The pipelined arbitration scheme does not require
612
    // request to be held high during the packet.
613
    // ------------------------------------------
614
    assign request = valid;
615
 
616
    wire [NUM_INPUTS - 1 : 0] next_grant_from_arb;
617
 
618
    altera_merlin_arbitrator
619
    #(
620
    .NUM_REQUESTERS(NUM_INPUTS),
621
    .SCHEME ("no-arb"),
622
    .PIPELINE (0)
623
    ) arb (
624
    .clk (clk),
625
    .reset (reset),
626
    .request (request),
627
    .grant (next_grant_from_arb),
628
    .save_top_priority (src_valid),
629
    .increment_top_priority (update_grant)
630
    );
631
 
632
   assign next_grant = next_grant_from_arb;
633
 
634
    // ------------------------------------------
635
    // ------------------------------------------
636
    // Mux
637
    //
638
    // Implemented as a sum of products.
639
    // ------------------------------------------
640
    // ------------------------------------------
641
 
642
    assign sink0_ready = src_ready && grant[0];
643
    assign sink1_ready = src_ready && grant[1];
644
    assign sink2_ready = src_ready && grant[2];
645
    assign sink3_ready = src_ready && grant[3];
646
    assign sink4_ready = src_ready && grant[4];
647
    assign sink5_ready = src_ready && grant[5];
648
    assign sink6_ready = src_ready && grant[6];
649
    assign sink7_ready = src_ready && grant[7];
650
    assign sink8_ready = src_ready && grant[8];
651
    assign sink9_ready = src_ready && grant[9];
652
    assign sink10_ready = src_ready && grant[10];
653
    assign sink11_ready = src_ready && grant[11];
654
    assign sink12_ready = src_ready && grant[12];
655
    assign sink13_ready = src_ready && grant[13];
656
    assign sink14_ready = src_ready && grant[14];
657
    assign sink15_ready = src_ready && grant[15];
658
    assign sink16_ready = src_ready && grant[16];
659
    assign sink17_ready = src_ready && grant[17];
660
    assign sink18_ready = src_ready && grant[18];
661
    assign sink19_ready = src_ready && grant[19];
662
    assign sink20_ready = src_ready && grant[20];
663
    assign sink21_ready = src_ready && grant[21];
664
 
665
    assign src_valid = |(grant & valid);
666
 
667
    always @* begin
668
      src_payload =
669
      sink0_payload & {PAYLOAD_W {grant[0]} } |
670
      sink1_payload & {PAYLOAD_W {grant[1]} } |
671
      sink2_payload & {PAYLOAD_W {grant[2]} } |
672
      sink3_payload & {PAYLOAD_W {grant[3]} } |
673
      sink4_payload & {PAYLOAD_W {grant[4]} } |
674
      sink5_payload & {PAYLOAD_W {grant[5]} } |
675
      sink6_payload & {PAYLOAD_W {grant[6]} } |
676
      sink7_payload & {PAYLOAD_W {grant[7]} } |
677
      sink8_payload & {PAYLOAD_W {grant[8]} } |
678
      sink9_payload & {PAYLOAD_W {grant[9]} } |
679
      sink10_payload & {PAYLOAD_W {grant[10]} } |
680
      sink11_payload & {PAYLOAD_W {grant[11]} } |
681
      sink12_payload & {PAYLOAD_W {grant[12]} } |
682
      sink13_payload & {PAYLOAD_W {grant[13]} } |
683
      sink14_payload & {PAYLOAD_W {grant[14]} } |
684
      sink15_payload & {PAYLOAD_W {grant[15]} } |
685
      sink16_payload & {PAYLOAD_W {grant[16]} } |
686
      sink17_payload & {PAYLOAD_W {grant[17]} } |
687
      sink18_payload & {PAYLOAD_W {grant[18]} } |
688
      sink19_payload & {PAYLOAD_W {grant[19]} } |
689
      sink20_payload & {PAYLOAD_W {grant[20]} } |
690
      sink21_payload & {PAYLOAD_W {grant[21]} };
691
    end
692
 
693
    // ------------------------------------------
694
    // Mux Payload Mapping
695
    // ------------------------------------------
696
 
697
    assign sink0_payload = {sink0_channel,sink0_data,
698
    sink0_startofpacket,sink0_endofpacket};
699
    assign sink1_payload = {sink1_channel,sink1_data,
700
    sink1_startofpacket,sink1_endofpacket};
701
    assign sink2_payload = {sink2_channel,sink2_data,
702
    sink2_startofpacket,sink2_endofpacket};
703
    assign sink3_payload = {sink3_channel,sink3_data,
704
    sink3_startofpacket,sink3_endofpacket};
705
    assign sink4_payload = {sink4_channel,sink4_data,
706
    sink4_startofpacket,sink4_endofpacket};
707
    assign sink5_payload = {sink5_channel,sink5_data,
708
    sink5_startofpacket,sink5_endofpacket};
709
    assign sink6_payload = {sink6_channel,sink6_data,
710
    sink6_startofpacket,sink6_endofpacket};
711
    assign sink7_payload = {sink7_channel,sink7_data,
712
    sink7_startofpacket,sink7_endofpacket};
713
    assign sink8_payload = {sink8_channel,sink8_data,
714
    sink8_startofpacket,sink8_endofpacket};
715
    assign sink9_payload = {sink9_channel,sink9_data,
716
    sink9_startofpacket,sink9_endofpacket};
717
    assign sink10_payload = {sink10_channel,sink10_data,
718
    sink10_startofpacket,sink10_endofpacket};
719
    assign sink11_payload = {sink11_channel,sink11_data,
720
    sink11_startofpacket,sink11_endofpacket};
721
    assign sink12_payload = {sink12_channel,sink12_data,
722
    sink12_startofpacket,sink12_endofpacket};
723
    assign sink13_payload = {sink13_channel,sink13_data,
724
    sink13_startofpacket,sink13_endofpacket};
725
    assign sink14_payload = {sink14_channel,sink14_data,
726
    sink14_startofpacket,sink14_endofpacket};
727
    assign sink15_payload = {sink15_channel,sink15_data,
728
    sink15_startofpacket,sink15_endofpacket};
729
    assign sink16_payload = {sink16_channel,sink16_data,
730
    sink16_startofpacket,sink16_endofpacket};
731
    assign sink17_payload = {sink17_channel,sink17_data,
732
    sink17_startofpacket,sink17_endofpacket};
733
    assign sink18_payload = {sink18_channel,sink18_data,
734
    sink18_startofpacket,sink18_endofpacket};
735
    assign sink19_payload = {sink19_channel,sink19_data,
736
    sink19_startofpacket,sink19_endofpacket};
737
    assign sink20_payload = {sink20_channel,sink20_data,
738
    sink20_startofpacket,sink20_endofpacket};
739
    assign sink21_payload = {sink21_channel,sink21_data,
740
    sink21_startofpacket,sink21_endofpacket};
741
 
742
    assign {src_channel,src_data,src_startofpacket,src_endofpacket} = src_payload;
743
endmodule
744
 
745
 

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