Subversion Repositories uart2bus_testbench

//-------------------------------------------------------------------------------------------------

//

//                             UART2BUS VERIFICATION

//

//-------------------------------------------------------------------------------------------------

// CREATOR    : HANY SALAH

// PROJECT    : UART2BUS UVM TEST BENCH

// UNIT       : AGENT

//-------------------------------------------------------------------------------------------------

// TITLE      : UART Coverage

// DESCRIPTION: THIS BLOCK INCLUDES ALL THE COVERPINS THAT ARE SAMPLED EACH STIMULUS

//-------------------------------------------------------------------------------------------------

// LOG DETAILS

//-------------

// VERSION      NAME        DATE        DESCRIPTION

//    1       HANY SALAH    08022016    FILE CREATION

//    2       HANY SALAH    11022016    IMPROVE BLOCK DESCRIPTION & ADD CODE COMMENTS

//-------------------------------------------------------------------------------------------------

// ALL COPYRIGHTS ARE RESERVED FOR THE PRODUCER ONLY .THIS FILE IS PRODUCED FOR OPENCORES MEMBERS

// ONLY AND IT IS PROHIBTED TO USE THIS MATERIAL WITHOUT THE CREATOR'S PERMISSION

//-------------------------------------------------------------------------------------------------

struct {command cmd1; command cmd2;} twoburstscmd;

class uart_coverage extends uvm_subscriber#(uart_transaction);

  `uvm_component_utils(uart_coverage)

  uart_transaction        trans,_trans;

  uart_transaction        trans_o1,trans_o2,trans_o3;

   uart_dashboard          dashboard;

  covergroup trans_attrib;

    communication_mode:

      coverpoint trans._mode{

        bins valid_mode         = {text,binary};

        ignore_bins invalid_mode       = {wrong_mode_text,wrong_mode_bin};

      }

    address:

      coverpoint trans.address;

  endgroup:trans_attrib

  covergroup text_mode_cov;

    command:

      coverpoint trans._command{

        bins          valid_command  ={read,2};

        ignore_bins  invalid_command={nop,invalid_read,invalid_write};

      }

    first_white_space_field:

      coverpoint trans._spacetype1{bins         validspace   ={single,tab};

                                   ignore_bins invalidspace ={wrong_space};}

    second_white_space_field:

      coverpoint trans._spacetype2{bins         validspace   ={single,tab};

                                   ignore_bins invalidspace ={wrong_space};}

    end_of_line_field:

      coverpoint trans._eoltype{bins         valideol={cr,lf};

                                ignore_bins eol ={wrong_eol};}

    prefix_character_type:

      coverpoint trans._chartype;

    white_spaces_x:

      cross first_white_space_field,second_white_space_field,end_of_line_field;

    pref_x_command:

      cross command,prefix_character_type;

  endgroup:text_mode_cov

  covergroup binary_mode_cov;

    command:

      coverpoint trans._command{

        bins normal_command={read,2,nop};

        ignore_bins wrong_command ={invalid_read,invalid_write};

      }

    acknowledge_requirement:

      coverpoint trans._reqack;

    incremental_address_requirement:

      coverpoint trans._reqinc;

    Length_of_data:

      coverpoint trans.length_data{

        bins zero           = {0};

        bins valid          = {[1:256]};

        illegal_bins invalid= {[257:$]};

      }

  endgroup:binary_mode_cov

  covergroup two_bursts ;

     command: coverpoint trans._command{

        bins nop_write = (nop=>2);

        bins nop_read  = (nop=>read);

        bins nop_nop   = (nop=>nop);

        bins write_write = (2=>2);

        bins write_read  = (2=>read);

        bins write_nop   = (2=>nop);

        bins read_write = (read=>2);

        bins read_read  = (read=>read);

        bins read_nop   = (read=>nop);

     }

     mode_trans: coverpoint trans._mode

       {

        bins text_bin  = (text=>binary);

        bins bin_text  = (binary=>text);

        bins bin_bin   = (binary=>binary);

        bins text_text = (text=>text);

        }

     mode_x_cmd: cross command,mode_trans

       {

        illegal_bins text_nop1 = binsof(command.nop_write) && (binsof(mode_trans.text_bin) || binsof(mode_trans.text_text) );

        illegal_bins text_nop2 = binsof(command.nop_read)  && (binsof(mode_trans.text_bin) || binsof(mode_trans.text_text) );

        illegal_bins text_nop3 = binsof(command.nop_nop)   && (binsof(mode_trans.text_bin) || binsof(mode_trans.text_text) ||

                                                               binsof(mode_trans.bin_text));

        illegal_bins text_nop4 = binsof(command.write_nop) && (binsof(mode_trans.bin_text) || binsof(mode_trans.text_text) );

        illegal_bins text_nop5 = binsof(command.read_nop)  && (binsof(mode_trans.bin_text) || binsof(mode_trans.text_text) );

     }

  endgroup // two_bursts

   covergroup four_bursts ;

      command: coverpoint trans._command

        {

         bins nop_read_write_nop = (nop=>read=>2=>nop);

         bins read_write_read_write = (read=>2=>read=>2);

         bins read_read_write_read  = (read=>read=>2=>read);

         bins write_read_read_write = (2=>read=>read=>2);

         bins write_write_read_write= (2=>2=>read=>2);

         bins write_write_write_write=(2=>2=>2=>2);

         bins read_read_read_read   = (read=>read=>read=>read);

         bins nop_nop_nop_nop       = (nop=>nop=>nop=>nop);

      }

   endgroup

  function new (string name, uvm_component parent);

    super.new(name,parent);

    trans_attrib    = new();

    text_mode_cov   = new();

    binary_mode_cov = new();

    two_bursts      = new();

    four_bursts     = new();

  endfunction:new

  extern function void build_phase(uvm_phase phase);

  extern function void connect_phase (uvm_phase phase);

  extern task run_phase (uvm_phase);

  extern function void write (uart_transaction t);

  extern function void update_cov ();

endclass:uart_coverage

function void uart_coverage::build_phase (uvm_phase phase);

   super.build_phase(phase);

   trans  = uart_transaction::type_id::create("trans");

   dashboard = uvm_resource_db#(uart_dashboard)::get_by_name("shared_cloud","dashboard").read();

endfunction:build_phase

function void uart_coverage::connect_phase(uvm_phase phase);

endfunction:connect_phase

task uart_coverage::run_phase(uvm_phase phase);

endtask:run_phase

function void uart_coverage::write(uart_transaction t);

   $cast(trans,t.clone());

   trans_attrib.sample();

    if(trans._mode == text)

      begin

      text_mode_cov.sample();

      end

    else if (trans._mode == binary)

      begin

      binary_mode_cov.sample();

      end

   four_bursts.sample();

   two_bursts.sample();

   update_cov();

endfunction // write

function void uart_coverage::update_cov();

   dashboard.trans_attribute_cov=trans_attrib.get_coverage();

   dashboard.text_mode_cov = text_mode_cov.get_coverage();

   dashboard.binary_mode_cov = binary_mode_cov.get_coverage();

   dashboard.two_binary_bursts_cov=two_bursts.get_coverage();

   dashboard.four_bursts_cov=four_bursts.get_coverage();

   dashboard.evaluate_coverage();

endfunction // update_cov