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[/] [v65c816/] [trunk/] [dmux.vhd] - Blame information for rev 4

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1 2 Valerio63
library IEEE;
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use IEEE.std_logic_1164.all;  -- defines std_logic types
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use IEEE.STD_LOGIC_unsigned.all;
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use IEEE.STD_LOGIC_arith.all;
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-- 8/16 bit three-way multiplexer
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-- this multiplexer select the operand source for ALU operand #2 (op2) input
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entity dmux is
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  port(  sel:  in STD_LOGIC_VECTOR(2 downto 0);
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           a:  in STD_LOGIC_VECTOR(15 downto 0);
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           b:  in STD_LOGIC_VECTOR(7 downto 0);
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           y: out STD_LOGIC_VECTOR(15 downto 0)
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      );
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end dmux;
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architecture comb of dmux is
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constant NOP_D: STD_LOGIC_VECTOR(2 downto 0) := "000";
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constant ORD_D: STD_LOGIC_VECTOR(2 downto 0) := "001";           -- selects 16 bit operand register 
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constant EXT_D: STD_LOGIC_VECTOR(2 downto 0) := "010";           -- selects 8 bit external data bus
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constant EXM_D: STD_LOGIC_VECTOR(2 downto 0) := "011";           -- selects msb 8 bit external data bus and lsb operand register  
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constant BCD_D: STD_LOGIC_VECTOR(2 downto 0) := "100";           -- not used
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begin
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  process(sel,a,b)
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  begin
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    case sel is
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      when ORD_D    => y <= a;                                   -- selects 16 bit operand register
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      when EXT_D    => y <= "00000000" & b;                      -- selects 8 bit external data bus
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      when EXM_D    => y <= b & a(7 downto 0);                   -- selects msb 8 bit external data bus and lsb operand register
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      when others   => y <= "0000000000000000";
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    end case;
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  end process;
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end comb;
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