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[/] [vspi/] [trunk/] [projnav/] [xps/] [pcores/] [spiifc_v1_00_a/] [devl/] [projnav/] [ipcore_dir/] [coregen.cgc] - Blame information for rev 14

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Line No. Rev Author Line
1 14 mjlyons
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   xilinx.com
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   project
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   coregen
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   1.0
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         buffermem
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            buffermem
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            Native
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            AXI4_Full
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            Memory_Slave
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            false
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            4
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            True_Dual_Port_RAM
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            No_ECC
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            false
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            false
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            false
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            Single_Bit_Error_Injection
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            false
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            9
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            Minimum_Area
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            8kx2
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            true
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            8
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            4096
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            8
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            WRITE_FIRST
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            Use_ENA_Pin
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            32
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            32
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            WRITE_FIRST
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            Use_ENB_Pin
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            false
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            false
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            false
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            false
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            false
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            false
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            false
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            false
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            0
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            false
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            no_coe_file_loaded
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            false
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            0
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            false
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            false
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            CE
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            0
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            false
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            false
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            CE
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            0
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            SYNC
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            false
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            100
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            50
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            100
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            50
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            100
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            100
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            ALL
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            false
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            false
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                  coregen
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                  ./
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                  ./tmp/
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                  ./tmp/_cg/
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                  xc6slx45
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                  spartan6
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                  csg324
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                  -2
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                  BusFormatAngleBracketNotRipped
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                  Verilog
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                  true
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                  Other
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                  false
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                  false
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                  false
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                  Ngc
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                  false
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                  Behavioral
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                  Verilog
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                  false
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                  2011-03-11T08:24:14.000Z
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         spiloopmem
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            spiloopmem
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            Native
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            AXI4_Full
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            Memory_Slave
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            false
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            4
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            Simple_Dual_Port_RAM
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            No_ECC
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            false
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            false
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            false
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            Single_Bit_Error_Injection
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            false
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            9
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            Minimum_Area
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            8kx2
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            false
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            8
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            4096
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            8
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            WRITE_FIRST
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            Use_ENA_Pin
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            8
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            8
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            WRITE_FIRST
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            Use_ENB_Pin
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            false
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            false
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            false
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            false
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            false
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            false
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            false
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            false
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            0
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            false
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            no_coe_file_loaded
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            false
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            0
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            false
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            false
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            CE
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            0
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            false
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            false
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            CE
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            0
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            SYNC
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            false
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            100
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            50
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            100
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            0
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            100
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            100
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            ALL
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            false
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            false
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            spartan6
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            spartan6
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            C:/Users/mjlyons/workspace/vSPI/projnav/xps/pcores/spiifc_v1_00_a/devl/projnav/ipcore_dir/tmp/_cg/
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            0
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            1
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            0
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            0
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            4
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            1
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            9
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            1
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            1
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            0
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            no_coe_file_loaded
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            0
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            0
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            SYNC
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            0
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            CE
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            0
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            0
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            1
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            0
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            0
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            1
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            WRITE_FIRST
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            8
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            8
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            4096
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            4096
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            12
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            0
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            CE
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            0
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            0
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            1
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            0
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            0
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            1
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            WRITE_FIRST
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            8
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            8
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            4096
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            4096
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            12
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            0
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            0
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            0
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            0
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            0
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            0
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            0
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            0
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            0
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            0
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            ALL
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            0
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            0
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            0
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                  coregen
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                  ./
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                  ./tmp/
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                  ./tmp/_cg/
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                  xc6slx45
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                  spartan6
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                  csg324
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                  -2
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                  BusFormatAngleBracketNotRipped
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                  Verilog
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                  true
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                  Other
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                  false
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                  false
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                  false
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                  Ngc
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                  false
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                  Behavioral
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                  Verilog
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                  false
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                  2011-03-11T08:24:14.000Z
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                  apply_current_project_options_generator
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                  customization_generator
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                     ./summary.log
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                     unknown
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                     Wed Mar 07 22:04:50 GMT 2012
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                     0x5BD51164
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                     generationid_615106653
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                  model_parameter_resolution_generator
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                     ./summary.log
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                     unknown
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                     Wed Mar 07 22:04:54 GMT 2012
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                     0x5BD51164
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                     generationid_615106653
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                  ip_xco_generator
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                     ./spiloopmem.xco
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                     xco
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                     Wed Mar 07 22:04:54 GMT 2012
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                     0xEE47DCC6
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                     generationid_615106653
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                  associated_files_generator
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                     ./blk_mem_gen_ds512.pdf
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                     pdf
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                     Tue Jun 21 05:21:31 GMT 2011
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                     0xA43B8952
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                     generationid_615106653
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                     ./blk_mem_gen_v6_2_readme.txt
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                     txt
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                     Tue Jun 21 05:21:31 GMT 2011
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                     0x399E1D72
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                     generationid_615106653
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                  ejava_generator
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                     ./spiloopmem_ste/example_design/bmg_wrapper.vhd
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                     ignore
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                     vhdl
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                     Wed Mar 07 22:04:55 GMT 2012
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                     0x7F99DB77
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                     generationid_615106653
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                     ./spiloopmem_ste/example_design/spiloopmem_top.ucf
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                     ignore
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                     ucf
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                     Wed Mar 07 22:04:55 GMT 2012
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                     0x8915DFA1
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                     generationid_615106653
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                     ./spiloopmem_ste/example_design/spiloopmem_top.vhd
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                     ignore
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                     vhdl
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                     Wed Mar 07 22:04:55 GMT 2012
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                     0xAFD5224E
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                     generationid_615106653
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                     ./spiloopmem_ste/example_design/spiloopmem_top.xdc
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                     ignore
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                     xdc
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                     Wed Mar 07 22:04:55 GMT 2012
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                     0x78E2D49A
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                     generationid_615106653
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                     ./spiloopmem_ste/implement/implement.sh
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                     ignore
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                     unknown
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                     Wed Mar 07 22:04:55 GMT 2012
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                     0x452D832D
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                     generationid_615106653
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                     ./spiloopmem_ste/implement/planAhead_rdn.bat
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                     ignore
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                     unknown
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                     Wed Mar 07 22:04:55 GMT 2012
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                     0x9360D2FC
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                     generationid_615106653
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                     ./spiloopmem_ste/implement/planAhead_rdn.sh
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                     ignore
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                     unknown
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                     Wed Mar 07 22:04:55 GMT 2012
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                     0x46307551
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                     generationid_615106653
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                     ./spiloopmem_ste/implement/planAhead_rdn.tcl
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                     ignore
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                     tcl
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                     Wed Mar 07 22:04:55 GMT 2012
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                     0xEA63E4A4
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                     generationid_615106653
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                     ./spiloopmem_ste/implement/xst.prj
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                     ignore
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                     unknown
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                     Wed Mar 07 22:04:55 GMT 2012
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                     0xE2E3ED6D
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                     generationid_615106653
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                     ./spiloopmem_ste/implement/xst.scr
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                     ignore
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                     unknown
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                     Wed Mar 07 22:04:55 GMT 2012
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                     0x04885ED0
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                     generationid_615106653
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                  ngc_netlist_generator
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                     ./spiloopmem.ngc
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                     ngc
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                     Wed Mar 07 22:05:31 GMT 2012
403
                     0x64C2FFF1
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                     generationid_615106653
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                  obfuscate_netlist_generator
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                  padded_implementation_netlist_generator
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                  instantiation_template_generator
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                     ./spiloopmem.veo
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                     veo
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                     Wed Mar 07 22:05:33 GMT 2012
419
                     0xF74D6B91
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                     generationid_615106653
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                  structural_simulation_model_generator
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                     ./spiloopmem.v
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                     verilog
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                     Wed Mar 07 22:05:33 GMT 2012
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                     0xC7F34980
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                     generationid_615106653
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                  asy_generator
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                     ./spiloopmem.asy
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                     asy
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                     Wed Mar 07 22:05:39 GMT 2012
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                     0x83946D8F
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                     generationid_615106653
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                     ./summary.log
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                     unknown
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                     Wed Mar 07 22:05:39 GMT 2012
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                     0x5BD51164
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                     generationid_615106653
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                  xmdf_generator
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                     ./spiloopmem_xmdf.tcl
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                     tclXmdf
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                     tcl
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                     Wed Mar 07 22:05:39 GMT 2012
457
                     0xD51D4C14
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                     generationid_615106653
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460
               
461
               
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                  ise_generator
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                     ./_xmsgs/pn_parser.xmsgs
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                     ignore
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                     unknown
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                     Wed Mar 07 22:05:42 GMT 2012
468
                     0x24C9CB1C
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                     generationid_615106653
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                     ./spiloopmem.gise
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                     ignore
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                     gise
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                     Wed Mar 07 22:05:43 GMT 2012
476
                     0xF8869E9A
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                     generationid_615106653
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                     ./spiloopmem.xise
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                     ignore
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                     xise
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                     Wed Mar 07 22:05:43 GMT 2012
484
                     0xAB45B7A7
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                     generationid_615106653
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                  deliver_readme_generator
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                  flist_generator
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                     ./spiloopmem_flist.txt
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                     ignore
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                     txtFlist
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                     txt
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                     Wed Mar 07 22:05:43 GMT 2012
499
                     0xCE30C720
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                     generationid_615106653
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502
               
503
               
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                  view_readme_generator
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506
            
507
         
508
      
509
   
510
   
511
      
512
         
513
            coregen
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            ./
515
            ./tmp/
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            ./tmp/_cg/
517
         
518
         
519
            xc6slx45
520
            spartan6
521
            csg324
522
            -2
523
         
524
         
525
            BusFormatAngleBracketNotRipped
526
            Verilog
527
            true
528
            Other
529
            false
530
            false
531
            false
532
            Ngc
533
            false
534
         
535
         
536
            Behavioral
537
            Verilog
538
            false
539
         
540
      
541
   
542
543
 

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