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[/] [xilinx_virtex_fp_library/] [trunk/] [GeneralPrecMAF/] [Multiply_Accumulate.v] - Blame information for rev 3

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1 3 constantin
`timescale 1ns / 1ps
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//////////////////////////////////////////////////////////////////////////////////
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// Company: 
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// Engineer: 
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// 
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// Create Date:    17:53:05 10/15/2013 
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// Design Name: 
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// Module Name:    Multiply_Accumulate 
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// Project Name: 
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// Target Devices: 
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// Tool versions: 
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// Description: C  A*B
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//
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// Dependencies: 
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//
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// Revision: 
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// Revision 0.01 - File Created
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// Additional Comments: 
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//
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//////////////////////////////////////////////////////////////////////////////////
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module Multiply_Accumulate #(   parameter size_exponent = 8,    //exponent bits
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                                                                                parameter size_mantissa = 24,   //mantissa bits
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                                                                                parameter size_counter  = 5,    //log2(size_mantissa) + 1 = 5
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                                                                                parameter size_exception_field = 2,     // zero/normal numbers/infinity/NaN
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                                                                                parameter zero                          = 00, //00
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                                                                                parameter normal_number = 01, //01
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                                                                                parameter infinity              = 10, //10
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                                                                                parameter NaN                           = 11, //11
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                                                                                parameter pipeline              = 0,
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                                                                                parameter pipeline_pos  = 0,  //8 bits
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                                                                                parameter size = size_exponent + size_mantissa + size_exception_field,
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                                                                                parameter size_mul_mantissa = size_mantissa + size_mantissa,
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                                                                                parameter size_mul_counter = size_counter + 1)
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                                                                        (       input clk,
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                                                                                input rst,
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                                                                                //input start,
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                                                                                input [size - 1:0] a_number_i,
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                                                                                input [size - 1:0] b_number_i,
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                                                                                input [size - 1:0] c_number_i,
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                                                                                input sub,
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                                                                                //output busy
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                                                                                output[size - 1:0] resulting_number_o);
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        //reg [size_mantissa - 1 : 0] m_a_number_reg, m_a_number_next;  // (1.original_mantissa) => (size_mantissa+1) because of the hidden bit
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        //reg [size_mantissa - 1 : 0] m_b_number_reg, m_b_number_next;  // (1.original_mantissa) => (size_mantissa+1) because of the hidden bit
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        //reg [size_mantissa - 1 : 0] m_c_number_reg, m_c_number_next;  // (1.original_mantissa) => (size_mantissa+1) because of the hidden bit
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        //reg [size_exponent - 1 : 0] e_a_number_reg, e_a_number_next;
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        //reg [size_exponent - 1 : 0] e_b_number_reg, e_b_number_next;
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        //reg [size_exponent - 1 : 0] e_c_number_reg, e_c_number_next;
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        //reg s_a_number_reg, s_a_number_next;
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        //reg s_b_number_reg, s_b_number_next;
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        //reg s_c_number_reg, s_c_number_next;
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        //reg [size_exception_field - 1 : 0] sp_case_a_number_reg, sp_case_a_number_next;
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        //reg [size_exception_field - 1 : 0] sp_case_b_number_reg, sp_case_b_number_next;
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        //reg [size_exception_field - 1 : 0] sp_case_c_number_reg, sp_case_c_number_next;
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        wire [size_mantissa - 1 : 0] m_a_number_reg, m_b_number_reg, m_c_number_reg;
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        wire [size_exponent - 1 : 0] e_a_number_reg, e_b_number_reg, e_c_number_reg;
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        wire s_a_number_reg, s_b_number_reg, s_c_number_reg;
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        wire [size_exception_field - 1 : 0] sp_case_a_number_reg, sp_case_b_number_reg, sp_case_c_number_reg;
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        //---------------------------------------------------------------------------------------
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        wire [size_mul_mantissa-1:0] mul_mantissa, c_mantissa;
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        wire [size_mul_mantissa  :0] acc_resulting_number;
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        wire [size_mul_mantissa  :0] ab_shifted_mul_mantissa, c_shifted_mantissa;
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        wire [size_exponent : 0] exp_ab;
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        wire [size_exponent-1:0] modify_exp_ab, modify_exp_c;
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        wire [size_mul_counter-1: 0] lz_mul;
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        wire sign_res;
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        wire eff_sub;
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        wire ovf;
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        wire comp_exp;
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        wire [size_mul_mantissa+1:0] normalized_mantissa;
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        wire [size_exponent  :0] unnormalized_exp;
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        wire [size_mantissa-2:0] final_mantissa;
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        wire [size_exponent-1:0] final_exponent;
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        wire [size_exception_field - 1 : 0] sp_case_result_o;
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/*
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        always
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                @(posedge clk, posedge rst)
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        begin
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                if (rst)
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                        begin
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                                m_a_number_reg  <= 0;
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                                m_b_number_reg          <= 0;
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                                m_c_number_reg          <= 0;
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                                e_a_number_reg          <= 0;
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                                e_b_number_reg          <= 0;
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                                e_c_number_reg          <= 0;
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                                s_a_number_reg          <= 0;
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                                s_b_number_reg          <= 0;
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                                s_c_number_reg          <= 0;
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                                sp_case_a_number_reg    <= 0;
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                                sp_case_b_number_reg    <= 0;
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                                sp_case_c_number_reg    <= 0;
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                        end
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                else
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                        begin
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                                m_a_number_reg  <= m_a_number_next;
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                                m_b_number_reg          <= m_b_number_next;
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                                m_c_number_reg          <= m_c_number_next;
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                                e_a_number_reg          <= e_a_number_next;
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                                e_b_number_reg          <= e_b_number_next;
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                                e_c_number_reg          <= e_c_number_next;
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                                s_a_number_reg          <= s_a_number_next;
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                                s_b_number_reg          <= s_b_number_next;
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                                s_c_number_reg          <= s_c_number_next;
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                                sp_case_a_number_reg    <= sp_case_a_number_next;
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                                sp_case_b_number_reg    <= sp_case_b_number_next;
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                                sp_case_c_number_reg    <= sp_case_c_number_next;
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                        end
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        end
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118
        always
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                @(*)
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        begin
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                m_a_number_next         = m_a_number_reg;
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                m_b_number_next = m_b_number_reg;
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                m_c_number_next = m_c_number_reg;
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                e_a_number_next = e_a_number_reg;
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                e_b_number_next = e_b_number_reg;
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                e_c_number_next = e_c_number_reg;
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                s_a_number_next = s_a_number_reg;
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                s_b_number_next = s_b_number_reg;
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                s_c_number_next = s_c_number_reg;
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                sp_case_a_number_next   = sp_case_a_number_reg;
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                sp_case_b_number_next   = sp_case_b_number_reg;
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                sp_case_c_number_next   = sp_case_c_number_reg;
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                if (start)
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                        begin
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                                m_a_number_next         = {1'b1, a_number_i[size_mantissa - 2 : 0]};
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                                m_b_number_next = {1'b1, b_number_i[size_mantissa - 2 :0]};
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                                m_c_number_next = {1'b1, c_number_i[size_mantissa - 2 :0]};
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                                e_a_number_next = a_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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                                e_b_number_next = b_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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                                e_c_number_next = c_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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                                s_a_number_next = a_number_i[size-1];
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                                s_b_number_next = b_number_i[size-1];
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                                s_c_number_next = c_number_i[size-1];
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                                sp_case_a_number_next   = a_number_i[size - 1 : size - size_exception_field];
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                                sp_case_b_number_next   = b_number_i[size - 1 : size - size_exception_field];
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                                sp_case_c_number_next   = c_number_i[size - 1 : size - size_exception_field];
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                        end
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        end
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        */
150
 
151
        assign m_a_number_reg   = {1'b1, a_number_i[size_mantissa - 2 :0]};
152
        assign m_b_number_reg   = {1'b1, b_number_i[size_mantissa - 2 :0]};
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        assign m_c_number_reg   = {1'b1, c_number_i[size_mantissa - 2 :0]};
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        assign e_a_number_reg   = a_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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        assign e_b_number_reg   = b_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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        assign e_c_number_reg   = c_number_i[size_mantissa + size_exponent - 1 : size_mantissa - 1];
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        assign s_a_number_reg   = a_number_i[size - size_exception_field - 1];
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        assign s_b_number_reg   = b_number_i[size - size_exception_field - 1];
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        assign s_c_number_reg   = c_number_i[size - size_exception_field - 1];
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        assign sp_case_a_number_reg     = a_number_i[size - 1 : size - size_exception_field];
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        assign sp_case_b_number_reg     = b_number_i[size - 1 : size - size_exception_field];
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        assign sp_case_c_number_reg     = c_number_i[size - 1 : size - size_exception_field];
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        //-------------------------------------------------------------------------------------
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165
 
166
        //instantiate multiply component
167
        multiply #(     .size_mantissa(size_mantissa),
168
                                        .size_counter(size_counter),
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                                        .size_mul_mantissa(size_mul_mantissa))
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                multiply_instance (     .a_mantissa_i(m_a_number_reg),
171
                                                                        .b_mantissa_i(m_b_number_reg),
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                                                                        .mul_mantissa(mul_mantissa));
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174
        assign c_mantissa = {1'b0,m_c_number_reg, {(size_mantissa-1'b1){1'b0}}};
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        assign exp_ab = e_a_number_reg + e_b_number_reg - ({1'b1,{(size_exponent-1'b1){1'b0}}} - 1'b1);
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        assign {modify_exp_ab, modify_exp_c, unnormalized_exp} = (exp_ab >= e_c_number_reg)? {8'd0,(exp_ab - e_c_number_reg), exp_ab} : {(e_c_number_reg - exp_ab), 8'd0, e_c_number_reg};
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        //instantiate shifter component for mul_mantissa shift, mul_mantissa <=> ab_mantissa
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        shifter #(      .INPUT_SIZE(size_mul_mantissa),
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                                        .SHIFT_SIZE(size_exponent),
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                                        .OUTPUT_SIZE(size_mul_mantissa + 1'b1),
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                                        .DIRECTION(1'b0), //0=right, 1=left
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                                        .PIPELINE(pipeline),
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                                        .POSITION(pipeline_pos))
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                shifter_ab_instance(    .a(mul_mantissa),//mantissa
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                                                                .arith(1'b0),//logical shift
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                                                                .shft(modify_exp_ab),
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                                                                .shifted_a(ab_shifted_mul_mantissa));//
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        //instantiate shifter component for c_mantissa shift
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        shifter #(      .INPUT_SIZE(size_mul_mantissa),
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                                        .SHIFT_SIZE(size_exponent),
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                                        .OUTPUT_SIZE(size_mul_mantissa + 1'b1),
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                                        .DIRECTION(1'b0), //0=right, 1=left
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                                        .PIPELINE(pipeline),
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                                        .POSITION(pipeline_pos))
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                shifter_c_instance(     .a(c_mantissa),//mantissa
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                                                                .arith(1'b0),//logical shift
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                                                                .shft(modify_exp_c),
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                                                                .shifted_a(c_shifted_mantissa));//
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        //instantiate effective_op component
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        effective_op effective_op_instance(     .sign_a(s_a_number_reg),
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                                                                                                        .sign_b(s_b_number_reg),
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                                                                                                        .sign_c(s_c_number_reg),
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                                                                                                        .sub(sub),
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                                                                                                        .eff_sub(eff_sub));
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        //instantiate compare_exponent component
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        compare_exponent #(     .size_exponent(size_exponent))
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                compare_exponent_instance       (       .exp_ab(exp_ab),
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                                                                                                .exp_c(e_c_number_reg),
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                                                                                                .compare(comp_exp));
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        //instantiate sign_comp component
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        sign_comp sign_comp_instance(   .sign_a(s_a_number_reg),
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                                                                                        .sign_b(s_b_number_reg),
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                                                                                        .sign_c(s_c_number_reg),
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                                                                                        .comp_exp(comp_exp),
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                                                                                        .eff_sub(eff_sub),
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                                                                                        .sign_add(ovf),
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                                                                                        .sign_res(sign_res));
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        //instantiate accumulate component
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        accumulate #(   .size_mantissa(size_mantissa),
230
                                                .size_counter(size_counter),
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                                                .size_mul_mantissa(size_mul_mantissa))
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                accumulate_instance (   .ab_number_i(ab_shifted_mul_mantissa[size_mul_mantissa:1]),
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                                                                                .c_number_i(c_shifted_mantissa[size_mul_mantissa:1]),
234
                                                                                .sub(eff_sub),
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                                                                                .ovf(ovf),
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                                                                                .acc_resulting_number_o(acc_resulting_number));
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        //instantiate leading_zeros component
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        leading_zeros #(        .SIZE_INT(size_mul_mantissa + 1'b1),
241
                                                        .SIZE_COUNTER(size_mul_counter),
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                                                        .PIPELINE(pipeline))
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                leading_zeros_instance( .a(acc_resulting_number),//mantissa 
244
                                                                                .ovf(ovf), //??????acc_resulting_number[size_mul_mantissa]
245
                                                                                .lz(lz_mul));
246
 
247
 
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        //instantiate shifter component
249
        shifter #(      .INPUT_SIZE(size_mul_mantissa + 1'b1),
250
                                        .SHIFT_SIZE(size_mul_counter),
251
                                        .OUTPUT_SIZE(size_mul_mantissa + 2'd2),
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                                        .DIRECTION(1'b1), //0=right, 1=left
253
                                        .PIPELINE(pipeline),
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                                        .POSITION(pipeline_pos))
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                shifter_instance(       .a(acc_resulting_number),//mantissa
256
                                                                .arith(1'b0),//logical shift
257
                                                                .shft(lz_mul),
258
                                                                .shifted_a(normalized_mantissa));//resulted mantissa after accumulation --- size_output bits!!! 
259
 
260
        //instantiate special_cases_mul_acc component
261
        special_cases_mul_acc   #(      .size_exception_field   (size_exception_field),
262
                                                                .zero                   (zero                ),
263
                                                                .normal_number          (normal_number       ),
264
                                                                .infinity                       (infinity                    ),
265
                                                                .NaN                            (NaN                         ))
266
                special_cases_mul_acc_instance  (       .sp_case_a_number(sp_case_a_number_reg),
267
                                                                                        .sp_case_b_number(sp_case_b_number_reg),
268
                                                                                        .sp_case_c_number(sp_case_c_number_reg),
269
                                                                                        .sp_case_result_o(sp_case_result_o));
270
 
271
        assign final_exponent = unnormalized_exp - lz_mul + 2'd2;
272
        assign final_mantissa = normalized_mantissa[size_mul_mantissa : size_mul_mantissa+2-size_mantissa];
273
        assign resulting_number_o = {sp_case_result_o, sign_res, final_exponent, final_mantissa};
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endmodule

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