OpenCores
URL https://opencores.org/ocsvn/a-z80/a-z80/trunk

Subversion Repositories a-z80

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /a-z80/trunk/cpu
    from Rev 14 to Rev 16
    ↔ Reverse comparison
  •

Rev 14 → Rev 16

/alu/alu_flags.bdf
485,9 → 485,9
)
(pin
(input)
(rect 24 1640 200 1656)
(rect 24 1624 200 1640)
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
(text "hold_clk_wait" (rect 9 0 73 12)(font "Arial" ))
(text "nhold_clk_wait" (rect 5 0 76 12)(font "Arial" ))
(pt 176 8)
(drawing
(line (pt 92 12)(pt 117 12))
666,7 → 666,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
698,7 → 698,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
730,7 → 730,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
762,7 → 762,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
794,7 → 794,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
826,7 → 826,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
858,7 → 858,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
890,7 → 890,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
922,7 → 922,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
954,7 → 954,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
986,7 → 986,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
1018,7 → 1018,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
1050,7 → 1050,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
1082,7 → 1082,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
1114,7 → 1114,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
1146,7 → 1146,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 48 24)(pt 64 24))
)
(drawing
1179,7 → 1179,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 48 24)(pt 64 24))
)
(drawing
1212,7 → 1212,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 48 24)(pt 64 24))
)
(drawing
1245,7 → 1245,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 48 24)(pt 64 24))
)
(drawing
1278,7 → 1278,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 48 24)(pt 64 24))
)
(drawing
1311,7 → 1311,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 48 24)(pt 64 24))
)
(drawing
1344,7 → 1344,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 48 24)(pt 64 24))
)
(drawing
1377,7 → 1377,7
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 32 16)(pt 48 16))
)
(drawing
1408,7 → 1408,7
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 32 16)(pt 48 16))
)
(drawing
1439,7 → 1439,7
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 32 16)(pt 48 16))
)
(drawing
1470,7 → 1470,7
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 32 16)(pt 48 16))
)
(drawing
1501,7 → 1501,7
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 32 16)(pt 48 16))
)
(drawing
1532,7 → 1532,7
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 32 16)(pt 48 16))
)
(drawing
1563,7 → 1563,7
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 32 16)(pt 48 16))
)
(drawing
1594,7 → 1594,7
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 32 16)(pt 48 16))
)
(drawing
1625,7 → 1625,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 48 24)(pt 64 24))
)
(drawing
1651,7 → 1651,7
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16))
)
(drawing
1683,7 → 1683,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 49 24)(pt 64 24))
)
(drawing
1717,7 → 1717,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 49 24)(pt 64 24))
)
(drawing
1854,7 → 1854,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
1879,7 → 1879,7
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16))
)
(drawing
1911,7 → 1911,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
1950,7 → 1950,7
(pt 64 24)
(output)
(text "OUT" (rect 47 15 64 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 47 15 61 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 47 15 64 27)(font "Courier New" (bold))(invisible))
(line (pt 49 24)(pt 64 24))
)
(drawing
1983,7 → 1983,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
2008,7 → 2008,7
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16))
)
(drawing
2040,7 → 2040,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 48 24)(pt 64 24))
)
(drawing
2094,7 → 2094,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
2151,7 → 2151,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
2208,7 → 2208,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
2265,7 → 2265,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
2322,7 → 2322,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
2379,7 → 2379,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
2436,7 → 2436,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
2493,7 → 2493,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
2550,7 → 2550,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
2607,7 → 2607,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
2622,31 → 2622,6
)
)
(symbol
(rect 208 1632 256 1664)
(text "NOT" (rect 1 0 21 10)(font "Arial" (font_size 6)))
(text "inst27" (rect 3 21 32 33)(font "Arial" ))
(port
(pt 0 16)
(input)
(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(line (pt 0 16)(pt 13 16))
)
(port
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16))
)
(drawing
(line (pt 13 25)(pt 13 7))
(line (pt 13 7)(pt 31 16))
(line (pt 13 25)(pt 31 16))
(circle (rect 31 12 39 20))
)
)
(symbol
(rect 440 1296 504 1344)
(text "AND3" (rect 1 0 25 10)(font "Arial" (font_size 6)))
(text "inst28" (rect 3 37 32 49)(font "Arial" ))
2675,7 → 2650,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 43 24)(pt 64 24))
)
(drawing
2707,7 → 2682,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
3877,10 → 3852,6
(bus)
)
(connector
(pt 200 1648)
(pt 208 1648)
)
(connector
(pt 632 1400)
(pt 616 1400)
)
3985,20 → 3956,20
(pt 440 1456)
)
(connector
(pt 424 1456)
(pt 424 1648)
)
(connector
(pt 440 1320)
(pt 424 1320)
)
(connector
(pt 424 1632)
(pt 200 1632)
)
(connector
(pt 424 1320)
(pt 424 1456)
)
(connector
(pt 256 1648)
(pt 424 1648)
(pt 424 1456)
(pt 424 1632)
)
(junction (pt 816 568))
(junction (pt 840 640))
4073,7 → 4044,7
(section (rect 0 18 256 34)(text "DESIGNER" (rect 2 0 59 12)(font "Arial" ))(text "Goran Devic" (rect 56 2 135 17)(font "Arial" (font_size 9)))(border))
(section (rect 104 0 256 17)(text "MODULE" (rect 2 1 48 13)(font "Arial" ))(text "alu_flags" (rect 43 2 104 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 0 0 256 17)(text "PROJECT" (rect 2 0 52 12)(font "Arial" ))(text "A-Z80" (rect 56 2 94 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 192 35 256 51)(text "REV" (rect 2 1 25 13)(font "Arial" ))(text "1.7" (rect 43 3 60 17)(font "Arial" (font_size 8)))(border))
(section (rect 192 35 256 51)(text "REV" (rect 2 1 25 13)(font "Arial" ))(text "1.8" (rect 43 3 60 17)(font "Arial" (font_size 8)))(border))
(drawing
)
)
/alu/alu_flags.bsf
229,8 → 229,8
(port
(pt 0 496)
(input)
(text "hold_clk_wait" (rect 0 0 77 14)(font "Arial" (font_size 8)))
(text "hold_clk_wait" (rect 21 491 98 505)(font "Arial" (font_size 8)))
(text "nhold_clk_wait" (rect 0 0 84 14)(font "Arial" (font_size 8)))
(text "nhold_clk_wait" (rect 21 491 105 505)(font "Arial" (font_size 8)))
(line (pt 0 496)(pt 16 496))
)
(port
/alu/alu_flags.v
14,7 → 14,7
 
// PROGRAM "Quartus II 64-Bit"
// VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition"
// CREATED "Fri Dec 09 21:55:51 2016"
// CREATED "Sat Dec 10 09:01:30 2016"
 
module alu_flags(
ctl_flags_oe,
46,7 → 46,7
clk,
ctl_flags_cf2_sel_shift,
ctl_flags_cf2_sel_daa,
hold_clk_wait,
nhold_clk_wait,
flags_sf,
flags_zf,
flags_hf,
88,7 → 88,7
input wire clk;
input wire ctl_flags_cf2_sel_shift;
input wire ctl_flags_cf2_sel_daa;
input wire hold_clk_wait;
input wire nhold_clk_wait;
output wire flags_sf;
output wire flags_zf;
output wire flags_hf;
111,9 → 111,10
wire SYNTHESIZED_WIRE_5;
wire SYNTHESIZED_WIRE_6;
wire SYNTHESIZED_WIRE_7;
reg SYNTHESIZED_WIRE_41;
wire SYNTHESIZED_WIRE_42;
reg SYNTHESIZED_WIRE_39;
wire SYNTHESIZED_WIRE_8;
wire SYNTHESIZED_WIRE_9;
wire SYNTHESIZED_WIRE_10;
wire SYNTHESIZED_WIRE_11;
wire SYNTHESIZED_WIRE_12;
wire SYNTHESIZED_WIRE_13;
126,110 → 127,106
wire SYNTHESIZED_WIRE_20;
wire SYNTHESIZED_WIRE_21;
wire SYNTHESIZED_WIRE_22;
reg DFFE_inst_latch_sf;
wire SYNTHESIZED_WIRE_23;
reg DFFE_inst_latch_pf;
reg DFFE_inst_latch_nf;
wire SYNTHESIZED_WIRE_24;
reg DFFE_inst_latch_sf;
wire SYNTHESIZED_WIRE_25;
reg DFFE_inst_latch_pf;
reg DFFE_inst_latch_nf;
wire SYNTHESIZED_WIRE_26;
wire SYNTHESIZED_WIRE_27;
wire SYNTHESIZED_WIRE_28;
wire SYNTHESIZED_WIRE_29;
wire SYNTHESIZED_WIRE_30;
wire SYNTHESIZED_WIRE_31;
wire SYNTHESIZED_WIRE_43;
wire SYNTHESIZED_WIRE_40;
wire SYNTHESIZED_WIRE_32;
wire SYNTHESIZED_WIRE_33;
wire SYNTHESIZED_WIRE_34;
wire SYNTHESIZED_WIRE_35;
wire SYNTHESIZED_WIRE_36;
wire SYNTHESIZED_WIRE_37;
wire SYNTHESIZED_WIRE_38;
wire SYNTHESIZED_WIRE_39;
reg DFFE_inst_latch_cf;
reg DFFE_inst_latch_cf2;
wire SYNTHESIZED_WIRE_40;
wire SYNTHESIZED_WIRE_38;
 
assign flags_sf = DFFE_inst_latch_sf;
assign flags_zf = SYNTHESIZED_WIRE_41;
assign flags_hf = SYNTHESIZED_WIRE_25;
assign flags_zf = SYNTHESIZED_WIRE_39;
assign flags_hf = SYNTHESIZED_WIRE_23;
assign flags_pf = DFFE_inst_latch_pf;
assign flags_cf = SYNTHESIZED_WIRE_26;
assign flags_cf = SYNTHESIZED_WIRE_24;
assign flags_nf = DFFE_inst_latch_nf;
assign flags_cf_latch = DFFE_inst_latch_cf;
assign SYNTHESIZED_WIRE_40 = 0;
assign SYNTHESIZED_WIRE_38 = 0;
 
 
 
assign SYNTHESIZED_WIRE_12 = db[7] & ctl_flags_bus;
assign SYNTHESIZED_WIRE_10 = db[7] & ctl_flags_bus;
 
assign SYNTHESIZED_WIRE_19 = alu_xf_out & ctl_flags_alu;
assign SYNTHESIZED_WIRE_17 = alu_xf_out & ctl_flags_alu;
 
assign SYNTHESIZED_WIRE_22 = db[2] & ctl_flags_bus;
assign SYNTHESIZED_WIRE_20 = db[2] & ctl_flags_bus;
 
assign SYNTHESIZED_WIRE_21 = pf_sel & ctl_flags_alu;
assign SYNTHESIZED_WIRE_19 = pf_sel & ctl_flags_alu;
 
assign SYNTHESIZED_WIRE_2 = db[1] & ctl_flags_bus;
 
assign SYNTHESIZED_WIRE_25 = DFFE_inst_latch_hf ^ ctl_flags_hf_cpl;
assign SYNTHESIZED_WIRE_23 = DFFE_inst_latch_hf ^ ctl_flags_hf_cpl;
 
assign SYNTHESIZED_WIRE_24 = db[0] & ctl_flags_bus;
assign SYNTHESIZED_WIRE_22 = db[0] & ctl_flags_bus;
 
assign SYNTHESIZED_WIRE_23 = ctl_flags_alu & alu_core_cf_out;
assign SYNTHESIZED_WIRE_21 = ctl_flags_alu & alu_core_cf_out;
 
assign SYNTHESIZED_WIRE_9 = ~ctl_flags_cf2_we;
assign SYNTHESIZED_WIRE_8 = ~ctl_flags_cf2_we;
 
assign SYNTHESIZED_WIRE_26 = SYNTHESIZED_WIRE_0 ^ ctl_flags_cf_cpl;
assign SYNTHESIZED_WIRE_24 = SYNTHESIZED_WIRE_0 ^ ctl_flags_cf_cpl;
 
assign SYNTHESIZED_WIRE_1 = alu_sf_out & ctl_flags_alu;
 
assign SYNTHESIZED_WIRE_11 = alu_sf_out & ctl_flags_alu;
assign SYNTHESIZED_WIRE_9 = alu_sf_out & ctl_flags_alu;
 
assign SYNTHESIZED_WIRE_5 = ctl_flags_nf_set | SYNTHESIZED_WIRE_1 | SYNTHESIZED_WIRE_2;
 
assign SYNTHESIZED_WIRE_39 = SYNTHESIZED_WIRE_3 & SYNTHESIZED_WIRE_4;
assign SYNTHESIZED_WIRE_37 = SYNTHESIZED_WIRE_3 & SYNTHESIZED_WIRE_4;
 
 
assign SYNTHESIZED_WIRE_34 = SYNTHESIZED_WIRE_5 & SYNTHESIZED_WIRE_6;
assign SYNTHESIZED_WIRE_32 = SYNTHESIZED_WIRE_5 & SYNTHESIZED_WIRE_6;
 
assign SYNTHESIZED_WIRE_6 = ~ctl_flags_nf_clr;
 
assign SYNTHESIZED_WIRE_7 = ~ctl_alu_zero_16bit;
 
assign SYNTHESIZED_WIRE_4 = SYNTHESIZED_WIRE_7 | SYNTHESIZED_WIRE_41;
assign SYNTHESIZED_WIRE_4 = SYNTHESIZED_WIRE_7 | SYNTHESIZED_WIRE_39;
 
assign SYNTHESIZED_WIRE_42 = ~hold_clk_wait;
assign SYNTHESIZED_WIRE_27 = ctl_flags_cf_we & nhold_clk_wait & SYNTHESIZED_WIRE_8;
 
assign SYNTHESIZED_WIRE_29 = ctl_flags_cf_we & SYNTHESIZED_WIRE_42 & SYNTHESIZED_WIRE_9;
assign SYNTHESIZED_WIRE_29 = ctl_flags_cf2_we & nhold_clk_wait;
 
assign SYNTHESIZED_WIRE_31 = ctl_flags_cf2_we & SYNTHESIZED_WIRE_42;
assign SYNTHESIZED_WIRE_12 = db[6] & ctl_flags_bus;
 
assign SYNTHESIZED_WIRE_14 = db[6] & ctl_flags_bus;
assign SYNTHESIZED_WIRE_34 = SYNTHESIZED_WIRE_9 | SYNTHESIZED_WIRE_10;
 
assign SYNTHESIZED_WIRE_36 = SYNTHESIZED_WIRE_11 | SYNTHESIZED_WIRE_12;
assign SYNTHESIZED_WIRE_3 = SYNTHESIZED_WIRE_11 | SYNTHESIZED_WIRE_12;
 
assign SYNTHESIZED_WIRE_3 = SYNTHESIZED_WIRE_13 | SYNTHESIZED_WIRE_14;
assign SYNTHESIZED_WIRE_36 = SYNTHESIZED_WIRE_13 | SYNTHESIZED_WIRE_14;
 
assign SYNTHESIZED_WIRE_38 = SYNTHESIZED_WIRE_15 | SYNTHESIZED_WIRE_16;
assign SYNTHESIZED_WIRE_40 = SYNTHESIZED_WIRE_15 | SYNTHESIZED_WIRE_16;
 
assign SYNTHESIZED_WIRE_43 = SYNTHESIZED_WIRE_17 | SYNTHESIZED_WIRE_18;
assign SYNTHESIZED_WIRE_35 = SYNTHESIZED_WIRE_17 | SYNTHESIZED_WIRE_18;
 
assign SYNTHESIZED_WIRE_37 = SYNTHESIZED_WIRE_19 | SYNTHESIZED_WIRE_20;
assign SYNTHESIZED_WIRE_33 = SYNTHESIZED_WIRE_19 | SYNTHESIZED_WIRE_20;
 
assign SYNTHESIZED_WIRE_35 = SYNTHESIZED_WIRE_21 | SYNTHESIZED_WIRE_22;
assign SYNTHESIZED_WIRE_11 = alu_zero & ctl_flags_alu;
 
assign SYNTHESIZED_WIRE_13 = alu_zero & ctl_flags_alu;
assign SYNTHESIZED_WIRE_26 = SYNTHESIZED_WIRE_21 | SYNTHESIZED_WIRE_22;
 
assign SYNTHESIZED_WIRE_28 = SYNTHESIZED_WIRE_23 | SYNTHESIZED_WIRE_24;
 
assign db[7] = ctl_flags_oe ? DFFE_inst_latch_sf : 1'bz;
 
assign SYNTHESIZED_WIRE_16 = db[5] & ctl_flags_bus;
assign SYNTHESIZED_WIRE_14 = db[5] & ctl_flags_bus;
 
assign db[6] = ctl_flags_oe ? SYNTHESIZED_WIRE_41 : 1'bz;
assign db[6] = ctl_flags_oe ? SYNTHESIZED_WIRE_39 : 1'bz;
 
assign db[5] = ctl_flags_oe ? flags_yf : 1'bz;
 
assign db[4] = ctl_flags_oe ? SYNTHESIZED_WIRE_25 : 1'bz;
assign db[4] = ctl_flags_oe ? SYNTHESIZED_WIRE_23 : 1'bz;
 
assign db[3] = ctl_flags_oe ? flags_xf : 1'bz;
 
237,24 → 234,24
 
assign db[1] = ctl_flags_oe ? DFFE_inst_latch_nf : 1'bz;
 
assign db[0] = ctl_flags_oe ? SYNTHESIZED_WIRE_26 : 1'bz;
assign db[0] = ctl_flags_oe ? SYNTHESIZED_WIRE_24 : 1'bz;
 
assign SYNTHESIZED_WIRE_15 = alu_yf_out & ctl_flags_alu;
assign SYNTHESIZED_WIRE_13 = alu_yf_out & ctl_flags_alu;
 
assign SYNTHESIZED_WIRE_0 = ctl_flags_cf_set | SYNTHESIZED_WIRE_27;
assign SYNTHESIZED_WIRE_0 = ctl_flags_cf_set | SYNTHESIZED_WIRE_25;
 
assign SYNTHESIZED_WIRE_18 = db[4] & ctl_flags_bus;
assign SYNTHESIZED_WIRE_16 = db[4] & ctl_flags_bus;
 
assign SYNTHESIZED_WIRE_17 = alu_core_cf_out & ctl_flags_alu;
assign SYNTHESIZED_WIRE_15 = alu_core_cf_out & ctl_flags_alu;
 
assign SYNTHESIZED_WIRE_20 = db[3] & ctl_flags_bus;
assign SYNTHESIZED_WIRE_18 = db[3] & ctl_flags_bus;
 
 
always@(posedge clk)
begin
if (SYNTHESIZED_WIRE_29)
if (SYNTHESIZED_WIRE_27)
begin
DFFE_inst_latch_cf <= SYNTHESIZED_WIRE_28;
DFFE_inst_latch_cf <= SYNTHESIZED_WIRE_26;
end
end
 
261,9 → 258,9
 
always@(posedge clk)
begin
if (SYNTHESIZED_WIRE_31)
if (SYNTHESIZED_WIRE_29)
begin
DFFE_inst_latch_cf2 <= SYNTHESIZED_WIRE_30;
DFFE_inst_latch_cf2 <= SYNTHESIZED_WIRE_28;
end
end
 
272,7 → 269,7
begin
if (ctl_flags_hf_we)
begin
DFFE_inst_latch_hf <= SYNTHESIZED_WIRE_43;
DFFE_inst_latch_hf <= SYNTHESIZED_WIRE_40;
end
end
 
281,7 → 278,7
begin
if (ctl_flags_hf2_we)
begin
flags_hf2 <= SYNTHESIZED_WIRE_43;
flags_hf2 <= SYNTHESIZED_WIRE_40;
end
end
 
290,7 → 287,7
begin
if (ctl_flags_nf_we)
begin
DFFE_inst_latch_nf <= SYNTHESIZED_WIRE_34;
DFFE_inst_latch_nf <= SYNTHESIZED_WIRE_32;
end
end
 
299,7 → 296,7
begin
if (ctl_flags_pf_we)
begin
DFFE_inst_latch_pf <= SYNTHESIZED_WIRE_35;
DFFE_inst_latch_pf <= SYNTHESIZED_WIRE_33;
end
end
 
308,7 → 305,7
begin
if (ctl_flags_sz_we)
begin
DFFE_inst_latch_sf <= SYNTHESIZED_WIRE_36;
DFFE_inst_latch_sf <= SYNTHESIZED_WIRE_34;
end
end
 
317,7 → 314,7
begin
if (ctl_flags_xy_we)
begin
flags_xf <= SYNTHESIZED_WIRE_37;
flags_xf <= SYNTHESIZED_WIRE_35;
end
end
 
326,7 → 323,7
begin
if (ctl_flags_xy_we)
begin
flags_yf <= SYNTHESIZED_WIRE_38;
flags_yf <= SYNTHESIZED_WIRE_36;
end
end
 
335,7 → 332,7
begin
if (ctl_flags_sz_we)
begin
SYNTHESIZED_WIRE_41 <= SYNTHESIZED_WIRE_39;
SYNTHESIZED_WIRE_39 <= SYNTHESIZED_WIRE_37;
end
end
 
344,7 → 341,7
.in0(DFFE_inst_latch_cf),
.in1(DFFE_inst_latch_cf2),
.sel1(ctl_flags_use_cf2),
.out(SYNTHESIZED_WIRE_27));
.out(SYNTHESIZED_WIRE_25));
 
 
alu_mux_4 b2v_inst_mux_cf2(
351,9 → 348,9
.in0(alu_core_cf_out),
.in1(shift_cf_out),
.in2(daa_cf_out),
.in3(SYNTHESIZED_WIRE_40),
.in3(SYNTHESIZED_WIRE_38),
.sel(sel),
.out(SYNTHESIZED_WIRE_30));
.out(SYNTHESIZED_WIRE_28));
 
assign sel[0] = ctl_flags_cf2_sel_shift;
assign sel[1] = ctl_flags_cf2_sel_daa;
/control/clk_delay.bdf
165,7 → 165,7
)
(pin
(output)
(rect 656 88 832 104)
(rect 656 64 832 80)
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
(text "hold_clk_iorq" (rect 90 0 153 12)(font "Arial" ))
(pt 0 8)
197,7 → 197,7
)
(pin
(output)
(rect 656 136 832 152)
(rect 656 96 832 112)
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
(text "iorq_Tw" (rect 90 0 126 12)(font "Arial" ))
(pt 0 8)
213,7 → 213,7
)
(pin
(output)
(rect 656 384 832 400)
(rect 656 360 832 376)
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
(text "busack" (rect 90 0 125 12)(font "Arial" ))
(pt 0 8)
245,7 → 245,7
)
(pin
(output)
(rect 656 440 832 456)
(rect 656 392 832 408)
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
(text "hold_clk_busrq" (rect 90 0 163 12)(font "Arial" ))
(pt 0 8)
259,6 → 259,22
(line (pt 78 12)(pt 82 8))
)
)
(pin
(output)
(rect 656 224 832 240)
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
(text "nhold_clk_wait" (rect 90 0 160 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 0 8)(pt 52 8))
(line (pt 52 4)(pt 78 4))
(line (pt 52 12)(pt 78 12))
(line (pt 52 12)(pt 52 4))
(line (pt 78 4)(pt 82 8))
(line (pt 82 8)(pt 78 12))
(line (pt 78 12)(pt 82 8))
)
)
(symbol
(rect 368 80 432 160)
(text "DFF" (rect 1 0 19 10)(font "Arial" (font_size 6)))
360,7 → 376,7
)
)
(symbol
(rect 576 72 640 120)
(rect 576 48 640 96)
(text "OR2" (rect 1 0 19 10)(font "Arial" (font_size 6)))
(text "inst10" (rect 3 37 32 49)(font "Arial" ))
(port
548,7 → 564,7
(rotate270)
)
(symbol
(rect 576 368 640 416)
(rect 576 344 640 392)
(text "AND2" (rect 1 0 25 10)(font "Arial" (font_size 6)))
(text "inst11" (rect 3 37 32 49)(font "Arial" ))
(port
776,6 → 792,31
(circle (rect 28 68 36 76))
)
)
(symbol
(rect 584 216 632 248)
(text "NOT" (rect 1 0 21 10)(font "Arial" (font_size 6)))
(text "inst8" (rect 3 21 26 33)(font "Arial" ))
(port
(pt 0 16)
(input)
(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(line (pt 0 16)(pt 13 16))
)
(port
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16))
)
(drawing
(line (pt 13 25)(pt 13 7))
(line (pt 13 7)(pt 31 16))
(line (pt 13 25)(pt 31 16))
(circle (rect 31 12 39 20))
)
)
(connector
(pt 248 96)
(pt 232 96)
813,18 → 854,10
(pt 512 160)
)
(connector
(pt 560 64)
(pt 560 88)
)
(connector
(pt 312 104)
(pt 368 104)
)
(connector
(pt 560 88)
(pt 576 88)
)
(connector
(pt 456 336)
(pt 456 320)
)
917,10 → 950,6
(pt 456 64)
)
(connector
(pt 560 64)
(pt 456 64)
)
(connector
(pt 432 104)
(pt 456 104)
)
945,50 → 974,10
(pt 576 488)
)
(connector
(pt 504 360)
(pt 504 384)
)
(connector
(pt 488 400)
(pt 504 400)
)
(connector
(pt 504 384)
(pt 576 384)
)
(connector
(pt 640 392)
(pt 656 392)
)
(connector
(pt 488 264)
(pt 512 264)
)
(connector
(pt 512 264)
(pt 656 264)
)
(connector
(pt 640 96)
(pt 656 96)
)
(connector
(pt 560 104)
(pt 560 144)
)
(connector
(pt 560 144)
(pt 656 144)
)
(connector
(pt 544 104)
(pt 560 104)
)
(connector
(pt 560 104)
(pt 576 104)
)
(connector
(pt 512 224)
(pt 296 224)
)
1082,18 → 1071,6
(pt 656 480)
)
(connector
(pt 656 448)
(pt 504 448)
)
(connector
(pt 504 400)
(pt 504 448)
)
(connector
(pt 504 448)
(pt 504 472)
)
(connector
(pt 424 432)
(pt 416 432)
)
1110,18 → 1087,86
(pt 320 528)
)
(connector
(pt 504 400)
(pt 576 400)
(text "hold_clk_busrq" (rect 233 528 306 540)(font "Arial" ))
(pt 232 544)
(pt 320 544)
)
(connector
(pt 504 360)
(pt 632 232)
(pt 656 232)
)
(connector
(pt 584 232)
(pt 560 232)
)
(connector
(pt 560 232)
(pt 560 264)
)
(connector
(pt 512 264)
(pt 560 264)
)
(connector
(pt 560 264)
(pt 656 264)
)
(connector
(pt 640 368)
(pt 656 368)
)
(connector
(pt 400 360)
(pt 576 360)
)
(connector
(text "hold_clk_busrq" (rect 233 528 306 540)(font "Arial" ))
(pt 232 544)
(pt 320 544)
(pt 504 400)
(pt 504 472)
)
(connector
(pt 488 400)
(pt 504 400)
)
(connector
(pt 576 376)
(pt 560 376)
)
(connector
(pt 560 400)
(pt 560 376)
)
(connector
(pt 504 400)
(pt 560 400)
)
(connector
(pt 560 400)
(pt 656 400)
)
(connector
(pt 560 80)
(pt 576 80)
)
(connector
(pt 640 72)
(pt 656 72)
)
(connector
(pt 456 64)
(pt 576 64)
)
(connector
(pt 560 80)
(pt 560 104)
)
(connector
(pt 544 104)
(pt 560 104)
)
(connector
(pt 560 104)
(pt 656 104)
)
(junction (pt 344 176))
(junction (pt 400 200))
(junction (pt 560 104))
1136,11 → 1181,12
(junction (pt 512 264))
(junction (pt 456 104))
(junction (pt 456 488))
(junction (pt 504 448))
(junction (pt 560 264))
(junction (pt 560 400))
(text "Adds a 2-cycle delay for Interrupt response" (rect 48 40 298 54)(font "Arial" (font_size 8)))
(text "HOLD CLOCK FOR IORQ DELAY" (rect 656 168 840 182)(font "Arial" (font_size 8)))
(text "HOLD CLOCK FOR IORQ DELAY" (rect 656 128 840 142)(font "Arial" (font_size 8)))
(text "HOLD CLOCK FOR WAIT PIN ACTIVE" (rect 656 288 864 302)(font "Arial" (font_size 8)))
(text "HOLD CLOCK FOR BUS REQUEST" (rect 656 416 849 430)(font "Arial" (font_size 8)))
(text "HOLD CLOCK FOR BUS REQUEST" (rect 656 424 849 438)(font "Arial" (font_size 8)))
(text "Latch before M1 or throughout the busrq hold" (rect 400 544 658 558)(font "Arial" (font_size 8)))
(title_block
(rect 40 584 297 636)
1148,8 → 1194,8
(section (rect 0 0 256 17)(text "PROJECT" (rect 2 0 52 12)(font "Arial" ))(text "A-Z80" (rect 56 2 94 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 104 0 256 17)(text "MODULE" (rect 2 1 48 13)(font "Arial" ))(text "clk_delay" (rect 43 2 106 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 0 18 256 34)(text "DESIGNER" (rect 2 0 59 12)(font "Arial" ))(text "Goran Devic" (rect 56 2 135 17)(font "Arial" (font_size 9)))(border))
(section (rect 0 35 256 51)(text "DATE" (rect 2 0 30 12)(font "Arial" ))(text "July 27, 2014" (rect 56 3 131 17)(font "Arial" (font_size 8)))(border))
(section (rect 192 35 256 51)(text "REV" (rect 2 1 25 13)(font "Arial" ))(text "1.2" (rect 43 3 60 17)(font "Arial" (font_size 8)))(border))
(section (rect 0 35 256 51)(text "DATE" (rect 2 0 30 12)(font "Arial" ))(text "July 27, 2014, 2016" (rect 56 3 166 17)(font "Arial" (font_size 8)))(border))
(section (rect 192 35 256 51)(text "REV" (rect 2 1 25 13)(font "Arial" ))(text "1.3" (rect 43 3 60 17)(font "Arial" (font_size 8)))(border))
(drawing
)
)
/control/clk_delay.bsf
103,31 → 103,38
(port
(pt 200 64)
(output)
(text "hold_clk_wait" (rect 0 0 77 14)(font "Arial" (font_size 8)))
(text "hold_clk_wait" (rect 102 59 179 73)(font "Arial" (font_size 8)))
(text "nhold_clk_wait" (rect 0 0 84 14)(font "Arial" (font_size 8)))
(text "nhold_clk_wait" (rect 95 59 179 73)(font "Arial" (font_size 8)))
(line (pt 200 64)(pt 184 64))
)
(port
(pt 200 80)
(output)
(text "busack" (rect 0 0 41 14)(font "Arial" (font_size 8)))
(text "busack" (rect 138 75 179 89)(font "Arial" (font_size 8)))
(text "hold_clk_wait" (rect 0 0 77 14)(font "Arial" (font_size 8)))
(text "hold_clk_wait" (rect 102 75 179 89)(font "Arial" (font_size 8)))
(line (pt 200 80)(pt 184 80))
)
(port
(pt 200 96)
(output)
(text "hold_clk_busrq" (rect 0 0 86 14)(font "Arial" (font_size 8)))
(text "hold_clk_busrq" (rect 93 91 179 105)(font "Arial" (font_size 8)))
(text "busack" (rect 0 0 41 14)(font "Arial" (font_size 8)))
(text "busack" (rect 138 91 179 105)(font "Arial" (font_size 8)))
(line (pt 200 96)(pt 184 96))
)
(port
(pt 200 112)
(output)
(text "pin_control_oe" (rect 0 0 83 14)(font "Arial" (font_size 8)))
(text "pin_control_oe" (rect 96 107 179 121)(font "Arial" (font_size 8)))
(text "hold_clk_busrq" (rect 0 0 86 14)(font "Arial" (font_size 8)))
(text "hold_clk_busrq" (rect 93 107 179 121)(font "Arial" (font_size 8)))
(line (pt 200 112)(pt 184 112))
)
(port
(pt 200 128)
(output)
(text "pin_control_oe" (rect 0 0 83 14)(font "Arial" (font_size 8)))
(text "pin_control_oe" (rect 96 123 179 137)(font "Arial" (font_size 8)))
(line (pt 200 128)(pt 184 128))
)
(drawing
(rectangle (rect 16 16 184 176))
)
/control/clk_delay.v
14,7 → 14,7
 
// PROGRAM "Quartus II 64-Bit"
// VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition"
// CREATED "Sun Nov 16 23:41:11 2014"
// CREATED "Sat Dec 10 08:59:31 2016"
 
module clk_delay(
clk,
31,7 → 31,8
iorq_Tw,
busack,
pin_control_oe,
hold_clk_busrq
hold_clk_busrq,
nhold_clk_wait
);
 
 
50,6 → 51,7
output wire busack;
output wire pin_control_oe;
output wire hold_clk_busrq;
output wire nhold_clk_wait;
 
reg hold_clk_busrq_ALTERA_SYNTHESIZED;
wire SYNTHESIZED_WIRE_6;
60,9 → 62,9
wire SYNTHESIZED_WIRE_3;
wire SYNTHESIZED_WIRE_4;
wire SYNTHESIZED_WIRE_5;
reg DFFE_inst;
reg SYNTHESIZED_WIRE_9;
 
assign hold_clk_wait = DFFE_inst;
assign hold_clk_wait = SYNTHESIZED_WIRE_9;
assign iorq_Tw = DFF_inst5;
 
 
72,12 → 74,12
begin
if (!nreset)
begin
DFFE_inst <= 0;
SYNTHESIZED_WIRE_9 <= 0;
end
else
if (SYNTHESIZED_WIRE_1)
begin
DFFE_inst <= mwait;
SYNTHESIZED_WIRE_9 <= mwait;
end
end
 
146,8 → 148,10
 
assign SYNTHESIZED_WIRE_4 = in_intr & M1 & T1;
 
assign SYNTHESIZED_WIRE_1 = latch_wait | DFFE_inst;
assign SYNTHESIZED_WIRE_1 = latch_wait | SYNTHESIZED_WIRE_9;
 
assign nhold_clk_wait = ~SYNTHESIZED_WIRE_9;
 
assign SYNTHESIZED_WIRE_6 = ~clk;
 
assign hold_clk_busrq = hold_clk_busrq_ALTERA_SYNTHESIZED;
/control/decode_state.bdf
245,9 → 245,9
)
(pin
(input)
(rect 40 624 216 640)
(rect 40 608 216 624)
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
(text "hold_clk_wait" (rect 9 0 73 12)(font "Arial" ))
(text "nhold_clk_wait" (rect 9 0 79 12)(font "Arial" ))
(pt 176 8)
(drawing
(line (pt 92 12)(pt 117 12))
889,7 → 889,7
)
)
(symbol
(rect 312 584 376 632)
(rect 256 584 320 632)
(text "AND2" (rect 1 0 25 10)(font "Arial" (font_size 6)))
(text "inst6" (rect 3 37 26 49)(font "Arial" ))
(port
920,31 → 920,6
(arc (pt 31 37)(pt 30 12)(rect 18 12 43 37))
)
)
(symbol
(rect 224 616 272 648)
(text "NOT" (rect 1 0 21 10)(font "Arial" (font_size 6)))
(text "inst8" (rect 3 21 26 33)(font "Arial" ))
(port
(pt 0 16)
(input)
(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(line (pt 0 16)(pt 13 16))
)
(port
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16))
)
(drawing
(line (pt 13 25)(pt 13 7))
(line (pt 13 7)(pt 31 16))
(line (pt 13 25)(pt 31 16))
(circle (rect 31 12 39 20))
)
)
(connector
(pt 376 104)
(pt 440 104)
954,16 → 929,6
(pt 312 112)
)
(connector
(text "clk" (rect 408 104 422 116)(font "Arial" ))
(pt 440 120)
(pt 400 120)
)
(connector
(text "clk" (rect 410 224 424 236)(font "Arial" ))
(pt 440 240)
(pt 400 240)
)
(connector
(pt 536 208)
(pt 552 208)
)
972,16 → 937,6
(pt 552 224)
)
(connector
(text "nreset" (rect 408 160 438 172)(font "Arial" ))
(pt 472 176)
(pt 400 176)
)
(connector
(text "nreset" (rect 406 280 436 292)(font "Arial" ))
(pt 472 296)
(pt 400 296)
)
(connector
(pt 616 216)
(pt 640 216)
)
1030,14 → 985,6
(pt 640 104)
)
(connector
(pt 472 160)
(pt 472 176)
)
(connector
(pt 472 280)
(pt 472 296)
)
(connector
(pt 216 392)
(pt 440 392)
)
1050,16 → 997,6
(pt 320 424)
)
(connector
(text "nreset" (rect 384 456 414 468)(font "Arial" ))
(pt 472 472)
(pt 376 472)
)
(connector
(text "clk" (rect 387 392 401 404)(font "Arial" ))
(pt 440 408)
(pt 376 408)
)
(connector
(pt 216 416)
(pt 256 416)
)
1068,19 → 1005,10
(pt 256 432)
)
(connector
(pt 472 448)
(pt 472 472)
)
(connector
(pt 440 720)
(pt 408 720)
)
(connector
(text "clk" (rect 387 576 401 588)(font "Arial" ))
(pt 440 592)
(pt 376 592)
)
(connector
(text "clk" (rect 384 688 398 700)(font "Arial" ))
(pt 440 704)
(pt 376 704)
1111,11 → 1039,6
(pt 424 648)
)
(connector
(text "nreset" (rect 432 744 462 756)(font "Arial" ))
(pt 424 760)
(pt 472 760)
)
(connector
(pt 504 688)
(pt 536 688)
)
1136,10 → 1059,6
(pt 472 648)
)
(connector
(pt 472 744)
(pt 472 760)
)
(connector
(pt 608 856)
(pt 640 856)
)
1180,15 → 1099,62
(pt 440 688)
)
(connector
(pt 288 616)
(pt 312 616)
)
(connector
(pt 408 608)
(pt 408 720)
)
(connector
(pt 376 608)
(text "nreset" (rect 384 744 414 756)(font "Arial" ))
(pt 472 760)
(pt 376 760)
)
(connector
(pt 472 744)
(pt 472 760)
)
(connector
(text "clk" (rect 392 104 406 116)(font "Arial" ))
(pt 440 120)
(pt 384 120)
)
(connector
(text "nreset" (rect 392 160 422 172)(font "Arial" ))
(pt 472 176)
(pt 384 176)
)
(connector
(pt 472 160)
(pt 472 176)
)
(connector
(text "clk" (rect 394 224 408 236)(font "Arial" ))
(pt 440 240)
(pt 384 240)
)
(connector
(text "nreset" (rect 390 280 420 292)(font "Arial" ))
(pt 472 296)
(pt 384 296)
)
(connector
(pt 472 280)
(pt 472 296)
)
(connector
(text "clk" (rect 395 392 409 404)(font "Arial" ))
(pt 440 408)
(pt 384 408)
)
(connector
(text "nreset" (rect 392 456 422 468)(font "Arial" ))
(pt 472 472)
(pt 384 472)
)
(connector
(pt 472 448)
(pt 472 472)
)
(connector
(pt 320 608)
(pt 408 608)
)
(connector
1197,20 → 1163,17
)
(connector
(pt 216 600)
(pt 312 600)
(pt 256 600)
)
(connector
(pt 224 632)
(pt 216 632)
(pt 216 616)
(pt 256 616)
)
(connector
(pt 288 616)
(pt 288 632)
(text "clk" (rect 387 576 401 588)(font "Arial" ))
(pt 440 592)
(pt 376 592)
)
(connector
(pt 288 632)
(pt 272 632)
)
(junction (pt 312 256))
(junction (pt 256 96))
(junction (pt 536 104))
1229,7 → 1192,7
(section (rect 104 0 256 17)(text "MODULE" (rect 2 1 48 13)(font "Arial" ))(text "decode_state" (rect 43 2 135 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 0 18 256 34)(text "DESIGNER" (rect 2 0 59 12)(font "Arial" ))(text "Goran Devic" (rect 56 2 135 17)(font "Arial" (font_size 9)))(border))
(section (rect 0 35 256 51)(text "DATE" (rect 2 0 30 12)(font "Arial" ))(text "August 9, 2014, 2016" (rect 56 3 178 17)(font "Arial" (font_size 8)))(border))
(section (rect 192 35 256 51)(text "REV" (rect 2 1 25 13)(font "Arial" ))(text "1.4" (rect 43 3 60 17)(font "Arial" (font_size 8)))(border))
(section (rect 192 35 256 51)(text "REV" (rect 2 1 25 13)(font "Arial" ))(text "1.5" (rect 43 3 60 17)(font "Arial" (font_size 8)))(border))
(drawing
)
)
/control/decode_state.bsf
82,8 → 82,8
(port
(pt 0 160)
(input)
(text "hold_clk_wait" (rect 0 0 77 14)(font "Arial" (font_size 8)))
(text "hold_clk_wait" (rect 21 155 98 169)(font "Arial" (font_size 8)))
(text "nhold_clk_wait" (rect 0 0 84 14)(font "Arial" (font_size 8)))
(text "nhold_clk_wait" (rect 21 155 105 169)(font "Arial" (font_size 8)))
(line (pt 0 160)(pt 16 160))
)
(port
/control/decode_state.v
14,7 → 14,7
 
// PROGRAM "Quartus II 64-Bit"
// VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition"
// CREATED "Wed Dec 07 00:18:12 2016"
// CREATED "Sat Dec 10 08:55:35 2016"
 
module decode_state(
ctl_state_iy_set,
31,7 → 31,7
in_nmi,
nreset,
ctl_state_tbl_we,
hold_clk_wait,
nhold_clk_wait,
in_halt,
table_cb,
table_ed,
57,7 → 57,7
input wire in_nmi;
input wire nreset;
input wire ctl_state_tbl_we;
input wire hold_clk_wait;
input wire nhold_clk_wait;
output reg in_halt;
output wire table_cb;
output wire table_ed;
73,9 → 73,8
reg DFFE_instED;
reg DFFE_instCB;
wire SYNTHESIZED_WIRE_0;
wire SYNTHESIZED_WIRE_1;
wire SYNTHESIZED_WIRE_5;
wire SYNTHESIZED_WIRE_4;
wire SYNTHESIZED_WIRE_3;
 
assign in_alu = ctl_state_alu;
assign table_cb = DFFE_instCB;
106,13 → 105,11
 
assign SYNTHESIZED_WIRE_0 = ~(ctl_state_iy_set | ctl_state_ixiy_clr);
 
assign SYNTHESIZED_WIRE_5 = ctl_state_tbl_we & SYNTHESIZED_WIRE_1;
assign SYNTHESIZED_WIRE_4 = ctl_state_tbl_we & nhold_clk_wait;
 
assign SYNTHESIZED_WIRE_4 = in_nmi | in_intr;
assign SYNTHESIZED_WIRE_3 = in_nmi | in_intr;
 
assign SYNTHESIZED_WIRE_1 = ~hold_clk_wait;
 
 
always@(posedge clk or negedge nreset)
begin
if (!nreset)
120,7 → 117,7
DFFE_instCB <= 0;
end
else
if (SYNTHESIZED_WIRE_5)
if (SYNTHESIZED_WIRE_4)
begin
DFFE_instCB <= ctl_state_tbl_cb_set;
end
134,7 → 131,7
DFFE_instED <= 0;
end
else
if (SYNTHESIZED_WIRE_5)
if (SYNTHESIZED_WIRE_4)
begin
DFFE_instED <= ctl_state_tbl_ed_set;
end
149,7 → 146,7
end
else
begin
in_halt <= ~in_halt & ctl_state_halt_set | in_halt & ~SYNTHESIZED_WIRE_4;
in_halt <= ~in_halt & ctl_state_halt_set | in_halt & ~SYNTHESIZED_WIRE_3;
end
end
 
/control/ir.bdf
21,7 → 21,7
(header "graphic" (version "1.4"))
(pin
(input)
(rect 40 88 216 104)
(rect 40 96 216 112)
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
(text "ctl_ir_we" (rect 9 0 51 12)(font "Arial" ))
(pt 176 8)
85,9 → 85,9
)
(pin
(input)
(rect 40 120 216 136)
(rect 40 112 216 128)
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
(text "hold_clk_wait" (rect 9 0 73 12)(font "Arial" ))
(text "nhold_clk_wait" (rect 9 0 79 12)(font "Arial" ))
(pt 176 8)
(drawing
(line (pt 92 12)(pt 117 12))
158,7 → 158,7
(pt 64 24)
(output)
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 49 32)(font "Courier New" (bold)))
(text "Q" (rect 44 20 48 32)(font "Courier New" (bold)))
(line (pt 53 24)(pt 64 24))
)
(drawing
173,7 → 173,7
)
)
(symbol
(rect 296 80 360 128)
(rect 296 88 360 136)
(text "AND2" (rect 1 0 25 10)(font "Arial" (font_size 6)))
(text "inst5" (rect 3 37 26 49)(font "Arial" ))
(port
194,7 → 194,7
(pt 64 24)
(output)
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 48 15 62 27)(font "Courier New" (bold))(invisible))
(line (pt 42 24)(pt 64 24))
)
(drawing
204,31 → 204,6
(arc (pt 31 37)(pt 30 12)(rect 18 12 43 37))
)
)
(symbol
(rect 232 112 280 144)
(text "NOT" (rect 1 0 21 10)(font "Arial" (font_size 6)))
(text "inst3" (rect 3 21 26 33)(font "Arial" ))
(port
(pt 0 16)
(input)
(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(line (pt 0 16)(pt 13 16))
)
(port
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16))
)
(drawing
(line (pt 13 25)(pt 13 7))
(line (pt 13 7)(pt 31 16))
(line (pt 13 25)(pt 31 16))
(circle (rect 31 12 39 20))
)
)
(connector
(pt 216 56)
(pt 392 56)
244,10 → 219,6
(bus)
)
(connector
(pt 392 88)
(pt 376 88)
)
(connector
(pt 424 160)
(pt 216 160)
)
256,42 → 227,34
(pt 424 160)
)
(connector
(pt 216 128)
(pt 232 128)
(pt 392 88)
(pt 376 88)
)
(connector
(pt 376 88)
(pt 376 104)
(pt 376 112)
)
(connector
(pt 376 104)
(pt 360 104)
(pt 376 112)
(pt 360 112)
)
(connector
(pt 216 96)
(pt 296 96)
(pt 216 104)
(pt 296 104)
)
(connector
(pt 280 128)
(pt 288 128)
(pt 216 120)
(pt 296 120)
)
(connector
(pt 296 112)
(pt 288 112)
)
(connector
(pt 288 112)
(pt 288 128)
)
(text "8 latches implement the opcode Instruction Register" (rect 328 216 619 230)(font "Arial" (font_size 8)))
(title_block
(rect 40 216 297 268)
(name "title-custom-small")
(section (rect 0 0 256 17)(text "PROJECT" (rect 2 0 52 12)(font "Arial" ))(text "A-Z80" (rect 56 2 94 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 104 0 256 17)(text "MODULE" (rect 2 1 48 13)(font "Arial" ))(text "ir" (rect 43 2 52 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 0 18 256 34)(text "DESIGNER" (rect 2 0 59 12)(font "Arial" ))(text "Goran Devic" (rect 56 2 135 17)(font "Arial" (font_size 9)))(border))
(section (rect 0 35 256 51)(text "DATE" (rect 2 0 30 12)(font "Arial" ))(text "May 3, 2014, 2016" (rect 56 3 161 17)(font "Arial" (font_size 8)))(border))
(section (rect 0 18 256 34)(text "DESIGNER" (rect 2 0 59 12)(font "Arial" ))(text "Goran Devic" (rect 56 2 135 17)(font "Arial" (font_size 9)))(border))
(section (rect 104 0 256 17)(text "MODULE" (rect 2 1 48 13)(font "Arial" ))(text "ir" (rect 43 2 52 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 0 0 256 17)(text "PROJECT" (rect 2 0 52 12)(font "Arial" ))(text "A-Z80" (rect 56 2 94 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 192 35 256 51)(text "REV" (rect 2 1 25 13)(font "Arial" ))(text "1.4" (rect 43 3 60 17)(font "Arial" (font_size 8)))(border))
(section (rect 192 35 256 51)(text "REV" (rect 2 1 25 13)(font "Arial" ))(text "1.5" (rect 43 3 60 17)(font "Arial" (font_size 8)))(border))
(drawing
)
)
/control/ir.bsf
20,7 → 20,7
*/
(header "symbol" (version "1.2"))
(symbol
(rect 16 16 216 144)
(rect 16 16 224 144)
(text "ir" (rect 5 0 12 14)(font "Arial" (font_size 8)))
(text "inst" (rect 8 112 25 124)(font "Arial" ))
(port
47,8 → 47,8
(port
(pt 0 80)
(input)
(text "hold_clk_wait" (rect 0 0 77 14)(font "Arial" (font_size 8)))
(text "hold_clk_wait" (rect 21 75 98 89)(font "Arial" (font_size 8)))
(text "nhold_clk_wait" (rect 0 0 84 14)(font "Arial" (font_size 8)))
(text "nhold_clk_wait" (rect 21 75 105 89)(font "Arial" (font_size 8)))
(line (pt 0 80)(pt 16 80))
)
(port
59,13 → 59,13
(line (pt 0 96)(pt 16 96))
)
(port
(pt 200 32)
(pt 208 32)
(output)
(text "opcode[7..0]" (rect 0 0 70 14)(font "Arial" (font_size 8)))
(text "opcode[7..0]" (rect 109 27 179 41)(font "Arial" (font_size 8)))
(line (pt 200 32)(pt 184 32)(line_width 3))
(text "opcode[7..0]" (rect 117 27 187 41)(font "Arial" (font_size 8)))
(line (pt 208 32)(pt 192 32)(line_width 3))
)
(drawing
(rectangle (rect 16 16 184 112))
(rectangle (rect 16 16 192 112))
)
)
/control/ir.v
14,13 → 14,13
 
// PROGRAM "Quartus II 64-Bit"
// VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition"
// CREATED "Fri Feb 26 22:23:08 2016"
// CREATED "Sat Dec 10 08:56:46 2016"
 
module ir(
ctl_ir_we,
clk,
nreset,
hold_clk_wait,
nhold_clk_wait,
db,
opcode
);
29,21 → 29,18
input wire ctl_ir_we;
input wire clk;
input wire nreset;
input wire hold_clk_wait;
input wire nhold_clk_wait;
input wire [7:0] db;
output reg [7:0] opcode;
 
wire SYNTHESIZED_WIRE_0;
wire SYNTHESIZED_WIRE_1;
 
 
 
 
assign SYNTHESIZED_WIRE_0 = ~hold_clk_wait;
assign SYNTHESIZED_WIRE_0 = ctl_ir_we & nhold_clk_wait;
 
assign SYNTHESIZED_WIRE_1 = ctl_ir_we & SYNTHESIZED_WIRE_0;
 
 
always@(posedge clk or negedge nreset)
begin
if (!nreset)
51,7 → 48,7
opcode[7:0] <= 8'b00000000;
end
else
if (SYNTHESIZED_WIRE_1)
if (SYNTHESIZED_WIRE_0)
begin
opcode[7:0] <= db[7:0];
end
/control/memory_ifc.bdf
215,7 → 215,7
(input)
(rect 32 1496 208 1512)
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
(text "hold_clk_wait" (rect 9 0 73 12)(font "Arial" ))
(text "nhold_clk_wait" (rect 9 0 79 12)(font "Arial" ))
(pt 176 8)
(drawing
(line (pt 92 12)(pt 117 12))
2144,31 → 2144,6
)
)
(symbol
(rect 216 1488 264 1520)
(text "NOT" (rect 1 0 21 10)(font "Arial" (font_size 6)))
(text "inst4" (rect 3 21 26 33)(font "Arial" ))
(port
(pt 0 16)
(input)
(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(line (pt 0 16)(pt 13 16))
)
(port
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16))
)
(drawing
(line (pt 13 25)(pt 13 7))
(line (pt 13 7)(pt 31 16))
(line (pt 13 25)(pt 31 16))
(circle (rect 31 12 39 20))
)
)
(symbol
(rect 720 168 784 216)
(text "OR2" (rect 1 0 19 10)(font "Arial" (font_size 6)))
(text "inst41" (rect 3 37 32 49)(font "Arial" ))
2553,15 → 2528,7
(pt 296 1416)
)
(connector
(pt 208 1504)
(pt 216 1504)
)
(connector
(pt 264 1504)
(pt 392 1504)
)
(connector
(pt 392 1504)
(pt 392 1448)
)
(connector
3570,6 → 3537,10
(pt 376 1856)
(pt 688 1856)
)
(connector
(pt 208 1504)
(pt 392 1504)
)
(junction (pt 248 144))
(junction (pt 272 320))
(junction (pt 416 304))
3650,8 → 3621,8
(section (rect 0 0 256 17)(text "PROJECT" (rect 2 0 52 12)(font "Arial" ))(text "A-Z80" (rect 56 2 94 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 104 0 256 17)(text "MODULE" (rect 2 1 48 13)(font "Arial" ))(text "memory_ifc" (rect 43 2 123 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 0 18 256 34)(text "DESIGNER" (rect 2 0 59 12)(font "Arial" ))(text "Goran Devic" (rect 56 2 135 17)(font "Arial" (font_size 9)))(border))
(section (rect 0 35 256 51)(text "DATE" (rect 2 0 30 12)(font "Arial" ))(text "November 1, 2014" (rect 56 3 159 17)(font "Arial" (font_size 8)))(border))
(section (rect 192 35 256 51)(text "REV" (rect 2 1 25 13)(font "Arial" ))(text "1.1" (rect 43 3 60 17)(font "Arial" (font_size 8)))(border))
(section (rect 0 35 256 51)(text "DATE" (rect 2 0 30 12)(font "Arial" ))(text "November 1, 2014, 2016" (rect 56 3 195 17)(font "Arial" (font_size 8)))(border))
(section (rect 192 35 256 51)(text "REV" (rect 2 1 25 13)(font "Arial" ))(text "1.2" (rect 43 3 60 17)(font "Arial" (font_size 8)))(border))
(drawing
)
)
/control/memory_ifc.bsf
20,7 → 20,7
*/
(header "symbol" (version "1.2"))
(symbol
(rect 16 16 216 272)
(rect 16 16 224 272)
(text "memory_ifc" (rect 5 0 71 14)(font "Arial" (font_size 8)))
(text "inst" (rect 8 240 25 252)(font "Arial" ))
(port
110,67 → 110,67
(port
(pt 0 224)
(input)
(text "hold_clk_wait" (rect 0 0 77 14)(font "Arial" (font_size 8)))
(text "hold_clk_wait" (rect 21 219 98 233)(font "Arial" (font_size 8)))
(text "nhold_clk_wait" (rect 0 0 84 14)(font "Arial" (font_size 8)))
(text "nhold_clk_wait" (rect 21 219 105 233)(font "Arial" (font_size 8)))
(line (pt 0 224)(pt 16 224))
)
(port
(pt 200 32)
(pt 208 32)
(output)
(text "nRFSH_out" (rect 0 0 63 14)(font "Arial" (font_size 8)))
(text "nRFSH_out" (rect 116 27 179 41)(font "Arial" (font_size 8)))
(line (pt 200 32)(pt 184 32))
(text "nRFSH_out" (rect 124 27 187 41)(font "Arial" (font_size 8)))
(line (pt 208 32)(pt 192 32))
)
(port
(pt 200 48)
(pt 208 48)
(output)
(text "nM1_out" (rect 0 0 48 14)(font "Arial" (font_size 8)))
(text "nM1_out" (rect 131 43 179 57)(font "Arial" (font_size 8)))
(line (pt 200 48)(pt 184 48))
(text "nM1_out" (rect 139 43 187 57)(font "Arial" (font_size 8)))
(line (pt 208 48)(pt 192 48))
)
(port
(pt 200 64)
(pt 208 64)
(output)
(text "nMREQ_out" (rect 0 0 66 14)(font "Arial" (font_size 8)))
(text "nMREQ_out" (rect 113 59 179 73)(font "Arial" (font_size 8)))
(line (pt 200 64)(pt 184 64))
(text "nMREQ_out" (rect 121 59 187 73)(font "Arial" (font_size 8)))
(line (pt 208 64)(pt 192 64))
)
(port
(pt 200 80)
(pt 208 80)
(output)
(text "wait_m1" (rect 0 0 48 14)(font "Arial" (font_size 8)))
(text "wait_m1" (rect 131 75 179 89)(font "Arial" (font_size 8)))
(line (pt 200 80)(pt 184 80))
(text "wait_m1" (rect 139 75 187 89)(font "Arial" (font_size 8)))
(line (pt 208 80)(pt 192 80))
)
(port
(pt 200 96)
(pt 208 96)
(output)
(text "nRD_out" (rect 0 0 48 14)(font "Arial" (font_size 8)))
(text "nRD_out" (rect 131 91 179 105)(font "Arial" (font_size 8)))
(line (pt 200 96)(pt 184 96))
(text "nRD_out" (rect 139 91 187 105)(font "Arial" (font_size 8)))
(line (pt 208 96)(pt 192 96))
)
(port
(pt 200 112)
(pt 208 112)
(output)
(text "nWR_out" (rect 0 0 51 14)(font "Arial" (font_size 8)))
(text "nWR_out" (rect 128 107 179 121)(font "Arial" (font_size 8)))
(line (pt 200 112)(pt 184 112))
(text "nWR_out" (rect 136 107 187 121)(font "Arial" (font_size 8)))
(line (pt 208 112)(pt 192 112))
)
(port
(pt 200 128)
(pt 208 128)
(output)
(text "nIORQ_out" (rect 0 0 61 14)(font "Arial" (font_size 8)))
(text "nIORQ_out" (rect 118 123 179 137)(font "Arial" (font_size 8)))
(line (pt 200 128)(pt 184 128))
(text "nIORQ_out" (rect 126 123 187 137)(font "Arial" (font_size 8)))
(line (pt 208 128)(pt 192 128))
)
(port
(pt 200 144)
(pt 208 144)
(output)
(text "latch_wait" (rect 0 0 59 14)(font "Arial" (font_size 8)))
(text "latch_wait" (rect 120 139 179 153)(font "Arial" (font_size 8)))
(line (pt 200 144)(pt 184 144))
(text "latch_wait" (rect 128 139 187 153)(font "Arial" (font_size 8)))
(line (pt 208 144)(pt 192 144))
)
(drawing
(rectangle (rect 16 16 184 240))
(rectangle (rect 16 16 192 240))
)
)
/control/memory_ifc.v
14,7 → 14,7
 
// PROGRAM "Quartus II 64-Bit"
// VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition"
// CREATED "Sun Dec 04 01:04:33 2016"
// CREATED "Sat Dec 10 09:02:54 2016"
 
module memory_ifc(
clk,
29,7 → 29,7
ctl_iorw,
timings_en,
iorq_Tw,
hold_clk_wait,
nhold_clk_wait,
nM1_out,
nRFSH_out,
nMREQ_out,
53,7 → 53,7
input wire ctl_iorw;
input wire timings_en;
input wire iorq_Tw;
input wire hold_clk_wait;
input wire nhold_clk_wait;
output wire nM1_out;
output wire nRFSH_out;
output wire nMREQ_out;
82,17 → 82,16
wire SYNTHESIZED_WIRE_0;
reg DFFE_m1_ff3;
wire SYNTHESIZED_WIRE_1;
reg SYNTHESIZED_WIRE_15;
reg DFFE_iorq_ff4;
reg SYNTHESIZED_WIRE_16;
reg DFFE_iorq_ff4;
reg SYNTHESIZED_WIRE_17;
reg DFFE_mrd_ff3;
reg DFFE_intr_ff3;
wire SYNTHESIZED_WIRE_2;
reg SYNTHESIZED_WIRE_17;
wire SYNTHESIZED_WIRE_3;
reg SYNTHESIZED_WIRE_18;
wire SYNTHESIZED_WIRE_3;
reg SYNTHESIZED_WIRE_19;
wire SYNTHESIZED_WIRE_20;
wire SYNTHESIZED_WIRE_5;
wire SYNTHESIZED_WIRE_19;
reg DFFE_iorq_ff1;
reg DFFE_m1_ff1;
reg DFFE_mrd_ff1;
110,7 → 109,7
 
assign m1_mreq = ~(in_intr | SYNTHESIZED_WIRE_1);
 
assign iorq = SYNTHESIZED_WIRE_16 | DFFE_iorq_ff4 | SYNTHESIZED_WIRE_17;
assign iorq = SYNTHESIZED_WIRE_15 | DFFE_iorq_ff4 | SYNTHESIZED_WIRE_16;
 
assign ioWrite = iorq & fIOWrite;
 
128,18 → 127,16
 
assign nIORQ_out = ~(intr_iorq | iorq);
 
assign SYNTHESIZED_WIRE_5 = ~hold_clk_wait;
 
assign intr_iorq = DFFE_intr_ff3 | wait_iorq;
 
assign nM1_out = SYNTHESIZED_WIRE_2 | SYNTHESIZED_WIRE_18;
assign nM1_out = SYNTHESIZED_WIRE_2 | SYNTHESIZED_WIRE_17;
 
assign SYNTHESIZED_WIRE_0 = ~(SYNTHESIZED_WIRE_3 & SYNTHESIZED_WIRE_19);
assign SYNTHESIZED_WIRE_0 = ~(SYNTHESIZED_WIRE_3 & SYNTHESIZED_WIRE_18);
 
assign nRFSH_out = ~(nq2 & SYNTHESIZED_WIRE_18);
assign nRFSH_out = ~(nq2 & SYNTHESIZED_WIRE_17);
 
 
always@(posedge SYNTHESIZED_WIRE_20 or negedge nreset)
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
begin
if (!nreset)
begin
159,7 → 156,7
DFFE_intr_ff3 <= 0;
end
else
if (SYNTHESIZED_WIRE_5)
if (nhold_clk_wait)
begin
DFFE_intr_ff3 <= wait_iorq;
end
184,31 → 181,31
begin
if (!nreset)
begin
SYNTHESIZED_WIRE_17 <= 0;
SYNTHESIZED_WIRE_16 <= 0;
end
else
if (timings_en)
begin
SYNTHESIZED_WIRE_17 <= DFFE_iorq_ff1;
SYNTHESIZED_WIRE_16 <= DFFE_iorq_ff1;
end
end
 
 
always@(posedge SYNTHESIZED_WIRE_20 or negedge nreset)
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
begin
if (!nreset)
begin
SYNTHESIZED_WIRE_16 <= 0;
SYNTHESIZED_WIRE_15 <= 0;
end
else
if (timings_en)
begin
SYNTHESIZED_WIRE_16 <= SYNTHESIZED_WIRE_17;
SYNTHESIZED_WIRE_15 <= SYNTHESIZED_WIRE_16;
end
end
 
 
always@(posedge SYNTHESIZED_WIRE_20 or negedge nreset)
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
begin
if (!nreset)
begin
217,7 → 214,7
else
if (timings_en)
begin
DFFE_iorq_ff4 <= SYNTHESIZED_WIRE_16;
DFFE_iorq_ff4 <= SYNTHESIZED_WIRE_15;
end
end
 
226,17 → 223,17
begin
if (!nreset)
begin
SYNTHESIZED_WIRE_18 <= 0;
SYNTHESIZED_WIRE_17 <= 0;
end
else
if (timings_en)
begin
SYNTHESIZED_WIRE_18 <= nM1_int;
SYNTHESIZED_WIRE_17 <= nM1_int;
end
end
 
 
always@(posedge SYNTHESIZED_WIRE_20 or negedge nreset)
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
begin
if (!nreset)
begin
250,7 → 247,7
end
 
 
always@(posedge SYNTHESIZED_WIRE_20 or negedge nreset)
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
begin
if (!nreset)
begin
292,7 → 289,7
end
 
 
always@(posedge SYNTHESIZED_WIRE_20 or negedge nreset)
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
begin
if (!nreset)
begin
306,7 → 303,7
end
 
 
always@(posedge SYNTHESIZED_WIRE_20 or negedge nreset)
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
begin
if (!nreset)
begin
320,21 → 317,21
end
 
 
always@(posedge SYNTHESIZED_WIRE_20 or negedge nreset)
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
begin
if (!nreset)
begin
SYNTHESIZED_WIRE_19 <= 0;
SYNTHESIZED_WIRE_18 <= 0;
end
else
if (timings_en)
begin
SYNTHESIZED_WIRE_19 <= SYNTHESIZED_WIRE_18;
SYNTHESIZED_WIRE_18 <= SYNTHESIZED_WIRE_17;
end
end
 
 
always@(posedge SYNTHESIZED_WIRE_20 or negedge nreset)
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
begin
if (!nreset)
begin
343,7 → 340,7
else
if (timings_en)
begin
DFFE_mreq_ff2 <= SYNTHESIZED_WIRE_19;
DFFE_mreq_ff2 <= SYNTHESIZED_WIRE_18;
end
end
 
362,7 → 359,7
end
 
 
always@(posedge SYNTHESIZED_WIRE_20 or negedge nreset)
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
begin
if (!nreset)
begin
376,7 → 373,7
end
 
 
always@(posedge SYNTHESIZED_WIRE_20 or negedge nreset)
always@(posedge SYNTHESIZED_WIRE_19 or negedge nreset)
begin
if (!nreset)
begin
389,7 → 386,7
end
end
 
assign SYNTHESIZED_WIRE_20 = ~clk;
assign SYNTHESIZED_WIRE_19 = ~clk;
 
assign nq2 = ~q2;
 
407,7 → 404,7
else
if (timings_en)
begin
q1 <= SYNTHESIZED_WIRE_18;
q1 <= SYNTHESIZED_WIRE_17;
end
end
 
/control/resets.bdf
101,9 → 101,9
)
(pin
(input)
(rect 32 640 208 656)
(rect 32 632 208 648)
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
(text "hold_clk_wait" (rect 9 0 73 12)(font "Arial" ))
(text "nhold_clk_wait" (rect 9 0 79 12)(font "Arial" ))
(pt 176 8)
(drawing
(line (pt 92 12)(pt 117 12))
641,31 → 641,6
)
)
(symbol
(rect 216 632 264 664)
(text "NOT" (rect 1 0 21 10)(font "Arial" (font_size 6)))
(text "inst4" (rect 3 21 26 33)(font "Arial" ))
(port
(pt 0 16)
(input)
(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(line (pt 0 16)(pt 13 16))
)
(port
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16))
)
(drawing
(line (pt 13 25)(pt 13 7))
(line (pt 13 7)(pt 31 16))
(line (pt 13 25)(pt 31 16))
(circle (rect 31 12 39 20))
)
)
(symbol
(rect 296 520 360 600)
(text "DFFE" (rect 1 0 25 10)(font "Arial" (font_size 6)))
(text "intr_ff4" (rect 3 68 39 80)(font "Arial" ))
978,22 → 953,10
(pt 776 496)
)
(connector
(pt 712 296)
(pt 712 336)
)
(connector
(pt 712 336)
(pt 712 424)
)
(connector
(pt 232 320)
(pt 232 352)
)
(connector
(pt 208 648)
(pt 216 648)
)
(connector
(pt 296 560)
(pt 264 560)
)
1007,14 → 970,6
(pt 264 616)
)
(connector
(pt 712 424)
(pt 264 424)
)
(connector
(pt 264 424)
(pt 264 544)
)
(connector
(pt 296 544)
(pt 264 544)
)
1075,8 → 1030,8
(pt 520 544)
)
(connector
(pt 504 648)
(pt 504 576)
(pt 504 640)
)
(connector
(pt 520 576)
1088,28 → 1043,44
)
(connector
(pt 392 576)
(pt 392 648)
(pt 392 640)
)
(connector
(pt 392 648)
(pt 504 648)
)
(connector
(pt 296 576)
(pt 280 576)
)
(connector
(pt 280 576)
(pt 280 648)
(pt 280 640)
)
(connector
(pt 264 648)
(pt 280 648)
(pt 392 640)
(pt 504 640)
)
(connector
(pt 280 648)
(pt 392 648)
(pt 208 640)
(pt 280 640)
)
(connector
(pt 280 640)
(pt 392 640)
)
(connector
(pt 712 432)
(pt 264 432)
)
(connector
(pt 264 544)
(pt 264 432)
)
(connector
(pt 712 296)
(pt 712 336)
)
(connector
(pt 712 336)
(pt 712 432)
)
(junction (pt 232 144))
(junction (pt 368 96))
(junction (pt 336 272))
1123,8 → 1094,8
(junction (pt 376 616))
(junction (pt 376 544))
(junction (pt 488 544))
(junction (pt 392 648))
(junction (pt 280 648))
(junction (pt 392 640))
(junction (pt 280 640))
(text "Needed only for FPGAs" (rect 40 72 174 86)(font "Arial" (font_size 8)))
(text "Special reset, USPTO 4,486,827 by Shima et al." (rect 40 24 371 40)(font "Arial" (font_size 10))(border))
(text "Required 3 clock reset cycles to clear PC and IR" (rect 304 464 576 478)(font "Arial" (font_size 8)))
1133,11 → 1104,11
(title_block
(rect 696 584 953 636)
(name "title-custom-small")
(section (rect 0 0 256 17)(text "PROJECT" (rect 2 0 52 12)(font "Arial" ))(text "A-Z80" (rect 56 2 94 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 104 0 256 17)(text "MODULE" (rect 2 1 48 13)(font "Arial" ))(text "resets" (rect 43 2 86 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 0 18 256 34)(text "DESIGNER" (rect 2 0 59 12)(font "Arial" ))(text "Goran Devic" (rect 56 2 135 17)(font "Arial" (font_size 9)))(border))
(section (rect 0 35 256 51)(text "DATE" (rect 2 0 30 12)(font "Arial" ))(text "September 6, 2014, 2016" (rect 56 3 198 17)(font "Arial" (font_size 8)))(border))
(section (rect 0 18 256 34)(text "DESIGNER" (rect 2 0 59 12)(font "Arial" ))(text "Goran Devic" (rect 56 2 135 17)(font "Arial" (font_size 9)))(border))
(section (rect 104 0 256 17)(text "MODULE" (rect 2 1 48 13)(font "Arial" ))(text "resets" (rect 43 2 86 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 0 0 256 17)(text "PROJECT" (rect 2 0 52 12)(font "Arial" ))(text "A-Z80" (rect 56 2 94 17)(font "Arial" (font_size 9)(bold)))(border))
(section (rect 192 35 256 51)(text "REV" (rect 2 1 25 13)(font "Arial" ))(text "1.4" (rect 43 3 60 17)(font "Arial" (font_size 8)))(border))
(section (rect 192 35 256 51)(text "REV" (rect 2 1 25 13)(font "Arial" ))(text "1.5" (rect 43 3 60 17)(font "Arial" (font_size 8)))(border))
(drawing
)
)
/control/resets.bsf
20,7 → 20,7
*/
(header "symbol" (version "1.2"))
(symbol
(rect 16 16 184 176)
(rect 16 16 192 176)
(text "resets" (rect 5 0 41 14)(font "Arial" (font_size 8)))
(text "inst" (rect 8 144 25 156)(font "Arial" ))
(port
61,25 → 61,25
(port
(pt 0 112)
(input)
(text "hold_clk_wait" (rect 0 0 77 14)(font "Arial" (font_size 8)))
(text "hold_clk_wait" (rect 21 107 98 121)(font "Arial" (font_size 8)))
(text "nhold_clk_wait" (rect 0 0 84 14)(font "Arial" (font_size 8)))
(text "nhold_clk_wait" (rect 21 107 105 121)(font "Arial" (font_size 8)))
(line (pt 0 112)(pt 16 112))
)
(port
(pt 168 32)
(pt 176 32)
(output)
(text "nreset" (rect 0 0 36 14)(font "Arial" (font_size 8)))
(text "nreset" (rect 111 27 147 41)(font "Arial" (font_size 8)))
(line (pt 168 32)(pt 152 32))
(text "nreset" (rect 119 27 155 41)(font "Arial" (font_size 8)))
(line (pt 176 32)(pt 160 32))
)
(port
(pt 168 48)
(pt 176 48)
(output)
(text "clrpc" (rect 0 0 28 14)(font "Arial" (font_size 8)))
(text "clrpc" (rect 119 43 147 57)(font "Arial" (font_size 8)))
(line (pt 168 48)(pt 152 48))
(text "clrpc" (rect 127 43 155 57)(font "Arial" (font_size 8)))
(line (pt 176 48)(pt 160 48))
)
(drawing
(rectangle (rect 16 16 152 144))
(rectangle (rect 16 16 160 144))
)
)
/control/resets.v
14,7 → 14,7
 
// PROGRAM "Quartus II 64-Bit"
// VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition"
// CREATED "Thu Dec 08 21:08:44 2016"
// CREATED "Sat Dec 10 08:57:54 2016"
 
module resets(
reset_in,
22,7 → 22,7
M1,
T2,
fpga_reset,
hold_clk_wait,
nhold_clk_wait,
clrpc,
nreset
);
33,7 → 33,7
input wire M1;
input wire T2;
input wire fpga_reset;
input wire hold_clk_wait;
input wire nhold_clk_wait;
output wire clrpc;
output wire nreset;
 
42,25 → 42,24
reg x1;
wire x2;
wire x3;
wire SYNTHESIZED_WIRE_11;
wire SYNTHESIZED_WIRE_8;
wire SYNTHESIZED_WIRE_1;
reg SYNTHESIZED_WIRE_12;
reg SYNTHESIZED_WIRE_9;
reg DFFE_intr_ff3;
reg SYNTHESIZED_WIRE_13;
wire SYNTHESIZED_WIRE_14;
reg SYNTHESIZED_WIRE_10;
wire SYNTHESIZED_WIRE_11;
wire SYNTHESIZED_WIRE_3;
reg SYNTHESIZED_WIRE_15;
wire SYNTHESIZED_WIRE_16;
wire SYNTHESIZED_WIRE_9;
reg SYNTHESIZED_WIRE_12;
wire SYNTHESIZED_WIRE_6;
 
assign nreset = SYNTHESIZED_WIRE_9;
assign nreset = SYNTHESIZED_WIRE_6;
 
 
 
 
always@(posedge nclk or negedge SYNTHESIZED_WIRE_11)
always@(posedge nclk or negedge SYNTHESIZED_WIRE_8)
begin
if (!SYNTHESIZED_WIRE_11)
if (!SYNTHESIZED_WIRE_8)
begin
x1 <= 1;
end
70,32 → 69,30
end
end
 
assign clrpc = clrpc_int | SYNTHESIZED_WIRE_12 | DFFE_intr_ff3 | SYNTHESIZED_WIRE_13;
assign clrpc = clrpc_int | SYNTHESIZED_WIRE_9 | DFFE_intr_ff3 | SYNTHESIZED_WIRE_10;
 
assign SYNTHESIZED_WIRE_1 = ~reset_in;
 
assign x2 = x1 & SYNTHESIZED_WIRE_14;
assign x2 = x1 & SYNTHESIZED_WIRE_11;
 
assign SYNTHESIZED_WIRE_14 = M1 & T2;
assign SYNTHESIZED_WIRE_11 = M1 & T2;
 
assign x3 = x1 & SYNTHESIZED_WIRE_3;
 
assign SYNTHESIZED_WIRE_9 = ~SYNTHESIZED_WIRE_15;
assign SYNTHESIZED_WIRE_6 = ~SYNTHESIZED_WIRE_12;
 
assign SYNTHESIZED_WIRE_16 = ~hold_clk_wait;
assign SYNTHESIZED_WIRE_3 = ~SYNTHESIZED_WIRE_11;
 
assign SYNTHESIZED_WIRE_3 = ~SYNTHESIZED_WIRE_14;
 
assign nclk = ~clk;
 
assign SYNTHESIZED_WIRE_11 = ~fpga_reset;
assign SYNTHESIZED_WIRE_8 = ~fpga_reset;
 
 
always@(posedge nclk)
begin
if (SYNTHESIZED_WIRE_16)
if (nhold_clk_wait)
begin
DFFE_intr_ff3 <= SYNTHESIZED_WIRE_12;
DFFE_intr_ff3 <= SYNTHESIZED_WIRE_9;
end
end
 
102,9 → 99,9
 
always@(posedge nclk)
begin
if (SYNTHESIZED_WIRE_16)
if (nhold_clk_wait)
begin
SYNTHESIZED_WIRE_13 <= SYNTHESIZED_WIRE_15;
SYNTHESIZED_WIRE_10 <= SYNTHESIZED_WIRE_12;
end
end
 
111,35 → 108,35
 
always@(posedge nclk)
begin
if (SYNTHESIZED_WIRE_16)
if (nhold_clk_wait)
begin
SYNTHESIZED_WIRE_12 <= SYNTHESIZED_WIRE_13;
SYNTHESIZED_WIRE_9 <= SYNTHESIZED_WIRE_10;
end
end
 
 
always@(posedge clk or negedge SYNTHESIZED_WIRE_11)
always@(posedge clk or negedge SYNTHESIZED_WIRE_8)
begin
if (!SYNTHESIZED_WIRE_11)
if (!SYNTHESIZED_WIRE_8)
begin
SYNTHESIZED_WIRE_15 <= 1;
SYNTHESIZED_WIRE_12 <= 1;
end
else
begin
SYNTHESIZED_WIRE_15 <= x3;
SYNTHESIZED_WIRE_12 <= x3;
end
end
 
 
always@(posedge nclk or negedge SYNTHESIZED_WIRE_9)
always@(posedge nclk or negedge SYNTHESIZED_WIRE_6)
begin
if (!SYNTHESIZED_WIRE_9)
if (!SYNTHESIZED_WIRE_6)
begin
clrpc_int <= 0;
end
else
begin
clrpc_int <= ~clrpc_int & x2 | clrpc_int & ~SYNTHESIZED_WIRE_14;
clrpc_int <= ~clrpc_int & x2 | clrpc_int & ~SYNTHESIZED_WIRE_11;
end
end
 
/control/simulation/modelsim/wave_reset.do
6,7 → 6,7
add wave -noupdate /test_reset/M1
add wave -noupdate /test_reset/T2
add wave -noupdate -color Gold /test_reset/clrpc
add wave -noupdate /test_reset/reset_block/hold_clk_wait
add wave -noupdate /test_reset/reset_block/nhold_clk_wait
add wave -noupdate /test_reset/nreset
add wave -noupdate -color {Cadet Blue} /test_reset/reset_block/x1
add wave -noupdate -color {Cadet Blue} /test_reset/reset_block/x2
/control/test_reset.sv
23,10 → 23,10
logic T2 = 0;
 
wire clrpc; // Load 0 to PC
wire hold_clk_wait; // Hold clrpc
wire nhold_clk_wait; // Hold clrpc
wire nreset; // Internal inverted reset signal
 
assign hold_clk_wait = 0; // Will not test this case
assign nhold_clk_wait = 1; // Will not test this case
 
// ----------------- TEST -------------------
initial begin
/registers/reg_control.bdf
343,7 → 343,7
(input)
(rect 32 848 208 864)
(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
(text "hold_clk_wait" (rect 9 0 73 12)(font "Arial" ))
(text "nhold_clk_wait" (rect 9 0 79 12)(font "Arial" ))
(pt 176 8)
(drawing
(line (pt 92 12)(pt 117 12))
2498,31 → 2498,6
(circle (rect 28 4 36 12))
)
)
(symbol
(rect 328 840 376 872)
(text "NOT" (rect 1 0 21 10)(font "Arial" (font_size 6)))
(text "inst7" (rect 3 21 26 33)(font "Arial" ))
(port
(pt 0 16)
(input)
(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(text "IN" (rect 2 7 13 19)(font "Courier New" (bold))(invisible))
(line (pt 0 16)(pt 13 16))
)
(port
(pt 48 16)
(output)
(text "OUT" (rect 32 7 49 19)(font "Courier New" (bold))(invisible))
(text "OUT" (rect 32 7 46 19)(font "Courier New" (bold))(invisible))
(line (pt 39 16)(pt 48 16))
)
(drawing
(line (pt 13 25)(pt 13 7))
(line (pt 13 7)(pt 31 16))
(line (pt 13 25)(pt 31 16))
(circle (rect 31 12 39 20))
)
)
(connector
(pt 616 680)
(pt 600 680)
3575,10 → 3550,6
(pt 312 496)
)
(connector
(pt 208 856)
(pt 328 856)
)
(connector
(pt 312 496)
(pt 312 800)
)
3591,24 → 3562,23
(pt 528 856)
)
(connector
(pt 208 856)
(pt 528 856)
(pt 680 856)
)
(connector
(text "n_hold_clk_wait" (rect 400 840 476 852)(font "Arial" ))
(pt 376 856)
(pt 528 856)
(pt 680 856)
)
(connector
(text "n_hold_clk_wait" (rect 607 544 683 556)(font "Arial" ))
(text "nhold_clk_wait" (rect 608 432 678 444)(font "Arial" ))
(pt 680 432)
(pt 656 432)
)
(connector
(text "nhold_clk_wait" (rect 607 544 677 556)(font "Arial" ))
(pt 680 544)
(pt 656 544)
)
(connector
(text "n_hold_clk_wait" (rect 608 432 684 444)(font "Arial" ))
(pt 680 432)
(pt 656 432)
)
(junction (pt 600 624))
(junction (pt 264 312))
(junction (pt 264 632))
3690,7 → 3660,7
(section (rect 130 0 320 20)(text "MODULE" (rect 2 1 48 13)(font "Arial" ))(text "reg_control" (rect 43 2 146 21)(font "Arial" (font_size 12)(bold)))(border))
(section (rect 0 21 320 40)(text "DESIGNER" (rect 2 0 59 12)(font "Arial" ))(text "Goran Devic" (rect 56 2 151 19)(font "Arial" (font_size 11)))(border))
(section (rect 0 41 240 60)(text "DATE" (rect 2 0 30 12)(font "Arial" ))(text "May 17, 2014, 2016" (rect 56 3 191 19)(font "Arial" (font_size 10)))(border))
(section (rect 241 41 320 60)(text "REV" (rect 2 1 25 13)(font "Arial" ))(text "1.4" (rect 43 3 64 19)(font "Arial" (font_size 10)))(border))
(section (rect 241 41 320 60)(text "REV" (rect 2 1 25 13)(font "Arial" ))(text "1.5" (rect 43 3 64 19)(font "Arial" (font_size 10)))(border))
(drawing
)
)
/registers/reg_control.bsf
96,8 → 96,8
(port
(pt 0 192)
(input)
(text "hold_clk_wait" (rect 0 0 77 14)(font "Arial" (font_size 8)))
(text "hold_clk_wait" (rect 21 187 98 201)(font "Arial" (font_size 8)))
(text "nhold_clk_wait" (rect 0 0 84 14)(font "Arial" (font_size 8)))
(text "nhold_clk_wait" (rect 21 187 105 201)(font "Arial" (font_size 8)))
(line (pt 0 192)(pt 16 192))
)
(port
/registers/reg_control.v
14,7 → 14,7
 
// PROGRAM "Quartus II 64-Bit"
// VERSION "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition"
// CREATED "Thu Dec 08 22:19:25 2016"
// CREATED "Sat Dec 10 09:05:10 2016"
 
module reg_control(
ctl_reg_exx,
34,7 → 34,7
ctl_reg_sys_we,
clk,
ctl_sw_4d,
hold_clk_wait,
nhold_clk_wait,
ctl_reg_gp_hilo,
ctl_reg_gp_sel,
ctl_reg_sys_hilo,
81,7 → 81,7
input wire ctl_reg_sys_we;
input wire clk;
input wire ctl_sw_4d;
input wire hold_clk_wait;
input wire nhold_clk_wait;
input wire [1:0] ctl_reg_gp_hilo;
input wire [1:0] ctl_reg_gp_sel;
input wire [1:0] ctl_reg_sys_hilo;
113,7 → 113,6
reg bank_exx;
reg bank_hl_de1;
reg bank_hl_de2;
wire n_hold_clk_wait;
wire reg_sys_we_lo_ALTERA_SYNTHESIZED;
wire SYNTHESIZED_WIRE_52;
wire SYNTHESIZED_WIRE_53;
243,7 → 242,7
bank_af <= 0;
end
else
if (n_hold_clk_wait)
if (nhold_clk_wait)
begin
bank_af <= bank_af ^ ctl_reg_ex_af;
end
273,7 → 272,7
bank_hl_de2 <= 0;
end
else
if (n_hold_clk_wait)
if (nhold_clk_wait)
begin
bank_hl_de2 <= bank_hl_de2 ^ SYNTHESIZED_WIRE_43;
end
293,7 → 292,7
bank_hl_de1 <= 0;
end
else
if (n_hold_clk_wait)
if (nhold_clk_wait)
begin
bank_hl_de1 <= bank_hl_de1 ^ SYNTHESIZED_WIRE_50;
end
307,7 → 306,7
bank_exx <= 0;
end
else
if (n_hold_clk_wait)
if (nhold_clk_wait)
begin
bank_exx <= bank_exx ^ ctl_reg_exx;
end
319,8 → 318,6
 
assign SYNTHESIZED_WIRE_31 = ~ctl_reg_gp_sel[1];
 
assign n_hold_clk_wait = ~hold_clk_wait;
 
assign reg_sel_bc2 = SYNTHESIZED_WIRE_52 & bank_exx;
 
assign reg_sys_we_lo = reg_sys_we_lo_ALTERA_SYNTHESIZED;
/registers/test_registers.sv
49,7 → 49,7
logic ctl_reg_sys_we_sig=0; // Write to system register
logic use_ixiy_sig=0; // Use IX or IY
logic use_ix_sig=0; // Use IX and not IY
logic hold_clk_wait_sig=0; // Hold all transitions
logic nhold_clk_wait_sig=1; // Enable transitions due to nWAIT
 
logic ctl_reg_exx_sig=0; // Exchange register banks
logic ctl_reg_ex_af_sig=0; // Exchange AF banks
183,7 → 183,7
.ctl_reg_sys_we(ctl_reg_sys_we_sig) , // input ctl_reg_sys_we_sig
.clk(clk) , // input clk
.ctl_sw_4d (ctl_sw_4d_sig) , // input ctl_sw_4d
.hold_clk_wait(hold_clk_wait_sig) , // input hold_clk_wait_sig
.nhold_clk_wait(nhold_clk_wait_sig) , // input nhold_clk_wait_sig
.reg_sel_bc(reg_sel_bc_sig) , // output reg_sel_bc_sig
.reg_sel_bc2(reg_sel_bc2_sig) , // output reg_sel_bc2_sig
.reg_sel_ix(reg_sel_ix_sig) , // output reg_sel_ix_sig
/toplevel/coremodules.vh
15,7 → 15,8
.iorq_Tw (iorq_Tw),
.busack (busack),
.pin_control_oe (pin_control_oe),
.hold_clk_busrq (hold_clk_busrq)
.hold_clk_busrq (hold_clk_busrq),
.nhold_clk_wait (nhold_clk_wait)
);
 
decode_state decode_state_(
33,7 → 34,7
.in_nmi (in_nmi),
.nreset (nreset),
.ctl_state_tbl_we (ctl_state_tbl_we),
.hold_clk_wait (hold_clk_wait),
.nhold_clk_wait (nhold_clk_wait),
.in_halt (in_halt),
.table_cb (table_cb),
.table_ed (table_ed),
201,7 → 202,7
.ctl_ir_we (ctl_ir_we),
.clk (clk),
.nreset (nreset),
.hold_clk_wait (hold_clk_wait),
.nhold_clk_wait (nhold_clk_wait),
.db (db0[7:0]),
.opcode (opcode)
);
233,7 → 234,7
.M1 (M1),
.T2 (T2),
.fpga_reset (fpga_reset),
.hold_clk_wait (hold_clk_wait),
.nhold_clk_wait (nhold_clk_wait),
.clrpc (clrpc),
.nreset (nreset)
);
251,7 → 252,7
.ctl_iorw (ctl_iorw),
.timings_en (timings_en),
.iorq_Tw (iorq_Tw),
.hold_clk_wait (hold_clk_wait),
.nhold_clk_wait (nhold_clk_wait),
.nM1_out (nM1_out),
.nRFSH_out (nRFSH_out),
.nMREQ_out (nMREQ_out),
391,7 → 392,7
.clk (clk),
.ctl_flags_cf2_sel_shift (ctl_flags_cf2_sel_shift),
.ctl_flags_cf2_sel_daa (ctl_flags_cf2_sel_daa),
.hold_clk_wait (hold_clk_wait),
.nhold_clk_wait (nhold_clk_wait),
.flags_sf (flags_sf),
.flags_zf (flags_zf),
.flags_hf (flags_hf),
500,7 → 501,7
.ctl_reg_sys_we (ctl_reg_sys_we),
.clk (clk),
.ctl_sw_4d (ctl_sw_4d),
.hold_clk_wait (hold_clk_wait),
.nhold_clk_wait (nhold_clk_wait),
.ctl_reg_gp_hilo (ctl_reg_gp_hilo),
.ctl_reg_gp_sel (ctl_reg_gp_sel),
.ctl_reg_sys_hilo (ctl_reg_sys_hilo),
/toplevel/globals.vh
7,6 → 7,7
wire busack;
wire pin_control_oe;
wire hold_clk_busrq;
wire nhold_clk_wait;
 
// Module: control/decode_state.v
wire in_halt;

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