OpenCores
URL https://opencores.org/ocsvn/can/can/trunk

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    from Rev 158 to Rev 159
    Reverse comparison

Rev 158 → Rev 159

/trunk/sim/rtl_sim/run/run_sim.scr
31,6 → 31,7
 
foreach filename ( `cat ../bin/rtl_file_list` )
echo "../../../rtl/verilog/"$filename >> ncvlog.args
# echo "../../../rtl/can_strip_down/rtl/verilog/"$filename >> ncvlog.args
end
 
#foreach filename ( `cat ../bin/memory_file_list` )
/trunk/sim/rtl_sim/run/wave.do
117,7 → 117,7
include bookmark with filenames
include scope history without filenames
define waveform window listpane 7.94
define waveform window namepane 11.94
define waveform window namepane 13.47
define multivalueindication
define pattern curpos dot
define pattern cursor1 dot
148,363 → 148,225
define web browser command netscape
define zoom outfull on initial add off
add group \
testbench \
can_testbench.receive_frame.arbitration_lost \
bench_top \
can_testbench.ale_i \
can_testbench.bus_off_on \
can_testbench.clk \
can_testbench.clkout \
can_testbench.cs_can \
can_testbench.delayed_tx \
can_testbench.extended_mode \
can_testbench.irq \
can_testbench.port_0[7:0]'h \
can_testbench.port_0_en \
can_testbench.port_0_i[7:0]'h \
can_testbench.port_0_o[7:0]'h \
can_testbench.port_free \
can_testbench.rd_i \
can_testbench.rst_i \
can_testbench.rx \
can_testbench.rx_and_tx \
can_testbench.i_can_top.i_can_bsp.sample_point \
can_testbench.start_tb's \
can_testbench.tmp_data[7:0]'h \
can_testbench.tx \
can_testbench.tx_bypassed \
can_testbench.tx_i \
can_testbench.wr_i \
can_testbench.ale_i \
can_testbench.bus_off_on \
can_testbench.clk \
can_testbench.clkout \
can_testbench.cs_can \
can_testbench.delayed_tx \
can_testbench.extended_mode \
can_testbench.irq \
can_testbench.port_0[7:0]'h \
can_testbench.port_0_en \
can_testbench.port_0_i[7:0]'h \
can_testbench.port_0_o[7:0]'h \
can_testbench.port_free \
can_testbench.rd_i \
can_testbench.rst_i \
can_testbench.rx \
can_testbench.rx_and_tx \
can_testbench.start_tb's \
can_testbench.tmp_data[7:0]'h \
can_testbench.tx \
can_testbench.tx_bypassed \
can_testbench.tx_i \
can_testbench.wr_i \
 
add group \
can_top \
can_testbench.i_can_top.i_can_bsp.arbitration_lost \
can_testbench.i_can_top.i_can_btl.transmitting \
can_testbench.i_can_top.i_can_bsp.tx_state \
can_testbench.i_can_top.i_can_bsp.transmitter \
can_testbench.i_can_top.ale_i \
can_testbench.i_can_top.clk_i \
can_testbench.i_can_top.cs_can_i \
can_testbench.i_can_top.irq_on \
can_testbench.i_can_top.port_0_io[7:0]'h \
can_testbench.i_can_top.rd_i \
can_testbench.i_can_top.rst_i \
can_testbench.i_can_top.rx_i \
can_registers \
can_testbench.irq \
can_testbench.i_can_top.i_can_registers.irq \
can_testbench.i_can_top.i_can_registers.irq_en_ext[7:0]'h \
can_testbench.i_can_top.i_can_registers.irq_reg[7:0]'h \
 
add group \
can_bsp \
can_testbench.i_can_top.tx_o \
can_testbench.i_can_top.tx_oen_o \
can_testbench.i_can_top.wr_i \
can_testbench.i_can_top.rx_i \
can_testbench.i_can_top.rx_sync \
can_testbench.i_can_top.i_can_bsp.hard_sync \
can_testbench.i_can_top.i_can_btl.resync \
can_testbench.i_can_top.i_can_bsp.rx_idle \
can_testbench.i_can_top.i_can_bsp.rx_id1 \
can_testbench.i_can_top.i_can_bsp.rx_id2 \
can_testbench.i_can_top.i_can_bsp.rx_ide \
can_testbench.i_can_top.i_can_bsp.rx_r0 \
can_testbench.i_can_top.i_can_bsp.rx_r1 \
can_testbench.i_can_top.i_can_bsp.rx_rtr1 \
can_testbench.i_can_top.i_can_bsp.rx_rtr2 \
can_testbench.i_can_top.i_can_bsp.rx_dlc \
can_testbench.i_can_top.i_can_bsp.rx_data \
can_testbench.i_can_top.i_can_bsp.rx_crc \
can_testbench.i_can_top.i_can_bsp.rx_crc_lim \
can_testbench.i_can_top.i_can_bsp.rx_ack \
can_testbench.i_can_top.i_can_bsp.rx_ack_lim \
can_testbench.i_can_top.i_can_bsp.send_ack \
can_testbench.i_can_top.i_can_btl.sampled_bit \
can_testbench.i_can_top.i_can_bsp.rx_inter \
can_testbench.i_can_top.i_can_bsp.rx_idle \
 
add group \
can_btl \
can_testbench.i_can_top.rx_i \
can_testbench.i_can_top.i_can_btl.rx \
can_testbench.i_can_top.i_can_btl.sync \
can_testbench.i_can_top.i_can_btl.seg1 \
can_testbench.i_can_top.i_can_btl.seg2 \
can_testbench.i_can_top.i_can_btl.sample_point \
can_testbench.i_can_top.i_can_btl.quant_cnt[3:0]'h \
can_testbench.i_can_top.i_can_btl.baud_r_presc[5:0]'h \
can_testbench.i_can_top.i_can_btl.clk \
can_testbench.i_can_top.i_can_btl.clk_cnt[6:0]'h \
can_testbench.i_can_top.i_can_btl.clk_en \
can_testbench.i_can_top.i_can_btl.delay[3:0]'h \
can_testbench.i_can_top.i_can_btl.go_seg1 \
can_testbench.i_can_top.i_can_btl.go_seg2 \
can_testbench.i_can_top.i_can_btl.go_sync \
can_testbench.i_can_top.i_can_btl.transmitting \
can_testbench.i_can_top.i_can_btl.hard_sync \
can_testbench.i_can_top.i_can_btl.hard_sync_blocked \
can_testbench.i_can_top.i_can_btl.preset_cnt[7:0]'h \
can_testbench.i_can_top.i_can_btl.quant_cnt[3:0]'h \
can_testbench.i_can_top.i_can_btl.resync \
can_testbench.i_can_top.i_can_btl.resync_latched \
can_testbench.i_can_top.i_can_btl.rst \
can_testbench.i_can_top.i_can_btl.rx_idle \
can_testbench.i_can_top.i_can_btl.sample[1:0]'h \
can_testbench.i_can_top.i_can_btl.sampled_bit \
can_testbench.i_can_top.i_can_btl.sampled_bit_q \
can_testbench.i_can_top.i_can_btl.sync \
can_testbench.i_can_top.i_can_btl.seg1 \
can_testbench.i_can_top.i_can_btl.seg2 \
can_testbench.i_can_top.i_can_btl.sync_blocked \
can_testbench.i_can_top.i_can_btl.sync_jump_width[1:0]'h \
can_testbench.i_can_top.i_can_btl.sync_window \
can_testbench.i_can_top.i_can_btl.time_segment1[3:0]'h \
can_testbench.i_can_top.i_can_btl.time_segment2[2:0]'h \
can_testbench.i_can_top.i_can_btl.transmitting \
can_testbench.i_can_top.i_can_btl.triple_sampling \
can_testbench.i_can_top.i_can_btl.tx_point \
 
add group \
can_bsp \
can_testbench.i_can_top.i_can_bsp.arbitration_lost \
can_testbench.i_can_top.i_can_bsp.go_early_tx \
can_testbench.i_can_top.i_can_bsp.go_early_tx_latched \
can_testbench.i_can_top.i_can_bsp.ack_err_latched \
can_testbench.i_can_top.i_can_bsp.bit_err_latched \
can_testbench.i_can_top.i_can_bsp.form_err_latched \
can_testbench.i_can_top.i_can_bsp.stuff_err_latched \
can_testbench.i_can_top.i_can_bsp.crc_err \
can_testbench.i_can_top.i_can_bsp.rx_eof \
can_testbench.i_can_top.i_can_bsp.go_error_frame \
can_testbench.i_can_top.i_can_bsp.ack_err \
can_testbench.i_can_top.i_can_bsp.bit_err \
can_testbench.i_can_top.i_can_bsp.crc_err \
can_testbench.i_can_top.i_can_bsp.form_err \
can_testbench.i_can_top.i_can_bsp.stuff_err \
can_testbench.i_can_top.i_can_bsp.err \
can_testbench.i_can_top.i_can_bsp.bit_err_exc1 \
can_testbench.i_can_top.i_can_bsp.bit_err_exc2 \
can_testbench.i_can_top.i_can_bsp.bit_err_exc3 \
can_testbench.i_can_top.i_can_btl.hard_sync \
can_testbench.i_can_top.i_can_btl.resync \
can_testbench.i_can_top.sampled_bit \
can_testbench.i_can_top.sampled_bit_q \
can_testbench.i_can_top.i_can_bsp.transmitting \
can_testbench.rx \
can_testbench.i_can_top.i_can_bsp.sample_point \
can_testbench.i_can_top.i_can_bsp.tx_point \
can_testbench.i_can_top.i_can_bsp.tx_point_q \
can_testbench.i_can_top.i_can_bsp.bit_stuff_cnt_tx[2:0]'h \
can_testbench.i_can_top.i_can_bsp.bit_de_stuff_tx \
can_testbench.i_can_top.i_can_bsp.tx_pointer[5:0]'h \
can_testbench.i_can_top.i_can_bsp.basic_chain[18:0]'h \
can_testbench.i_can_top.i_can_bsp.basic_chain_data[63:0]'h \
can_testbench.i_can_top.i_can_bsp.extended_chain_std[18:0]'h \
can_testbench.i_can_top.i_can_bsp.extended_chain_ext[38:0]'h \
can_testbench.i_can_top.i_can_bsp.extended_mode \
can_testbench.i_can_top.i_can_bsp.rst_tx_pointer \
can_testbench.i_can_top.i_can_bsp.addr[7:0]'h \
can_testbench.i_can_top.i_can_bsp.bit_cnt[5:0]'h \
can_testbench.i_can_top.i_can_bsp.bit_de_stuff \
can_testbench.i_can_top.i_can_bsp.bit_de_stuff_reset \
can_testbench.i_can_top.i_can_bsp.bit_de_stuff_set \
can_testbench.i_can_top.i_can_bsp.bit_stuff_cnt[2:0]'h \
can_testbench.i_can_top.i_can_bsp.bit_stuff_cnt_en \
can_testbench.i_can_top.i_can_bsp.byte_cnt[2:0]'h \
can_testbench.i_can_top.i_can_bsp.calculated_crc[14:0]'h \
can_testbench.i_can_top.i_can_bsp.r_calculated_crc[15:0]'h \
can_testbench.i_can_top.i_can_bsp.crc_in[14:0]'h \
can_testbench.i_can_top.i_can_bsp.clk \
can_testbench.i_can_top.i_can_bsp.crc_enable \
can_testbench.i_can_top.i_can_bsp.data_cnt[3:0]'h \
can_testbench.i_can_top.i_can_bsp.data_for_fifo[7:0]'h \
can_testbench.i_can_top.i_can_bsp.data_len[3:0]'h \
can_testbench.i_can_top.i_can_bsp.data_out[7:0]'h \
can_testbench.i_can_top.i_can_bsp.transmitter \
can_testbench.i_can_top.i_can_bsp.arbitration_field \
can_testbench.i_can_top.i_can_bsp.sampled_bit \
can_testbench.i_can_top.i_can_bsp.wr_fifo \
can_testbench.i_can_top.i_can_bsp.overload_needed \
can_testbench.i_can_top.i_can_bsp.overload_frame \
can_testbench.i_can_top.i_can_bsp.overload_frame_ended \
can_testbench.i_can_top.i_can_bsp.overload_flag_over \
can_testbench.i_can_top.i_can_bsp.overload_cnt1[2:0]'h \
can_testbench.i_can_top.i_can_bsp.overload_cnt2[2:0]'h \
can_testbench.i_can_top.i_can_bsp.enable_overload_cnt2 \
can_testbench.i_can_top.i_can_bsp.transmitter \
can_testbench.i_can_top.i_can_bsp.suspend \
can_testbench.i_can_top.i_can_bsp.enable_error_cnt2 \
can_testbench.i_can_top.i_can_bsp.error_flag_over \
can_testbench.i_can_top.i_can_bsp.rx_err_cnt_blocked \
can_testbench.i_can_top.i_can_bsp.rule5 \
can_testbench.i_can_top.i_can_bsp.rule3_exc1_1 \
can_testbench.i_can_top.i_can_bsp.rule3_exc1_2 \
can_testbench.i_can_top.i_can_bsp.rule3_exc2 \
can_testbench.i_can_top.i_can_bsp.go_error_frame \
can_testbench.i_can_top.i_can_bsp.error_frame \
can_testbench.i_can_top.i_can_bsp.go_overload_frame \
can_testbench.i_can_top.i_can_bsp.go_rx_inter \
can_testbench.i_can_top.i_can_bsp.overload_frame \
can_testbench.i_can_top.i_can_bsp.overload_frame_ended \
can_testbench.i_can_top.i_can_bsp.passive_cnt[2:0]'h \
can_testbench.i_can_top.i_can_bsp.eof_cnt[2:0]'h \
can_testbench.i_can_top.i_can_bsp.wr_fifo \
can_testbench.i_can_top.i_can_bsp.error_cnt1[2:0]'h \
can_testbench.i_can_top.i_can_bsp.error_cnt2[2:0]'h \
can_testbench.i_can_top.i_can_bsp.error_frame \
can_testbench.i_can_top.i_can_bsp.error_frame_ended \
can_testbench.i_can_top.i_can_bsp.id_ok \
can_testbench.i_can_top.i_can_bsp.rx_inter \
can_testbench.i_can_top.i_can_bsp.err \
can_testbench.i_can_top.i_can_bsp.node_error_passive \
can_testbench.i_can_top.i_can_bsp.node_bus_off \
can_testbench.i_can_top.i_can_bsp.rtr1 \
can_testbench.i_can_top.i_can_bsp.rtr2 \
can_testbench.i_can_top.i_can_bsp.bit_de_stuff_tx \
can_testbench.i_can_top.i_can_bsp.bit_stuff_cnt_tx[2:0]'h \
can_testbench.i_can_top.i_can_bsp.bit_stuff_cnt_en \
can_testbench.i_can_top.i_can_bsp.bit_de_stuff_set \
can_testbench.i_can_top.i_can_bsp.bit_de_stuff_reset \
can_testbench.i_can_top.i_can_btl.hard_sync \
can_testbench.i_can_top.i_can_btl.resync \
can_testbench.i_can_top.i_can_bsp.tx_pointer[5:0]'h \
can_testbench.rx \
can_testbench.i_can_top.i_can_bsp.sample_point \
can_testbench.i_can_top.i_can_bsp.tx_point \
can_testbench.i_can_top.i_can_bsp.rx_ack \
can_testbench.i_can_top.i_can_bsp.rx_ack_lim \
can_testbench.i_can_top.i_can_bsp.rx_crc \
can_testbench.i_can_top.i_can_bsp.rx_crc_lim \
can_testbench.i_can_top.i_can_bsp.rx_data \
can_testbench.i_can_top.i_can_bsp.rx_dlc \
can_testbench.i_can_top.i_can_bsp.finish_msg \
can_testbench.i_can_top.i_can_bsp.tx_state \
can_testbench.i_can_top.i_can_bsp.rx_eof \
can_testbench.i_can_top.tx_o \
can_testbench.i_can_top.rx_i \
can_testbench.i_can_top.i_can_bsp.rx_idle \
can_testbench.i_can_top.i_can_bsp.rx_id1 \
can_testbench.i_can_top.i_can_bsp.rx_id2 \
can_testbench.i_can_top.i_can_bsp.rx_ide \
can_testbench.i_can_top.i_can_bsp.rx_idle \
can_testbench.i_can_top.i_can_bsp.rx_inter \
can_testbench.i_can_top.i_can_bsp.suspend \
can_testbench.i_can_top.i_can_bsp.susp_cnt_en \
can_testbench.i_can_top.i_can_bsp.susp_cnt[2:0]'h \
can_testbench.i_can_top.i_can_bsp.rx_r0 \
can_testbench.i_can_top.i_can_bsp.rx_r1 \
can_testbench.i_can_top.i_can_bsp.rx_rtr1 \
can_testbench.i_can_top.i_can_bsp.rx_rtr2 \
can_testbench.i_can_top.i_can_bsp.extended_mode \
can_testbench.i_can_top.i_can_bsp.go_early_tx \
can_testbench.i_can_top.i_can_bsp.go_tx \
can_testbench.i_can_top.i_can_bsp.need_to_tx \
can_testbench.i_can_top.i_can_bsp.tx_request \
can_testbench.i_can_top.i_can_bsp.clk \
can_testbench.i_can_top.i_can_bsp.tx_state \
can_testbench.i_can_top.i_can_bsp.transmitting \
can_testbench.i_can_top.i_can_bsp.go_crc_enable \
can_testbench.i_can_top.i_can_bsp.go_error_frame \
can_testbench.i_can_top.i_can_bsp.go_rx_ack \
can_testbench.i_can_top.i_can_bsp.go_rx_ack_lim \
can_testbench.i_can_top.i_can_bsp.go_rx_crc \
can_testbench.i_can_top.i_can_bsp.go_rx_crc_lim \
can_testbench.i_can_top.i_can_bsp.go_rx_data \
can_testbench.i_can_top.i_can_bsp.go_rx_dlc \
can_testbench.i_can_top.i_can_bsp.go_rx_eof \
can_testbench.i_can_top.i_can_bsp.go_rx_id1 \
can_testbench.i_can_top.i_can_bsp.go_rx_id2 \
can_testbench.i_can_top.i_can_bsp.go_rx_ide \
can_testbench.i_can_top.i_can_bsp.go_rx_idle \
can_testbench.i_can_top.i_can_bsp.go_rx_inter \
can_testbench.i_can_top.i_can_bsp.go_overload_frame \
can_testbench.i_can_top.i_can_bsp.go_rx_r0 \
can_testbench.i_can_top.i_can_bsp.go_rx_r1 \
can_testbench.i_can_top.i_can_bsp.go_rx_rtr1 \
can_testbench.i_can_top.i_can_bsp.go_rx_rtr2 \
can_testbench.i_can_top.i_can_bsp.hard_sync \
can_testbench.i_can_top.i_can_bsp.header_cnt[2:0]'h \
can_testbench.i_can_top.i_can_bsp.header_len[2:0]'h \
can_testbench.i_can_top.i_can_bsp.id[28:0]'h \
can_testbench.i_can_top.i_can_bsp.id_ok \
can_testbench.i_can_top.i_can_bsp.ide \
can_testbench.i_can_top.i_can_bsp.limited_data_len[3:0]'h \
can_testbench.i_can_top.i_can_bsp.limited_data_len_minus1[3:0]'h \
can_testbench.i_can_top.i_can_bsp.no_byte0 \
can_testbench.i_can_top.i_can_bsp.no_byte1 \
can_testbench.i_can_top.i_can_bsp.release_buffer \
can_testbench.i_can_top.i_can_bsp.remote_rq \
can_testbench.i_can_top.i_can_bsp.reset_mode \
can_testbench.i_can_top.i_can_bsp.reset_mode_q \
can_testbench.i_can_top.i_can_bsp.reset_wr_fifo \
can_testbench.i_can_top.i_can_bsp.rst \
can_testbench.i_can_top.i_can_bsp.rst_crc_enable \
can_testbench.i_can_top.i_can_bsp.rx_dlc \
can_testbench.i_can_top.i_can_bsp.rx_data \
can_testbench.i_can_top.i_can_bsp.rx_crc \
can_testbench.i_can_top.i_can_bsp.rx_crc_lim \
can_testbench.i_can_top.i_can_bsp.rx_ack \
can_testbench.i_can_top.i_can_bsp.rx_ack_lim \
can_testbench.i_can_top.i_can_bsp.rx_eof \
can_testbench.i_can_top.i_can_bsp.rx_inter \
can_testbench.i_can_top.i_can_bsp.sample_point \
can_testbench.i_can_top.i_can_bsp.sampled_bit_q \
can_testbench.i_can_top.i_can_bsp.storing_header \
can_testbench.i_can_top.i_can_bsp.tmp_data[7:0]'h \
can_testbench.i_can_top.i_can_bsp.write_data_to_tmp_fifo \
can_testbench.i_can_top.i_can_bsp.wr_fifo \
can_testbench.i_can_top.i_can_bsp.reset_wr_fifo \
can_testbench.i_can_top.i_can_bsp.transmitting \
can_testbench.i_can_top.i_can_bsp.tx \
can_testbench.i_can_top.i_can_bsp.tx_data_0[7:0]'h \
can_testbench.i_can_top.i_can_bsp.tx_data_1[7:0]'h \
can_testbench.i_can_top.i_can_bsp.tx_data_2[7:0]'h \
can_testbench.i_can_top.i_can_bsp.tx_data_3[7:0]'h \
can_testbench.i_can_top.i_can_bsp.tx_data_4[7:0]'h \
can_testbench.i_can_top.i_can_bsp.tx_data_5[7:0]'h \
can_testbench.i_can_top.i_can_bsp.tx_data_6[7:0]'h \
can_testbench.i_can_top.i_can_bsp.tx_data_7[7:0]'h \
can_testbench.i_can_top.i_can_bsp.tx_data_8[7:0]'h \
can_testbench.i_can_top.i_can_bsp.tx_data_9[7:0]'h \
can_testbench.i_can_top.i_can_bsp.tx_data_10[7:0]'h \
can_testbench.i_can_top.i_can_bsp.tx_data_11[7:0]'h \
can_testbench.i_can_top.i_can_bsp.tx_data_12[7:0]'h \
can_testbench.i_can_top.i_can_bsp.tx_point \
can_testbench.i_can_top.i_can_bsp.wr_fifo \
can_testbench.i_can_top.i_can_bsp.go_error_frame \
can_testbench.i_can_top.i_can_bsp.ack_err \
can_testbench.i_can_top.i_can_bsp.bit_err \
can_testbench.i_can_top.i_can_bsp.crc_err \
can_testbench.i_can_top.i_can_bsp.form_err \
can_testbench.i_can_top.i_can_bsp.stuff_err \
can_testbench.i_can_top.i_can_bsp.rx_err_cnt[8:0]'h \
can_testbench.i_can_top.i_can_bsp.tx_err_cnt[8:0]'h \
can_testbench.i_can_top.i_can_bsp.crc_in[14:0]'h \
can_testbench.i_can_top.i_can_bsp.calculated_crc[14:0]'h \
can_testbench.i_can_top.i_can_bsp.bit_de_stuff \
can_testbench.i_can_top.i_can_bsp.arbitration_blocked \
can_testbench.i_can_top.i_can_bsp.arbitration_field \
can_testbench.i_can_top.i_can_bsp.arbitration_lost \
can_testbench.i_can_top.i_can_bsp.arbitration_lost_capture[4:0]'h \
can_testbench.i_can_top.i_can_bsp.crc_in[14:0]'h \
can_testbench.i_can_top.i_can_bsp.calculated_crc[14:0]'h \
can_testbench.i_can_top.i_can_bsp.bit_de_stuff \
can_testbench.i_can_top.i_can_bsp.arbitration_blocked \
can_testbench.i_can_top.i_can_bsp.arbitration_field \
can_testbench.i_can_top.i_can_bsp.arbitration_lost \
can_testbench.i_can_top.i_can_bsp.arbitration_cnt[4:0]'h \
can_testbench.i_can_top.i_can_bsp.arbitration_lost_capture[4:0]'h \
 
add group \
can_acf \
can_testbench.i_can_top.i_can_bsp.i_can_acf.acceptance_code_0[7:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_acf.acceptance_code_1[7:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_acf.acceptance_code_2[7:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_acf.acceptance_code_3[7:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_acf.acceptance_filter_mode \
can_testbench.i_can_top.i_can_bsp.i_can_acf.acceptance_mask_0[7:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_acf.acceptance_mask_1[7:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_acf.acceptance_mask_2[7:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_acf.acceptance_mask_3[7:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_acf.clk \
can_testbench.i_can_top.i_can_bsp.i_can_acf.data0[7:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_acf.data1[7:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_acf.extended_mode \
can_testbench.i_can_top.i_can_bsp.i_can_acf.go_rx_crc_lim \
can_testbench.i_can_top.i_can_bsp.i_can_acf.id[28:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_acf.id_ok \
can_testbench.i_can_top.i_can_bsp.i_can_acf.ide \
can_testbench.i_can_top.i_can_bsp.i_can_acf.match \
can_testbench.i_can_top.i_can_bsp.i_can_acf.match_df_ext \
can_testbench.i_can_top.i_can_bsp.i_can_acf.match_df_std \
can_testbench.i_can_top.i_can_bsp.i_can_acf.match_sf_ext \
can_testbench.i_can_top.i_can_bsp.i_can_acf.match_sf_std \
can_testbench.i_can_top.i_can_bsp.i_can_acf.reset_mode \
can_testbench.i_can_top.i_can_bsp.i_can_acf.rst \
can_testbench.i_can_top.i_can_bsp.i_can_acf.rtr1 \
can_testbench.i_can_top.i_can_bsp.i_can_acf.rtr2 \
 
add group \
can_fifo \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.clk \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.reset_mode \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.data_in[7:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.data_out[7:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.extended_mode \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.wr \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.wr_info_pointer[5:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.wr_pointer[5:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.wr_q \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.write_length_info \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.fifo_cnt[6:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.fifo_empty \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.fifo_full \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.latch_overrun \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.len_cnt[3:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.rd_pointer[5:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.read_address[5:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.reset_mode \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.rst \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.wr_pointer[5:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.wr_q \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.write_length_info \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.info_cnt[6:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.wr_info_pointer[5:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.info_empty \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.info_full \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.rd_info_pointer[5:0]'h \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.wr \
can_testbench.i_can_top.i_can_bsp.i_can_fifo.release_buffer \
can_testbench.i_can_top.i_can_bsp.receive_status \
can_testbench.i_can_top.i_can_bsp.transmit_status \
 
add group \
can_registers \
can_testbench.i_can_top.i_can_registers.clk \
can_testbench.i_can_top.i_can_registers.reset_mode \
can_testbench.i_can_top.i_can_registers.addr[7:0]'h \
can_testbench.i_can_top.i_can_registers.cs \
can_testbench.i_can_top.i_can_registers.release_buffer \
can_testbench.i_can_top.i_can_registers.clear_data_overrun \
can_testbench.i_can_top.i_can_registers.error_status \
can_testbench.i_can_top.i_can_registers.overrun_status \
can_testbench.i_can_top.i_can_registers.receive_buffer_status \
can_testbench.i_can_top.i_can_registers.receive_status \
can_testbench.i_can_top.i_can_registers.status[7:0]'h \
can_testbench.i_can_top.i_can_registers.transmit_buffer_status \
can_testbench.i_can_top.i_can_registers.transmit_status \
can_testbench.i_can_top.i_can_registers.extended_mode \
can_testbench.i_can_top.i_can_registers.data_overrun_irq_en \
can_testbench.i_can_top.i_can_registers.transmit_irq_en \
can_testbench.i_can_top.i_can_registers.receive_irq_en \
can_testbench.i_can_top.i_can_registers.error_warning_irq_en \
can_testbench.i_can_top.i_can_registers.bus_error_irq_en \
can_testbench.i_can_top.i_can_registers.irq \
can_testbench.i_can_top.i_can_registers.read_irq_reg \
state \
can_testbench.i_can_top.i_can_bsp.sample_point \
can_testbench.i_can_top.i_can_bsp.tx_point \
can_testbench.i_can_top.tx_o \
can_testbench.i_can_top.rx_i \
can_testbench.i_can_top.i_can_bsp.rx_idle \
can_testbench.i_can_top.i_can_bsp.rx_id1 \
can_testbench.i_can_top.i_can_bsp.rx_rtr1 \
can_testbench.i_can_top.i_can_bsp.rx_ide \
can_testbench.i_can_top.i_can_bsp.rx_id2 \
can_testbench.i_can_top.i_can_bsp.rx_rtr2 \
can_testbench.i_can_top.i_can_bsp.rx_r1 \
can_testbench.i_can_top.i_can_bsp.rx_r0 \
can_testbench.i_can_top.i_can_bsp.rx_dlc \
can_testbench.i_can_top.i_can_bsp.rx_data \
can_testbench.i_can_top.i_can_bsp.rx_crc \
can_testbench.i_can_top.i_can_bsp.rx_crc_lim \
can_testbench.i_can_top.i_can_bsp.rx_ack \
can_testbench.i_can_top.i_can_bsp.rx_ack_lim \
can_testbench.i_can_top.i_can_bsp.rx_eof \
can_testbench.i_can_top.i_can_bsp.rx_inter \
can_testbench.i_can_top.i_can_bsp.go_error_frame \
can_testbench.i_can_top.i_can_bsp.error_frame \
can_testbench.i_can_top.i_can_bsp.ack_err \
can_testbench.i_can_top.i_can_bsp.bit_err \
can_testbench.i_can_top.i_can_bsp.crc_err \
can_testbench.i_can_top.i_can_bsp.err \
can_testbench.i_can_top.i_can_bsp.form_err \
can_testbench.i_can_top.i_can_bsp.stuff_err \
can_testbench.i_can_top.i_can_bsp.tx \
can_testbench.i_can_top.i_can_bsp.sampled_bit \
can_testbench.i_can_top.i_can_bsp.error_cnt1[2:0]'h \
can_testbench.i_can_top.i_can_bsp.error_cnt2[2:0]'h \
can_testbench.i_can_top.i_can_bsp.error_frame_ended \
 
add group \
tmp \
can_testbench.i_can_top.cs \
can_2 \
can_testbench.i_can_top2.i_can_bsp.sample_point \
can_testbench.i_can_top2.i_can_bsp.sampled_bit \
can_testbench.i_can_top2.i_can_bsp.error_cnt1[2:0]'h \
can_testbench.i_can_top2.i_can_bsp.error_cnt2[2:0]'h \
can_testbench.i_can_top2.i_can_bsp.error_frame_ended \
can_testbench.i_can_top2.cs_can_i \
can_testbench.i_can_top2.ale_i \
can_testbench.i_can_top2.rd_i \
can_testbench.i_can_top2.wr_i \
can_testbench.i_can_top2.port_0_io[7:0]'h \
can_testbench.i_can_top2.reset_mode \
can_testbench.i_can_top2.tx_o \
can_testbench.i_can_top2.rx_i \
can_testbench.i_can_top2.i_can_bsp.rx_idle \
can_testbench.i_can_top2.i_can_bsp.rx_id1 \
can_testbench.i_can_top2.i_can_bsp.rx_rtr1 \
can_testbench.i_can_top2.i_can_bsp.rx_ide \
can_testbench.i_can_top2.i_can_bsp.rx_id2 \
can_testbench.i_can_top2.i_can_bsp.rx_rtr2 \
can_testbench.i_can_top2.i_can_bsp.rx_r1 \
can_testbench.i_can_top2.i_can_bsp.rx_r0 \
can_testbench.i_can_top2.i_can_bsp.rx_dlc \
can_testbench.i_can_top2.i_can_bsp.rx_data \
can_testbench.i_can_top2.i_can_bsp.rx_crc \
can_testbench.i_can_top2.i_can_bsp.rx_crc_lim \
can_testbench.i_can_top2.i_can_bsp.rx_ack \
can_testbench.i_can_top2.i_can_bsp.rx_ack_lim \
can_testbench.i_can_top2.i_can_bsp.rx_eof \
can_testbench.i_can_top2.i_can_bsp.rx_inter \
can_testbench.i_can_top2.i_can_bsp.go_error_frame \
can_testbench.i_can_top2.i_can_bsp.error_frame \
can_testbench.i_can_top2.i_can_bsp.ack_err \
can_testbench.i_can_top2.i_can_bsp.bit_err \
can_testbench.i_can_top2.i_can_bsp.crc_err \
can_testbench.i_can_top2.i_can_bsp.err \
can_testbench.i_can_top2.i_can_bsp.form_err \
can_testbench.i_can_top2.i_can_bsp.stuff_err \
 
 
deselect all
add register Default \
fontsize 12 \
 
 
open window waveform 1 geometry 10 60 1592 1139
zoom at 56539.58(0)ns 0.00581205 0.00000000
zoom at 0(0)ns 0.00000773 0.00000000

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