URL
https://opencores.org/ocsvn/claw/claw/trunk
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- This comparison shows the changes necessary to convert path
/claw/trunk/or1200_cpu/work/or1200_sb_fifo
- from Rev 2 to Rev 4
- ↔ Reverse comparison
Rev 2 → Rev 4
/_primary.vhd
0,0 → 1,19
library verilog; |
use verilog.vl_types.all; |
entity or1200_sb_fifo is |
generic( |
dw : integer := 68; |
fw : integer := 2; |
fl : integer := 4 |
); |
port( |
clk_i : in vl_logic; |
rst_i : in vl_logic; |
dat_i : in vl_logic_vector; |
wr_i : in vl_logic; |
rd_i : in vl_logic; |
dat_o : out vl_logic_vector; |
full_o : out vl_logic; |
empty_o : out vl_logic |
); |
end or1200_sb_fifo; |
_primary.vhd
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: verilog.asm
===================================================================
--- verilog.asm (nonexistent)
+++ verilog.asm (revision 4)
@@ -0,0 +1,1098 @@
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