OpenCores
URL https://opencores.org/ocsvn/opb_usblite/opb_usblite/trunk

Subversion Repositories opb_usblite

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    from Rev 4 to Rev 5
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Rev 4 → Rev 5

/opb_usblite/trunk/schematic/usbif.opj
0,0 → 1,78
(ExpressProject "usbif"
(ProjectVersion "19981106")
(ProjectType "PCB")
(Folder "Design Resources"
(Folder "Library")
(NoModify)
(File ".\usbif.dsn"
(Type "Schematic Design"))
(BuildFileAddedOrDeleted "x")
(CompileFileAddedOrDeleted "x")
(ANNOTATE_Scope "0")
(ANNOTATE_Mode "1")
(ANNOTATE_Action "0")
(Annotate_Page_Order "0")
(ANNOTATE_Reset_References_to_1 "FALSE")
(ANNOTATE_No_Page_Number_Change "FALSE")
(ANNOTATE_Property_Combine "{Value}{Source Package}{POWER_GROUP}")
(ANNOTATE_IncludeNonPrimitive "FALSE")
(ANNOTATE_Refdes_Control_Required "FALSE")
(Annotate_type "Default")
(width_pages "100")
(width_start "80")
(width_End "80"))
(Folder "Outputs")
(Folder "Referenced Projects")
(PartMRUSelector
(PAX_TITLEBLOCKX
(LibraryName "X:\CIS\LIBRARIES\PAX_TITLEBLOCK.OLB")
(DeviceIndex "0"))
(Resistor
(FullPartName "Resistor.Normal")
(LibraryName "X:\CIS\LIBRARIES\PE_PASSIVE.OLB")
(DeviceIndex "0"))
(Zener
(FullPartName "Zener.Normal")
(LibraryName "X:\CIS\LIBRARIES\PE_DISCRETE.OLB")
(DeviceIndex "0"))
(Capacitor
(FullPartName "Capacitor.Normal")
(LibraryName "X:\CIS\LIBRARIES\PE_PASSIVE.OLB")
(DeviceIndex "0"))
(VCC_ARROW
(LibraryName "C:\ORCAD\ORCAD_16.2\TOOLS\CAPTURE\LIBRARY\CAPSYM.OLB")
(DeviceIndex "0"))
(GND_SIGNAL
(LibraryName "C:\ORCAD\ORCAD_16.2\TOOLS\CAPTURE\LIBRARY\CAPSYM.OLB")
(DeviceIndex "0"))
("Connector 4+2GND"
(FullPartName "Connector 4+2GND.Normal")
(LibraryName "X:\CIS\LIBRARIES\PE_CONNECTOR.OLB")
(DeviceIndex "0"))
(USB1T11
(FullPartName "USB1T11.Normal")
(LibraryName "X:\CIS\LIBRARIES\AKRELIB.OLB")
(DeviceIndex "0")))
(LastUsedLibraryBrowseDirectory "X:\CIS\Libraries")
(GlobalState
(FileView
(Path "Design Resources")
(Path "Design Resources" ".\usbif.dsn")
(Path "Design Resources" ".\usbif.dsn" "Design Cache")
(Select "Design Resources" ".\usbif.dsn"))
(HierarchyView)
(Doc
(Type "COrCapturePMDoc")
(Frame
(Placement "44 0 1 -1 -1 -4 -23 0 200 0 253"))
(Tab 0))
(Doc
(Type "COrSchematicDoc")
(Frame
(Placement "44 2 3 -1 -1 -4 -23 22 1051 22 302")
(Scroll "-192 -7")
(Zoom "65")
(Occurrence "/"))
(Path "C:\AKRE\USBTEST\USBIF.DSN")
(Schematic "SCHEMATIC1")
(Page "PAGE1"))))
/opb_usblite/trunk/schematic/usbif.pdf
0,0 → 1,83
%PDF-1.3
 
1 0 obj
<</Type/Pages/Count 1/Kids[4 0 R]>>
endobj
2 0 obj
<</Type/Catalog/Pages 1 0 R>>
endobj
3 0 obj
<</Title (usbif.opj)/Creator (Win2PDF 3.30 http://www.win2pdf.com)/Author (arehnman)/CreationDate (D:20100606141639-22'00')/Producer (PDFlib 3.03 \(Win32\))>>
endobj
4 0 obj
<</Type/Page/Parent 1 0 R/Resources 9 0 R/MediaBox[0 0 841.88 595.27]/Contents[5 0 R]>>
endobj
5 0 obj
<</Length 4569/Filter/FlateDecode>>
stream
 
 
+\FSQI==%eCmy="W)cQz +Vh7P\ؑ\t J>,,1h&Ц +%,B -<"`\\ +pmJ2%""`^UxSm[K&:<ٚ읣r7ɞ|_ZQž'@\4bvϸlL]DaLP[р`4/_62(=At Dr +5cU} +2\̔g3SHbF?c.vX>V=?mS $tXf ",k3f6s'4IˋIc\ʬʖ!jW{ +HVD#Zb"‰UM(0d!I+ +S@R8\p1(׃iXJb0f4}[W&^y'cLߎ広St1ℓK +qUG7q:( ‰ +g]Դ׍!W) #_0ԉht7*[i;B +tR +zR=}=pOprB:cNq'~֡̓~l''NW 8:ϯהRsJ,[@\\̗j,zYԘDQ8KB\,>/.Sz'ж/A6*\\$!{bdl>]]ݜ-P.JH֕2Nf]c=Y%%秿GVJ$‚۶OcMksSSϞg7G&hSQxmGW'ϧUs|~qq=^8X\,ϧ qU`|]Â>zr +Ta:t{'+ZNig +, ch 6&tk9H[Hb*qS`bqF3>:8Sz:hj +tktozDbnfۓx)[t +Z&?W29zM#vpʔv0+@Á|4]i!a&{lW?<;zj%)t)Z9Mh˫{$3c S +ڼ'Dgvo FsxU~BJVq3#?ѓHU; iըFg>9|A +}\u3Fm9li3t%+ƭh,f]+71HzlQϋ׵1t: n1{UC3`6=k:i]h"-1,U6MN8 +D J'L:|D*m񪀷Mbr-C,eѐR+>> +endobj +8 0 obj +<> +endobj +9 0 obj +<>>> +endobj +xref +0 10 +0000000000 65535 f +0000000015 00000 n +0000000066 00000 n +0000000111 00000 n +0000000285 00000 n +0000000388 00000 n +0000000000 65535 f +0000005025 00000 n +0000005113 00000 n +0000005206 00000 n +trailer +<> +startxref +5272 +%%EOF
/opb_usblite/trunk/schematic/USBIF.DSN Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
/opb_usblite/trunk/schematic/USBIF.DSN
opb_usblite/trunk/schematic/USBIF.DSN Property changes : Added: svn:mime-type ## -0,0 +1 ## +application/octet-stream \ No newline at end of property Index: opb_usblite/trunk/pcores/opb_usblite_v1_00_a/hdl/vhdl/opb_usblite_core.vhd =================================================================== --- opb_usblite/trunk/pcores/opb_usblite_v1_00_a/hdl/vhdl/opb_usblite_core.vhd (revision 4) +++ opb_usblite/trunk/pcores/opb_usblite_v1_00_a/hdl/vhdl/opb_usblite_core.vhd (revision 5) @@ -187,6 +187,14 @@ constant STATUS_REG_ADR : std_logic_vector(0 to 1) := "10"; constant CTRL_REG_ADR : std_logic_vector(0 to 1) := "11"; + -- ADDRESS MAP + -- =========== + -- RX FIFO base + $0 + -- TX FIFO base + $4 + -- CONTROL REG base + $8 + -- STATUS REG base + $C + + -- Read Only signal status_Reg : std_logic_vector(7 downto 0); -- bit 0 rx_Data_Present @@ -194,15 +202,18 @@ -- bit 2 tx_Buffer_Empty -- bit 3 tx_Buffer_Full -- bit 4 interrupt flag + -- bit 5 not used + -- bit 6 online flag + -- bit 7 suspend flag -- Write Only - -- bit 0 Reset_TX_FIFO - -- bit 1 Reset_RX_FIFO + -- bit 0 Reset_TX_FIFO -- not used + -- bit 1 Reset_RX_FIFO -- not used -- bit 2-3 Dont'Care -- bit 4 enable_rxinterrupts -- bit 5 Dont'Care -- bit 6 enable_txinterrupts - -- bit 7 tx_enable + -- bit 7 tx_enable -- not used signal enable_txinterrupts : std_logic; signal enable_rxinterrupts : std_logic; @@ -360,8 +371,6 @@ status_Reg(5) <= '0'; status_Reg(6) <= online; status_Reg(7) <= suspend; --- status_Reg(6) <= '0'; --- status_Reg(7) <= '0'; -----------------------------------------------------------------------------
/opb_usblite/trunk/pcores/opb_usblite_v1_00_a/hdl/vhdl/opb_usblite.vhd
29,14 → 29,14
C_OPB_DWIDTH : integer := 32;
C_BASEADDR : std_logic_vector(0 to 31) := X"FFFF_0000";
C_HIGHADDR : std_logic_vector := X"FFFF_00FF";
C_SYSRST : std_logic := '1';
C_PHYMODE : std_logic := '1';
C_VENDORID : std_logic_vector(15 downto 0) := X"1234";
C_PRODUCTID : std_logic_vector(15 downto 0) := X"5678";
C_VERSIONBCD : std_logic_vector(15 downto 0) := X"0200";
C_SELFPOWERED : boolean := false;
C_RXBUFSIZE_BITS: integer range 7 to 12 := 10;
C_TXBUFSIZE_BITS: integer range 7 to 12 := 10
C_SYSRST : std_logic := '1'; -- enable external reset
C_PHYMODE : std_logic := '1'; -- phy mode
C_VENDORID : std_logic_vector(15 downto 0) := X"1234"; -- VID
C_PRODUCTID : std_logic_vector(15 downto 0) := X"5678"; -- PID
C_VERSIONBCD : std_logic_vector(15 downto 0) := X"0200"; -- device version
C_SELFPOWERED : boolean := false; -- self or bus powered
C_RXBUFSIZE_BITS: integer range 7 to 12 := 10; -- size of rx buf (2^10 = 1024 bytes)
C_TXBUFSIZE_BITS: integer range 7 to 12 := 10 -- size of tx buf (2^10 = 1024 bytes)
);
port (
-- Global signals
61,12 → 61,12
Interrupt : out std_logic;
 
-- USB signals
txdp : out std_logic;
txdn : out std_logic;
txoe : out std_logic;
rxd : in std_logic;
rxdp : in std_logic;
rxdn : in std_logic
txdp : out std_logic; -- connect to VPO
txdn : out std_logic; -- connect to VMO/FSEO
txoe : out std_logic; -- connect to OE
rxd : in std_logic; -- connect to RCV
rxdp : in std_logic; -- connect to VP
rxdn : in std_logic -- connect to VM
);
 
end entity OPB_USBLITE;

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