URL
https://opencores.org/ocsvn/raytrac/raytrac/trunk
Subversion Repositories raytrac
Compare Revisions
- This comparison shows the changes necessary to convert path
/raytrac
- from Rev 159 to Rev 160
- ↔ Reverse comparison
Rev 159 → Rev 160
/branches/fp/fadd32.vhd
43,7 → 43,7
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signal s1zero,s7sign : std_logic; |
--!TBXSTART:STAGE5 |
--!TXBXSTART:STAGE5 |
signal s5token : std_logic_vector(2 downto 0); |
signal s5tokena,s5tokenb,s5tokenc : std_logic; |
--!TBXEND |
/branches/fp/raytrac.vhd
81,15 → 81,15
signal s_normfifo_q : std_logic_vector (3*32-1 downto 0); |
signal s_dpfifo_q : std_logic_vector (2*32-1 downto 0); |
--!TBXEND |
--!TBXSTART:SQR32 |
--!TXBXSTART:SQR32 |
--!Señales de Bloque de Raíz Cuadrada a DPC |
signal s_sq32 : std_logic_vector (31 downto 0); |
--!TBXEND |
--!TBXSTART:INV32 |
--!TXBXSTART:INV32 |
--!Señales del bloque inversor a DPC. |
signal s_qout32 : std_logic_vector (31 downto 0); |
--!TBXEND |
--!TBXSTART:DPC |
--!TXBXSTART:DPC |
--! Señales de DataPathControl -> State Machine |
signal s_full_r : std_logic; |
--! Señales de DPC a sqrt32. |
/branches/fp/arithpack.vhd
359,38 → 359,87
function ap_slv_calc_xyvec (x,y:integer; cam:apCamera) return v3f; |
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--! Función que devuelve una cadena con el número flotante IEEE 754 ó a una cadena de cifras hexadecimales. |
function ap_slvf2string(sl:std_logic_vector) return string; |
function ap_slv2hex (s:std_logic_vector) return string; |
procedure ap_slvf2string(l:inout line;sl:std_logic_vector); |
procedure ap_slv2hex (l:inout line;h:in std_logic_vector) ; |
--! Función que devuelve una cadena con el estado de macState. |
function ap_macState2string(s:macState) return string; |
procedure ap_macState2string(l:inout line;s:in macState); |
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--! Función que devuelve la cadena de caracteres de 8 datos en punto flotante IEEE 754. |
function ap_vblk082string(v8:vectorblock08) return string; |
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--! Función que devuelve la cadena de caracteres de 12 datos en punto flotante IEEE 754. |
function ap_vblk122string(v12:vectorblock12) return string; |
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--! Función que convierte un array de 2 std_logic_vectors que contienen un par de direcciones en string |
function ap_vnadd022string(va2:vectorblockadd02) return string; |
procedure ap_vnadd022string(l:inout line; va2:in vectorblockadd02); |
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--! Función que devuelve una cadena de caracteres con el estado de la maquina de estados que controla las interrupciones |
function ap_iCtrlState2string(i:iCtrlState) return string; |
procedure ap_iCtrlState2string(l:inout line;i:in iCtrlState) ; |
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--! Función que devuelve una cadena con los componentes de un vector R3 en punto flotante IEEE754 |
function ap_v3f2string(v:v3f) return string; |
procedure ap_v3f2string(l:inout line;v:in v3f); |
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--! Función que formatea una instrucción |
function ap_format_instruction(i:string;ac_o,bd_o,ac_f,bd_f:std_logic_vector;comb:std_logic) return std_logic_vector; |
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--! Función que devuelve una cadena de caracteres de un solo caracter con el valor de un bit std_logic |
function ap_sl2string(s:std_logic) return string; |
procedure ap_sl2string(l:inout line;s:std_logic); |
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--! Procedure |
procedure ap_xfp122string(l:inout line;vb12:in vectorblock12); |
procedure ap_xfp082string(l:inout line;vb08:in vectorblock08); |
procedure ap_xfp062string(l:inout line;vb06:in vectorblock06); |
procedure ap_xfp042string(l:inout line;vb04:in vectorblock04); |
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end package; |
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package body arithpack is |
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procedure ap_xfp122string(l:inout line; vb12:in vectorblock12) is |
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function ap_sl2string(s:std_logic) return string is |
begin |
write(l,string'("<< ")); |
for i in 11 downto 0 loop |
write(l,string'(integer'image(i))); |
write(l,string'(" ")); |
ap_slvf2string(l,vb12(i)); |
end loop; |
write(l,string'(" >>")); |
end procedure; |
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procedure ap_xfp082string(l:inout line; vb08:in vectorblock08) is |
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begin |
write(l,string'("<< ")); |
for i in 07 downto 0 loop |
write(l,string'(" ["&integer'image(i)&"]")); |
write(l,string'(" ")); |
ap_slvf2string(l,vb08(i)); |
end loop; |
write(l,string'(" >>")); |
end procedure; |
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procedure ap_xfp062string(l:inout line; vb06:in vectorblock06) is |
|
begin |
write(l,string'("<< ")); |
for i in 05 downto 0 loop |
write(l,string'(integer'image(i))); |
write(l,string'(" ")); |
ap_slvf2string(l,vb06(i)); |
end loop; |
write(l,string'(" >>")); |
end procedure; |
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procedure ap_xfp042string(l:inout line; vb04:in vectorblock04) is |
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begin |
write(l,string'("<< ")); |
for i in 03 downto 0 loop |
write(l,string'(integer'image(i))); |
write(l,string'(" ")); |
ap_slvf2string(l,vb04(i)); |
end loop; |
write(l,string'(" >>")); |
end procedure; |
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procedure ap_sl2string(l:inout line; s:in std_logic)is |
variable tmp:string(1 to 1); |
begin |
|
414,9 → 463,13
when others => |
tmp:="-"; -- Don't care |
end case; |
write(l,string'("<< ")); |
write(l,string'(tmp)); |
write(l,string'(" >>")); |
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return tmp; |
end function; |
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end procedure; |
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function ap_format_instruction(i:string;ac_o,bd_o,ac_f,bd_f:std_logic_vector;comb:std_logic) return std_logic_vector is |
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431,25 → 484,25
case it is |
when "mag" => |
ins(31 downto 29) := "100"; |
ins(04 downto 00) := x"18"; |
ins(04 downto 00) := '1'&x"8"; |
when "nrm" => |
ins(31 downto 29) := "101"; |
ins(04 downto 00) := x"1d"; |
ins(04 downto 00) := '1'&x"d"; |
when "add" => |
ins(31 downto 29) := "001"; |
ins(04 downto 00) := x"0a"; |
ins(04 downto 00) := '0'&x"a"; |
when "sub" => |
ins(31 downto 29) := "011"; |
ins(04 downto 00) := x"0a"; |
ins(04 downto 00) := '0'&x"a"; |
when "dot" => |
ins(31 downto 29) := "000"; |
ins(04 downto 00) := x"17"; |
ins(04 downto 00) := '1'&x"7"; |
when "crs" => |
ins(31 downto 29) := "010"; |
ins(04 downto 00) := x"0e"; |
ins(04 downto 00) := '0'&x"e"; |
when others => |
ins(31 downto 29) := "111"; |
ins(04 downto 00) := x"05"; |
ins(04 downto 00) := '0'&x"5"; |
end case; |
ins(28 downto 24) := aco; |
ins(23 downto 19) := acf; |
464,19 → 517,24
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function ap_v3f2string(v:v3f) return string is |
variable tmp:string (1 to 1024); |
procedure ap_v3f2string(l:inout line;v:in v3f) is |
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begin |
tmp:="[X]"&ap_slvf2string(v(0))&"[Y]"&ap_slvf2string(v(1))&"[Z]"&ap_slvf2string(v(2)); |
return tmp; |
end function; |
write(l,string'("<< ")); |
for i in 02 downto 0 loop |
write(l,string'(integer'image(i))); |
write(l,string'(" ")); |
ap_slvf2string(l,v(i)); |
end loop; |
write(l,string'(" >>")); |
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function ap_iCtrlState2string(i:iCtrlState) return string is |
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end procedure; |
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procedure ap_iCtrlState2string(l:inout line;i:in iCtrlState) is |
variable tmp:string (1 to 9); |
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begin |
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write(l,string'("<< ")); |
case i is |
when WAITING_FOR_AN_EVENT => |
tmp:="WAIT_EVNT"; |
487,54 → 545,27
when others => |
tmp:="ILGL__VAL"; |
end case; |
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return tmp; |
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end function; |
write(l,string'(tmp)); |
write(l,string'(" >>")); |
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function ap_vnadd022string(va2:vectorblockadd02) return string is |
variable tmp:string (1 to 1024); |
begin |
tmp:="[01]"&ap_slv2hex(va2(1))&" [00]"&ap_slv2hex(va2(0)); |
return tmp; |
end function; |
end procedure; |
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function ap_vblk122string(v12:vectorblock12) return string is |
variable tmp:string (1 to 1024); |
procedure ap_vnadd022string(l:inout line;va2:in vectorblockadd02) is |
begin |
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write(l,string'("<<[1] ")); |
ap_slv2hex(l,va2(1)); |
write(l,string'(" [0] ")); |
ap_slv2hex(l,va2(0)); |
write(l,string'(" >>")); |
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end procedure; |
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tmp:="["&integer'image(11)&"]"; |
for i in 11 downto 0 loop |
tmp:=tmp&ap_slvf2string(v12(i)); |
if i>0 then |
tmp:=tmp&"["&integer'image(i)&"]"; |
end if; |
end loop; |
return tmp; |
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end function; |
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function ap_vblk082string(v8:vectorblock08) return string is |
variable tmp:string (1 to 1024); |
begin |
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tmp:="["&integer'image(7)&"]"; |
for i in 7 downto 0 loop |
tmp:=tmp&ap_slvf2string(v8(i)); |
if i>0 then |
tmp:=tmp&"["&integer'image(i)&"]"; |
end if; |
end loop; |
return tmp; |
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end function; |
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function ap_macState2string(s:macState) return string is |
procedure ap_macState2string(l:inout line;s:in macState) is |
variable tmp:string (1 to 6); |
begin |
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write(l,string'("<< ")); |
case s is |
when LOAD_INSTRUCTION => |
tmp:="LD_INS"; |
545,21 → 576,40
when others => |
tmp:="HEL_ON"; |
end case; |
return tmp; |
end function; |
write(l,string'(tmp)); |
write(l,string'(" >>")); |
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end procedure; |
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constant hexchars : string (1 to 16) := "0123456789ABCDEF"; |
function ap_slv2hex (s:std_logic_vector) return string is |
variable x64 : std_logic_vector(63 downto 0):=x"0000000000000000"; |
variable str : string (1 to 16); |
begin |
x64(s'high downto s'low):=s; |
for i in 15 downto 0 loop |
str(i+1):=hexchars(1+ieee.std_logic_unsigned.conv_integer(x64(i*4+3 downto i*4))); |
procedure ap_slv2hex (l:inout line;h:in std_logic_vector) is |
variable index_high,index_low,highone,nc : integer; |
begin |
highone := h'high-h'low; |
nc:=0; |
for i in h'high downto h'low loop |
if h(i)/='0' and h(i)/='1' then |
nc:=1; |
end if; |
end loop; |
return str; |
end function; |
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if nc=1 then |
for i in h'high downto h'low loop |
ap_sl2string(l,h(i)); |
end loop; |
else |
for i in (highone)/4 downto 0 loop |
index_low:=i*4; |
if (index_low+3)>highone then |
index_high := highone; |
else |
index_high := i*4+3; |
end if; |
write(l,hexchars(1+ieee.std_logic_unsigned.conv_integer(h(index_high+h'low downto index_low+h'low)))); |
end loop; |
end if; |
end procedure; |
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function ap_slv2int (sl:std_logic_vector) return integer is |
alias s : std_logic_vector (sl'high downto sl'low) is sl; |
variable i : integer; |
582,18 → 632,20
--! Signo |
if (f<0.0) then |
sef(31) := '1'; |
faux:=f*(-1.0); |
else |
sef(31) := '0'; |
faux:=f; |
end if; |
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--! Exponente |
sef(30 downto 23) := conv_std_logic_vector(integer(floor(log(f,2.0))),8); |
sef(30 downto 23) := conv_std_logic_vector(127+integer(floor(log(faux,2.0))),8); |
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--! Fraction |
faux :=f/floor(log(f,2.0)); |
faux :=faux/(2.0**real(floor(log(faux,2.0)))); |
faux := faux - 1.0; |
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sef(22 downto 0) := conv_std_logic_vector(integer(faux),23); |
sef(22 downto 0) := conv_std_logic_vector(integer(faux*(2.0**23.0)),23); |
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return sef; |
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600,15 → 652,15
end function; |
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function ap_slv2fp(sl:std_logic_vector) return real is |
variable expo,frc:integer; |
variable frc:integer; |
alias s: std_logic_vector(31 downto 0) is sl; |
variable f: real; |
variable f,expo: real; |
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begin |
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expo:=ap_slv2int(s(30 downto 23)) - 127; |
expo:=2**expo; |
expo:=real(ap_slv2int(s(30 downto 23)) - 127); |
expo:=(2.0)**(expo); |
frc:=ap_slv2int('1'&s(22 downto 0)); |
f:=real(frc)*(2.0**(-23.0)); |
f:=f*real(expo); |
617,9 → 669,11
return -f; |
else |
return f; |
end if; |
end if; |
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end function; |
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function ap_slv_calc_xyvec (x,y:integer; cam:apCamera) return v3f is |
632,20 → 686,20
dx := cam.width/real(cam.resx); |
dy := cam.height/real(cam.resy); |
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--! Eje X: Tomando el dedo índice de la mano derecha, este eje queda apuntando en la direcci&on en la que mira la cámara u observador siempre. |
--! Eje Z: Tomando el dedo índice de la mano derecha, este eje queda apuntando en la direcci&on en la que mira la cámara u observador siempre. |
v(0):=ap_fp2slv(cam.dist); |
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--! Eje Y: Tomando el dedo corazón de la mano derecha, este eje queda apuntando a la izquierda del observador, desde el observador. |
v(1):=ap_fp2slv(dx*real(cam.resx)*0.5-dx*0.5); |
--! Eje X: Tomando el dedo corazón de la mano derecha, este eje queda apuntando a la izquierda del observador, desde el observador. |
v(2):=ap_fp2slv(dx*real(cam.resx)*0.5-real(x)*dx-dx*0.5); |
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--! Eje Z: Tomando el dedo pulgar de la mano derecha, este eje queda apuntando hacia arriba del observador, desde el observador. |
v(2):=ap_fp2slv(dy*real(cam.resy)*0.5-dy*0.5); |
--! Eje Y: Tomando el dedo pulgar de la mano derecha, este eje queda apuntando hacia arriba del observador, desde el observador. |
v(1):=ap_fp2slv(dy*real(cam.resy)*0.5-real(y)*dy-dy*0.5); |
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return v; |
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end function; |
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function ap_slvf2string(sl:std_logic_vector) return string is |
procedure ap_slvf2string(l:inout line;sl:std_logic_vector) is |
alias f: std_logic_vector(31 downto 0) is sl; |
variable r: real; |
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652,9 → 706,16
begin |
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r:=ap_slv2fp(f); |
return real'image(r); |
write(l,string'(real'image(r))); |
write(l,string'(" [ s:")); |
ap_slv2hex(l,f(31 downto 31)); |
write(l,string'(" f: ")); |
ap_slv2hex(l,f(30 downto 23)); |
write(l,string'(" m: ")); |
ap_slv2hex(l,f(22 downto 00)); |
write(l,string'(" ]")); |
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end function; |
end procedure; |
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/branches/fp/dpc.vhd
82,8 → 82,11
signal snormfifo_q,snormfifo_d : vectorblock03; |
signal sdpfifo_q : vectorblock02; |
signal ssqr32blk,sinv32blk : std_logic_vector(floatwidth-1 downto 0); |
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--!TBXSTART:SYNC_CHAIN |
signal ssync_chain : std_logic_vector(28 downto 0); |
signal ssync_chain_d : std_logic; |
--!TBXEND |
signal sres567w,sres123w,sres2w : std_logic; |
signal sres0w,sres4w : std_logic; |
signal sres567f,sres123f : std_logic; --! Entradas de la señal de full de las colas de resultados. |
/branches/fp/fmul32.vhd
43,7 → 43,7
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--Stage 0 signals |
signal s0dataa_alfa,s0dataa_beta,s0dataa_gama,s0datab : std_logic_vector(17 downto 0); |
--!TBXSTART:MULT_STAGE0 |
--!TXBXSTART:MULT_STAGE0 |
signal s0sga,s0sgb,s0zrs : std_logic; |
signal s0exp : std_logic_vector(7 downto 0); |
signal s0uma,s0umb : std_logic_vector(22 downto 0); |
/branches/fp/rt_tb.vhd
18,9 → 18,9
signal sadd : std_logic_vector(12 downto 0); |
--!TBXEND |
--!TBXSTART:DATA_BUS |
signal sd,sq : std_logic_vector(31 downto 0); |
signal sd,sq : xfloat32; |
--!TBXEND |
--!TBXSTART:INT_BUS |
--!TXBXSTART:INT_BUS |
signal sint : std_logic_vector(7 downto 0); |
--!TBXEND |
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33,6 → 33,7
srst <= rstMasterValue; |
wait for 52 ns; |
srst <= not(rstMasterValue); |
wait; |
end process reset_p; |
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116,7 → 117,7
swr <= '1'; |
--! La dirección por defecto para escribir en la cola de instrucciones es 0x0600 |
-- add <= "0 0110 0000 0000"; |
sadd <= x"0600"; |
sadd <= '0'&x"600"; |
sd <= ap_format_instruction(string'("nrm"),"00000","01111","00000","00000",'0'); |
count:=count+1; |
else |
139,7 → 140,7
write(l,string'("#This file is automatically generated by tb_compiler script, by Julian Andres Guarin Reyes")); |
writeline(f,l); |
wait for 5 ns; |
wait until srst=not(rstMasterValue); |
--wait until srst=not(rstMasterValue); |
wait until sclk='1'; |
wait for tclk_2+tclk_4; |
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146,7 → 147,9
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--! from here on, tb_compiler writes the data to be displayed |
--! tb_compiler: the following line MUST go here |
--!TBXDISPTOPLINE |
disp_loop:loop |
--! tb_compiler: the following line MUST go here |
--!TBXDISPLAYOPERATION |
wait for tclk; |
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/branches/fp/memblock.vhd
71,7 → 71,7
--! Señal de soporte |
signal s0ext_wr_add_choice : std_logic_vector(3 downto 0); |
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--!TBXSTART:MEMBLOCK_EXTERNAL_READ |
--!TXBXSTART:MEMBLOCK_EXTERNAL_READ |
signal s0ext_rd_add : std_logic_vector(2 downto 0); |
signal s0ext_rd : std_logic; |
signal s0ext_rd_ack : std_logic_vector(8-1 downto 0); |
87,7 → 87,7
signal s1int_q : vectorblock12; |
--!TBXEND |
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--!TBXSTART:MEMBLOCK_INTERNAL_WRITE |
--!TXBXSTART:MEMBLOCK_INTERNAL_WRITE |
signal sint_d : vectorblock08; |
signal sresultfifo_full : std_logic_vector(7 downto 0); |
--!TBXEND |
159,7 → 159,7
lpm_hint => "RAM_BLOCK_TYPE=M9K", |
almost_full_value => 32, |
lpm_numwords => 32, |
lpm_showahead => "OFF", |
lpm_showahead => "ON", |
lpm_type => "SCIFIFO", |
lpm_width => 32, |
lpm_widthu => 5, |