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URL https://opencores.org/ocsvn/t6507lp/t6507lp/trunk

Subversion Repositories t6507lp

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    from Rev 51 to Rev 52
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Rev 51 → Rev 52

/t6507lp/trunk/rtl/verilog/T6507LP_FSM.v
79,7 → 79,7
localparam READ = 1'b0;
localparam WRITE = 1'b1;
 
reg [12:0] pc, next_pc; // program counter
reg [12:0] pc; // program counter
reg [7:0] sp; // stack pointer
reg [7:0] ir; // instruction register
reg [12:0] temp_add; // temporary address
102,6 → 102,10
reg read_modify_write;
reg write;
reg jump;
 
wire next_pc;
 
assign next_pc = pc + 1'b1;
always @ (posedge clk_in or negedge n_rst_in) begin
if (n_rst_in == 1'b0) begin
305,9 → 309,9
end
 
// always block to perform the pc advance
always @ (pc) begin
next_pc = pc + 1'b1;
end
//always @ (pc) begin
// next_pc <= pc + 1'b1;
//end
 
// this always block is responsible for updating the address mode
always @ (*) begin // TODO: the sensitivity may not be correct

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