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URL https://opencores.org/ocsvn/t6507lp/t6507lp/trunk

Subversion Repositories t6507lp

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /t6507lp/trunk/syn/cadence/reports
    from Rev 245 to Rev 263
    Reverse comparison

Rev 245 → Rev 263

/RC_timing.txt
0,0 → 1,88
============================================================
Generated by: Encounter(R) RTL Compiler v07.20-s009_1
Generated on: Aug 31 2009 10:49:06 AM
Module: t6507lp_io
Technology libraries: D_CELLSL_3_3V V 4.0.2
IO_CELLS_33 V 4.0.1
physical_cells
Operating conditions: TYPICAL
Interconnect mode: ple2
Area mode: physical library
============================================================
 
Pin Type Fanout Load Slew Delay Arrival
(fF) (ps) (ps) (ps)
----------------------------------------------------------------
(clock 1MHz) launch 0 R
t6507lp
t6507lp_fsm
ir_reg[0]/C 1 0 R
ir_reg[0]/Q SDFRRAQLX1 10 223.3 3230 +3769 3769 R
g29294/A +0 3769
g29294/Q INLX1 8 194.7 3142 +2306 6075 F
g29214/A +0 6075
g29214/Q NA2LX1 7 176.3 4067 +2625 8700 R
g29213/A +0 8700
g29213/Q INLX1 5 116.0 2378 +1847 10547 F
g29121/A +0 10547
g29121/Q OA211LX1 1 26.2 683 +1313 11860 F
g29050/A +0 11860
g29050/Q ON22LX1 1 22.2 1386 +466 12326 R
g28932/B +0 12326
g28932/Q NO4LX1 11 258.6 4259 +2632 14958 F
g28899/A +0 14958
g28899/Q ON21LX1 8 179.5 4128 +2689 17647 R
g28839/D +0 17647
g28839/Q AO222LX1 14 351.6 7527 +4885 22532 R
t6507lp_fsm/alu_a[1]
t6507lp_alu/alu_a[1]
g22238/B +0 22532
g22238/S HAALX1 2 54.9 1459 +3388 25920 R
g22237/A +0 25920
g22237/Q INLX1 3 80.1 1380 +1020 26940 F
g22163/B +0 26940
g22163/Q EO2LX1 1 25.6 810 +1181 28121 F
g22043/A +0 28121
g22043/CO HAALX1 1 24.3 600 +1156 29276 F
g21977/B +0 29276
g21977/S HAALX1 3 71.7 1697 +2126 31402 R
g21958/B +0 31402
g21958/Q NO2LX1 4 98.9 1901 +1277 32679 F
g21905/AN +0 32679
g21905/Q NA2I1LX1 1 19.0 641 +1104 33783 F
g21879/AN +0 33784
g21879/Q NO2I1LX1 2 43.8 1074 +1212 34995 F
g21870/B +0 34995
g21870/Q NO2I1LX1 1 25.6 889 +484 35479 R
g21843/A +0 35479
g21843/CO HAALX1 1 25.6 833 +1070 36549 R
g21819/A +0 36550
g21819/S HAALX1 2 38.8 1046 +1759 38308 R
g21807/A +0 38308
g21807/Q OR2LX1 4 99.7 2236 +1445 39754 R
g21802/A +0 39754
g21802/Q AO21LX1 3 62.1 1512 +1304 41058 R
g21797/A +0 41058
g21797/Q NA2LX1 4 83.9 1723 +853 41911 F
g21793/AN +0 41911
g21793/Q NA2I1LX1 1 17.7 590 +1049 42960 F
g21791/A +0 42961
g21791/Q AND2LX1 1 19.9 534 +803 43764 F
g21788/A +0 43764
g21788/Q NA2LX1 1 18.5 699 +391 44155 R
g21785/A +0 44155
g21785/Q AND8LX1 1 26.1 849 +697 44852 R
g21783/A +0 44853
g21783/Q ON21LX1 4 79.3 1405 +719 45571 F
g11942/A +0 45572
g11942/Q NA2LX1 1 19.9 963 +586 46158 R
g11910/A +0 46158
g11910/Q NA2LX1 1 19.5 507 +264 46422 F
A_reg[5]/D SDFRRAQLX1 +0 46422
A_reg[5]/C setup 1 +1437 47859 R
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
(clock 1MHz) capture 1000000 R
----------------------------------------------------------------
Timing slack : 952141ps
Start-point : t6507lp/t6507lp_fsm/ir_reg[0]/C
End-point : t6507lp/t6507lp_alu/A_reg[5]/D
/RC_area.txt
0,0 → 1,36
============================================================
Generated by: Encounter(R) RTL Compiler v07.20-s009_1
Generated on: Aug 31 2009 10:49:06 AM
Module: t6507lp_io
Technology libraries: D_CELLSL_3_3V V 4.0.2
IO_CELLS_33 V 4.0.1
physical_cells
Operating conditions: TYPICAL
Interconnect mode: ple2
Area mode: physical library
============================================================
 
Instance Cells Cell Area Net Area
-------------------------------------------------------------
t6507lp_io 1831 3162055 275946
t6507lp 1785 482845 260867
t6507lp_fsm 818 254847 124766
RC_CG_HIER_INST7 2 795 43
RC_CG_HIER_INST6 2 795 43
RC_CG_SHARED_HIER_L1_INST 1 618 0
RC_CG_HIER_INST9 1 618 0
RC_CG_HIER_INST8 1 618 0
RC_CG_HIER_INST5 1 618 0
RC_CG_HIER_INST16 1 618 0
RC_CG_HIER_INST15 1 618 0
RC_CG_HIER_INST14 1 618 0
RC_CG_HIER_INST13 1 618 0
RC_CG_HIER_INST12 1 618 0
RC_CG_HIER_INST11 1 618 0
RC_CG_HIER_INST10 1 618 0
t6507lp_alu 966 227689 111874
RC_CG_HIER_INST4 1 618 0
RC_CG_HIER_INST3 1 618 0
RC_CG_HIER_INST2 1 618 0
RC_CG_HIER_INST1 1 618 0
RC_CG_HIER_INST0 1 618 0
/RC_power.txt
0,0 → 1,38
============================================================
Generated by: Encounter(R) RTL Compiler v07.20-s009_1
Generated on: Aug 31 2009 10:49:06 AM
Module: t6507lp_io
Technology libraries: D_CELLSL_3_3V V 4.0.2
IO_CELLS_33 V 4.0.1
physical_cells
Operating conditions: TYPICAL
Interconnect mode: ple2
Area mode: physical library
============================================================
 
Leakage Dynamic Total
Instance Cells Power(nW) Power(nW) Power(nW)
------------------------------------------------------------------------
t6507lp_io 1831 0.131 4083016.187 4083016.319
t6507lp 1785 0.131 3392415.152 3392415.283
t6507lp_alu 966 0.067 787487.807 787487.874
RC_CG_HIER_INST0 1 0.000 3828.203 3828.203
RC_CG_HIER_INST1 1 0.000 3828.203 3828.203
RC_CG_HIER_INST2 1 0.000 2574.768 2574.768
RC_CG_HIER_INST3 1 0.000 3828.203 3828.203
RC_CG_HIER_INST4 1 0.000 3828.203 3828.203
t6507lp_fsm 818 0.064 2600968.242 2600968.307
RC_CG_HIER_INST6 2 0.000 6666.629 6666.629
RC_CG_HIER_INST7 2 0.000 3828.203 3828.203
RC_CG_HIER_INST10 1 0.000 3986.346 3986.346
RC_CG_HIER_INST11 1 0.000 3983.118 3983.118
RC_CG_HIER_INST12 1 0.000 4170.772 4170.772
RC_CG_HIER_INST13 1 0.000 3828.203 3828.203
RC_CG_HIER_INST14 1 0.000 3828.203 3828.203
RC_CG_HIER_INST15 1 0.000 3828.203 3828.203
RC_CG_HIER_INST16 1 0.000 3828.203 3828.203
RC_CG_HIER_INST5 1 0.000 3984.961 3984.961
RC_CG_HIER_INST8 1 0.000 3828.203 3828.203
RC_CG_HIER_INST9 1 0.000 3987.149 3987.149
RC_CG_SHARED_HIER_L1_INST 1 0.000 4284.272 4284.272
 

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