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URL https://opencores.org/ocsvn/t6507lp/t6507lp/trunk

Subversion Repositories t6507lp

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  • This comparison shows the changes necessary to convert path 
    /t6507lp
    from Rev 164 to Rev 165
    ↔ Reverse comparison
  •

Rev 164 → Rev 165

/trunk/rtl/verilog/t6507lp_alu.v
124,7 → 124,7
alu_status <= STATUS;
end
CMP_IMM, CMP_ZPG, CMP_ZPX, CMP_ABS, CMP_ABX, CMP_ABY, CMP_IDX, CMP_IDY,
CPX_IMM, CPX_ZPG, CPX_ABS, CPY_IMM, CPY_ZPG, CPY_ABS, PHP_IMP :
CPX_IMM, CPX_ZPG, CPX_ABS, CPY_IMM, CPY_ZPG, CPY_ABS :
begin
alu_status <= STATUS;
end
187,6 → 187,8
alu_result <= result;
alu_status <= STATUS;
end
PHP_IMP : begin
end
default : begin
//$display("ERROR");
end
323,8 → 325,11
// TODO: verify synthesis for % operand
ADC_IMM, ADC_ZPG, ADC_ZPX, ADC_ABS, ADC_ABX, ADC_ABY, ADC_IDX, ADC_IDY : begin
if (alu_status[D] == 1) begin
$display("MODO DECIMAL");
AL = A[3:0] + alu_a[3:0] + alu_status[C];
AH = A[7:4] + alu_a[7:4];
$display("AL = %h", AL);
$display("AH = %h", AH);
if (AL > 9) begin
bcdh = AH + (AL / 10);
bcdl = AL % 10;
333,10 → 338,15
STATUS[C] = 1;
bcdh2 = bcdh % 10;
end
$display("bcdh = %h", bcdh);
$display("bcdl = %h", bcdl);
result = {bcdh2[3:0],bcdl[3:0]};
$display("result = %h", result);
end
else
else begin
$display("MODO NORMAL");
{STATUS[C],result} = op1 + op2 + alu_status[C];
end
if ((op1[7] == op2[7]) && (op1[7] != result[7]))
STATUS[V] = 1;
434,7 → 444,7
result = {bcdh[3:0],bcdl[3:0]};
end
else
{STATUS[C],result} = op1 - op2 - ~alu_status[C];
{STATUS[C],result} = op1 - op2 - ( 1 - alu_status[C]);
if ((op1[7] == op2[7]) && (op1[7] != result[7]))
STATUS[V] = 1;
/trunk/rtl/verilog/t6507lp_alu_tb.v
109,7 → 109,7
alu_status_expected[V] = ((alu_a[7] == sign) && (alu_a[7] != alu_result_expected[7]));
check();
end
 
/*
// BCD
// LDA
alu_a = 0;
156,14 → 156,15
if ( BH > 9 ) begin
BH = BH - 10;
end
{C_in,alu_result_expected_temp[3:0]} = AL + BL + alu_status_expected[C];
{alu_status_expected[C],alu_result_expected_temp[7:4]} = AH + BH + C_in;
if ( alu_result_expected_temp[3:0] > 9 ) begin
alu_result_expected[3:0] = alu_result_expected_temp[3:0] - 10;
alu_result_expected[7:4] = alu_result_expected_temp[7:4] + 1;
{C_in,alu_result_expected[3:0]} = AL + BL + alu_status_expected[C];
{alu_status_expected[C],alu_result_expected[7:4]} = AH + BH + C_in;
if ( alu_result_expected[3:0] > 9 ) begin
alu_result_expected[3:0] = alu_result_expected[3:0] - 10;
alu_result_expected[7:4] = alu_result_expected[7:4] + 1;
end
if ( alu_result_expected_temp[7:4] > 9 ) begin
alu_result_expected[7:4] = alu_result_expected_temp[7:4] - 10;
if ( alu_result_expected[7:4] > 9 ) begin
alu_result_expected[7:4] = alu_result_expected[7:4] - 10;
alu_status_expected[C] = 1;
end
alu_status_expected[Z] = (alu_result_expected == 0) ? 1 : 0;
alu_status_expected[N] = alu_result_expected[7];
170,7 → 171,7
alu_status_expected[V] = ((alu_a[7] == sign) && (alu_a[7] != alu_result_expected[7]));
check();
end
 
*/
// ASL
alu_opcode = ASL_ABS;
238,7 → 239,7
//$display("DUT.A = %h DUT.X = %h DUT.Y = %h", DUT.A, DUT.X, DUT.Y);
//$display("op1 = %d op2 = %d c = %d d = %d n = %d v = %d result = %d", alu_a, DUT.A, alu_status[C], alu_status[D], alu_status[N], alu_status[V], alu_result);
sign = alu_result_expected[7];
{alu_status_expected[C], alu_result_expected} = alu_result_expected - alu_a - ~alu_status_expected[C];
{alu_status_expected[C], alu_result_expected} = alu_result_expected - alu_a - ( 1 - alu_status_expected[C]);
alu_status_expected[Z] = (alu_result_expected == 0) ? 1 : 0;
alu_status_expected[N] = alu_result_expected[7];
alu_status_expected[V] = ((alu_a[7] == sign) && (alu_a[7] != alu_result_expected[7]));

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