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[/] [a-z80/] [trunk/] [cpu/] [control/] [timing_macros.i] - Diff between revs 8 and 13

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Rev 8 Rev 13
Line 321... Line 321...
DI_EI           ctl_iffx_bit=op3; ctl_iffx_we=1;            // DI/EI
DI_EI           ctl_iffx_bit=op3; ctl_iffx_we=1;            // DI/EI
IM              ctl_im_we=1;                                // IM n ('n' is read by opcode[4:3])
IM              ctl_im_we=1;                                // IM n ('n' is read by opcode[4:3])
 
 
WZ=IX+d         ixy_d=1;                                    // Compute WZ=IX+d
WZ=IX+d         ixy_d=1;                                    // Compute WZ=IX+d
IX_IY           ctl_state_ixiy_we=1; ctl_state_iy_set=op5; setIXIY=1;   // IX/IY prefix
IX_IY           ctl_state_ixiy_we=1; ctl_state_iy_set=op5; setIXIY=1;   // IX/IY prefix
CLR_IX_IY       ctl_state_ixiy_we=1; ctl_state_ixiy_clr=~setIXIY;       // Clear IX/IY flag
CLR_IX_IY       ctl_state_ixiy_we=1; ctl_state_ixiy_clr=~setIXIY;       // Clear IX/IY flag if not explicitly set
 
 
CB              ctl_state_tbl_cb_set=1; setCBED=1;          // CB-table prefix
CB              ctl_state_tbl_we=1; ctl_state_tbl_cb_set=1; // CB-table prefix
ED              ctl_state_tbl_ed_set=1; setCBED=1;          // ED-table prefix
ED              ctl_state_tbl_we=1; ctl_state_tbl_ed_set=1; // ED-table prefix
CLR_CB_ED       ctl_state_tbl_clr=~setCBED;                 // Clear CB/ED prefix
CLR_CB_ED       ctl_state_tbl_we=1;                         // Clear CB/ED prefix if not explicitly set
 
 
// If the NF is set, complement HF and CF on the way out to the bus
// If the NF is set, complement HF and CF on the way out to the bus
// This is used to correctly set those flags after subtraction operations
// This is used to correctly set those flags after subtraction operations
?NF_HF_CF       ctl_flags_hf_cpl=flags_nf; ctl_flags_cf_cpl=flags_nf;
?NF_HF_CF       ctl_flags_hf_cpl=flags_nf; ctl_flags_cf_cpl=flags_nf;
?NF_HF          ctl_flags_hf_cpl=flags_nf;
?NF_HF          ctl_flags_hf_cpl=flags_nf;

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