OpenCores
URL https://opencores.org/ocsvn/a-z80/a-z80/trunk

Subversion Repositories a-z80

[/] [a-z80/] [trunk/] [cpu/] [toplevel/] [coremodules.vh] - Diff between revs 14 and 16

Show entire file | Details | Blame | View Log

Rev 14 Rev 16
Line 13... Line 13...
    .hold_clk_iorq (hold_clk_iorq),
    .hold_clk_iorq (hold_clk_iorq),
    .hold_clk_wait (hold_clk_wait),
    .hold_clk_wait (hold_clk_wait),
    .iorq_Tw (iorq_Tw),
    .iorq_Tw (iorq_Tw),
    .busack (busack),
    .busack (busack),
    .pin_control_oe (pin_control_oe),
    .pin_control_oe (pin_control_oe),
    .hold_clk_busrq (hold_clk_busrq)
    .hold_clk_busrq (hold_clk_busrq),
 
    .nhold_clk_wait (nhold_clk_wait)
);
);
 
 
decode_state decode_state_(
decode_state decode_state_(
    .ctl_state_iy_set (ctl_state_iy_set),
    .ctl_state_iy_set (ctl_state_iy_set),
    .ctl_state_ixiy_clr (ctl_state_ixiy_clr),
    .ctl_state_ixiy_clr (ctl_state_ixiy_clr),
Line 31... Line 32...
    .ctl_repeat_we (ctl_repeat_we),
    .ctl_repeat_we (ctl_repeat_we),
    .in_intr (in_intr),
    .in_intr (in_intr),
    .in_nmi (in_nmi),
    .in_nmi (in_nmi),
    .nreset (nreset),
    .nreset (nreset),
    .ctl_state_tbl_we (ctl_state_tbl_we),
    .ctl_state_tbl_we (ctl_state_tbl_we),
    .hold_clk_wait (hold_clk_wait),
    .nhold_clk_wait (nhold_clk_wait),
    .in_halt (in_halt),
    .in_halt (in_halt),
    .table_cb (table_cb),
    .table_cb (table_cb),
    .table_ed (table_ed),
    .table_ed (table_ed),
    .table_xx (table_xx),
    .table_xx (table_xx),
    .use_ix (use_ix),
    .use_ix (use_ix),
Line 199... Line 200...
 
 
ir ir_(
ir ir_(
    .ctl_ir_we (ctl_ir_we),
    .ctl_ir_we (ctl_ir_we),
    .clk (clk),
    .clk (clk),
    .nreset (nreset),
    .nreset (nreset),
    .hold_clk_wait (hold_clk_wait),
    .nhold_clk_wait (nhold_clk_wait),
    .db (db0[7:0]),
    .db (db0[7:0]),
    .opcode (opcode)
    .opcode (opcode)
);
);
 
 
pin_control pin_control_(
pin_control pin_control_(
Line 231... Line 232...
    .reset_in (reset_in),
    .reset_in (reset_in),
    .clk (clk),
    .clk (clk),
    .M1 (M1),
    .M1 (M1),
    .T2 (T2),
    .T2 (T2),
    .fpga_reset (fpga_reset),
    .fpga_reset (fpga_reset),
    .hold_clk_wait (hold_clk_wait),
    .nhold_clk_wait (nhold_clk_wait),
    .clrpc (clrpc),
    .clrpc (clrpc),
    .nreset (nreset)
    .nreset (nreset)
);
);
 
 
memory_ifc memory_ifc_(
memory_ifc memory_ifc_(
Line 249... Line 250...
    .fIOWrite (fIOWrite),
    .fIOWrite (fIOWrite),
    .setM1 (setM1),
    .setM1 (setM1),
    .ctl_iorw (ctl_iorw),
    .ctl_iorw (ctl_iorw),
    .timings_en (timings_en),
    .timings_en (timings_en),
    .iorq_Tw (iorq_Tw),
    .iorq_Tw (iorq_Tw),
    .hold_clk_wait (hold_clk_wait),
    .nhold_clk_wait (nhold_clk_wait),
    .nM1_out (nM1_out),
    .nM1_out (nM1_out),
    .nRFSH_out (nRFSH_out),
    .nRFSH_out (nRFSH_out),
    .nMREQ_out (nMREQ_out),
    .nMREQ_out (nMREQ_out),
    .nRD_out (nRD_out),
    .nRD_out (nRD_out),
    .nWR_out (nWR_out),
    .nWR_out (nWR_out),
Line 389... Line 390...
    .ctl_flags_nf_clr (ctl_flags_nf_clr),
    .ctl_flags_nf_clr (ctl_flags_nf_clr),
    .ctl_alu_zero_16bit (ctl_alu_zero_16bit),
    .ctl_alu_zero_16bit (ctl_alu_zero_16bit),
    .clk (clk),
    .clk (clk),
    .ctl_flags_cf2_sel_shift (ctl_flags_cf2_sel_shift),
    .ctl_flags_cf2_sel_shift (ctl_flags_cf2_sel_shift),
    .ctl_flags_cf2_sel_daa (ctl_flags_cf2_sel_daa),
    .ctl_flags_cf2_sel_daa (ctl_flags_cf2_sel_daa),
    .hold_clk_wait (hold_clk_wait),
    .nhold_clk_wait (nhold_clk_wait),
    .flags_sf (flags_sf),
    .flags_sf (flags_sf),
    .flags_zf (flags_zf),
    .flags_zf (flags_zf),
    .flags_hf (flags_hf),
    .flags_hf (flags_hf),
    .flags_pf (flags_pf),
    .flags_pf (flags_pf),
    .flags_cf (flags_cf),
    .flags_cf (flags_cf),
Line 498... Line 499...
    .ctl_reg_sys_we_lo (ctl_reg_sys_we_lo),
    .ctl_reg_sys_we_lo (ctl_reg_sys_we_lo),
    .ctl_reg_sys_we_hi (ctl_reg_sys_we_hi),
    .ctl_reg_sys_we_hi (ctl_reg_sys_we_hi),
    .ctl_reg_sys_we (ctl_reg_sys_we),
    .ctl_reg_sys_we (ctl_reg_sys_we),
    .clk (clk),
    .clk (clk),
    .ctl_sw_4d (ctl_sw_4d),
    .ctl_sw_4d (ctl_sw_4d),
    .hold_clk_wait (hold_clk_wait),
    .nhold_clk_wait (nhold_clk_wait),
    .ctl_reg_gp_hilo (ctl_reg_gp_hilo),
    .ctl_reg_gp_hilo (ctl_reg_gp_hilo),
    .ctl_reg_gp_sel (ctl_reg_gp_sel),
    .ctl_reg_gp_sel (ctl_reg_gp_sel),
    .ctl_reg_sys_hilo (ctl_reg_sys_hilo),
    .ctl_reg_sys_hilo (ctl_reg_sys_hilo),
    .reg_sel_bc (reg_sel_bc),
    .reg_sel_bc (reg_sel_bc),
    .reg_sel_bc2 (reg_sel_bc2),
    .reg_sel_bc2 (reg_sel_bc2),

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.