| Line 44... |
Line 44... |
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# Directories
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# Directories
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BIN_FOLDER = ../bin
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BIN_FOLDER = ../bin
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LOG_FOLDER = ../logs
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LOG_FOLDER = ../logs
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BITFILE_FOLDER = ../bitfiles
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BITFILE_FOLDER = ../bitfiles
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BOOT_LOADER_ETHMAC = 1
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|
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# Can supply different work directories
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# Can supply different work directories
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# for multiple runs in parallel
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# for multiple runs in parallel
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ifdef WORK
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ifdef WORK
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WORK_FOLDER = ../$(WORK)
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WORK_FOLDER = ../$(WORK)
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else
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else
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WORK_FOLDER = ../work0
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WORK_FOLDER = ../work0
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endif
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endif
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VERILOG_INCLUDE_PATH = ../../vlog/lib ../../../sw/boot-loader
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ifdef BOOT_LOADER_ETHMAC
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|
BOOT_LOADER_DIR = ../../../sw/boot-loader-ethmac
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BOOT_LOADER_DEF = BOOT_LOADER_ETHMAC
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else
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BOOT_LOADER_DIR = ../../../sw/boot-loader
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BOOT_LOADER_DEF =
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endif
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VERILOG_INCLUDE_PATH = ../../vlog/lib $(BOOT_LOADER_DIR)
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# Name of top level verilog file (must be the same as its module name)
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# Name of top level verilog file (must be the same as its module name)
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RTL_TOP = system
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RTL_TOP = system
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|
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| Line 83... |
Line 92... |
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## FPGA type
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## FPGA type
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ifdef VIRTEX6
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ifdef VIRTEX6
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# Virtex-6 device
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# Virtex-6 device
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XILINX_FPGA = xc6vlx75tff784-3
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XILINX_FPGA = xc6vlx75tff784-3
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XST_DEFINES = XILINX_FPGA XILINX_VIRTEX6_FPGA $(AMBER_CORE) AMBER_CLK_DIVIDER=15
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XST_DEFINES = XILINX_FPGA XILINX_VIRTEX6_FPGA $(AMBER_CORE) AMBER_CLK_DIVIDER=15 $(BOOT_LOADER_DEF)
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# Xilinx placement and timing constraints
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# Xilinx placement and timing constraints
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XST_CONST_FILE = xv6_constraints.ucf
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XST_CONST_FILE = xv6_constraints.ucf
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# List of verilog source files for Xilinx Virtex-6 device
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# List of verilog source files for Xilinx Virtex-6 device
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XST_PROJ_FILE = xv6_source_files.prj
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XST_PROJ_FILE = xv6_source_files.prj
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else
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else
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# The spartan6 device used on SP605 Development board
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# The spartan6 device used on SP605 Development board
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XILINX_FPGA = xc6slx45tfgg484-3
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XILINX_FPGA = xc6slx45tfgg484-3
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XST_DEFINES = XILINX_FPGA XILINX_SPARTAN6_FPGA $(AMBER_CORE) AMBER_CLK_DIVIDER=20
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XST_DEFINES = XILINX_FPGA XILINX_SPARTAN6_FPGA $(AMBER_CORE) AMBER_CLK_DIVIDER=20 $(BOOT_LOADER_DEF)
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# Xilinx placement and timing constraints
|
# Xilinx placement and timing constraints
|
XST_CONST_FILE = xs6_constraints.ucf
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XST_CONST_FILE = xs6_constraints.ucf
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# List of verilog source files for Xilinx Spartan-6 device
|
# List of verilog source files for Xilinx Spartan-6 device
|
XST_PROJ_FILE = xs6_source_files.prj
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XST_PROJ_FILE = xs6_source_files.prj
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endif
|
endif
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| Line 240... |
Line 249... |
-p $(XILINX_FPGA) \
|
-p $(XILINX_FPGA) \
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-ol high \
|
-ol high \
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-t $(MAP_SEED) \
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-t $(MAP_SEED) \
|
-w \
|
-w \
|
-ignore_keep_hierarchy \
|
-ignore_keep_hierarchy \
|
-detail \
|
|
-timing \
|
-timing \
|
|
-detail \
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-register_duplication on \
|
-register_duplication on \
|
-lc auto \
|
-lc auto \
|
-xe c -mt off -ir off \
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-xe c -mt off -ir off \
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-pr off -power off \
|
-pr off -power off \
|
-o $(RTL_TOP).map.ncd \
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-o $(RTL_TOP).map.ncd \
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| Line 284... |
Line 293... |
echo "run -ifn $(BIN_FOLDER)/$(XST_PROJ_FILE)" >> $(WORK_FOLDER)/$(RTL_TOP).xst
|
echo "run -ifn $(BIN_FOLDER)/$(XST_PROJ_FILE)" >> $(WORK_FOLDER)/$(RTL_TOP).xst
|
echo "-ofn $(RTL_TOP) -top $(RTL_TOP)" >> $(WORK_FOLDER)/$(RTL_TOP).xst
|
echo "-ofn $(RTL_TOP) -top $(RTL_TOP)" >> $(WORK_FOLDER)/$(RTL_TOP).xst
|
echo "-lso ./$(RTL_TOP).lso" >> $(WORK_FOLDER)/$(RTL_TOP).xst
|
echo "-lso ./$(RTL_TOP).lso" >> $(WORK_FOLDER)/$(RTL_TOP).xst
|
echo $(XST_OPTIONS) >> $(WORK_FOLDER)/$(RTL_TOP).xst
|
echo $(XST_OPTIONS) >> $(WORK_FOLDER)/$(RTL_TOP).xst
|
echo "-iobuf YES" >> $(WORK_FOLDER)/$(RTL_TOP).xst
|
echo "-iobuf YES" >> $(WORK_FOLDER)/$(RTL_TOP).xst
|
echo "-define { $(XST_DEFINES) )}" >> $(WORK_FOLDER)/$(RTL_TOP).xst
|
echo "-define { $(XST_DEFINES) }" >> $(WORK_FOLDER)/$(RTL_TOP).xst
|
cd $(WORK_FOLDER); \
|
cd $(WORK_FOLDER); \
|
xst -intstyle xflow -ifn ./$(RTL_TOP).xst -ofn $(LOG_FOLDER)/$(RTL_TOP).xst.$(RUN_ID).srp
|
xst -intstyle xflow -ifn ./$(RTL_TOP).xst -ofn $(LOG_FOLDER)/$(RTL_TOP).xst.$(RUN_ID).srp
|
|
|
|
|
# ----------------------------------------------------
|
# ----------------------------------------------------
|
| Line 302... |
Line 311... |
test -e $(LOG_FOLDER) || mkdir $(LOG_FOLDER)
|
test -e $(LOG_FOLDER) || mkdir $(LOG_FOLDER)
|
test -e $(BITFILE_FOLDER) || mkdir $(BITFILE_FOLDER)
|
test -e $(BITFILE_FOLDER) || mkdir $(BITFILE_FOLDER)
|
echo 0 > $(WORK_FOLDER)/seed.txt
|
echo 0 > $(WORK_FOLDER)/seed.txt
|
date +%Y%m%d%H%M%S > $(WORK_FOLDER)/run_id.txt
|
date +%Y%m%d%H%M%S > $(WORK_FOLDER)/run_id.txt
|
$(BIN_FOLDER)/set_fpga_version.sh $(WORK_FOLDER)/run_id.txt
|
$(BIN_FOLDER)/set_fpga_version.sh $(WORK_FOLDER)/run_id.txt
|
$(MAKE) -C ../../../sw/boot-loader
|
$(MAKE) -C $(BOOT_LOADER_DIR) clean
|
|
$(MAKE) -C $(BOOT_LOADER_DIR)
|
|
|
