URL
https://opencores.org/ocsvn/amber/amber/trunk
[/] [amber/] [trunk/] [hw/] [fpga/] [bin/] [xs6_source_files.prj] - Diff between revs 36 and 61
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
| Rev 36 |
Rev 61 |
| Line 110... |
Line 110... |
verilog work ../../vlog/amber25/a25_wishbone_buf.v
|
verilog work ../../vlog/amber25/a25_wishbone_buf.v
|
verilog work ../../vlog/amber25/a25_write_back.v
|
verilog work ../../vlog/amber25/a25_write_back.v
|
|
|
# Xilinx Spartan-6 FPGA Hardware wrappers
|
# Xilinx Spartan-6 FPGA Hardware wrappers
|
verilog work ../../vlog/lib/xs6_addsub_n.v
|
verilog work ../../vlog/lib/xs6_addsub_n.v
|
verilog work ../../vlog/lib/xs6_sram_2048x32_byte_en.v
|
verilog work ../../vlog/lib/xs6_sram_4096x32_byte_en.v
|
verilog work ../../vlog/lib/xs6_sram_256x128_byte_en.v
|
verilog work ../../vlog/lib/xs6_sram_256x128_byte_en.v
|
verilog work ../../vlog/lib/xs6_sram_256x21_line_en.v
|
verilog work ../../vlog/lib/xs6_sram_256x21_line_en.v
|
verilog work ../../vlog/lib/xs6_sram_256x32_byte_en.v
|
verilog work ../../vlog/lib/xs6_sram_256x32_byte_en.v
|
verilog work ../../vlog/lib/xs6_sram_512x128_byte_en.v
|
verilog work ../../vlog/lib/xs6_sram_512x128_byte_en.v
|
|
verilog work ../../vlog/lib/xs6_sram_1024x128_byte_en.v
|
|
|
# Xilinx Spartan-6 DDR3 I/F
|
# Xilinx Spartan-6 DDR3 I/F
|
verilog work ../../vlog/xs6_ddr3/mcb_ddr3.v
|
verilog work ../../vlog/xs6_ddr3/mcb_ddr3.v
|
verilog work ../../vlog/xs6_ddr3/iodrp_controller.v
|
verilog work ../../vlog/xs6_ddr3/iodrp_controller.v
|
verilog work ../../vlog/xs6_ddr3/iodrp_mcb_controller.v
|
verilog work ../../vlog/xs6_ddr3/iodrp_mcb_controller.v
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.