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        // SWI and undefined instructions do not cause an interrupt in the decode

        // SWI and undefined instructions do not cause an interrupt in the decode

        // stage. They only trigger interrupts if they arfe executed, so the

        // stage. They only trigger interrupts if they arfe executed, so the

        // interrupt is triggered if the execute condition is met in the execute stage

        // interrupt is triggered if the execute condition is met in the execute stage

assign interrupt      = next_interrupt != 3'd0 &&

assign interrupt      = next_interrupt != 3'd0 &&

                        next_interrupt != 3'd7 &&  // SWI

                        next_interrupt != 3'd7 &&  // SWI

assign interrupt_mode = next_interrupt == 3'd2 ? FIRQ :

assign interrupt_mode = next_interrupt == 3'd2 ? FIRQ :

                        next_interrupt == 3'd3 ? IRQ  :

                        next_interrupt == 3'd3 ? IRQ  :

                        next_interrupt == 3'd4 ? SVC  :

                        next_interrupt == 3'd4 ? SVC  :

                        next_interrupt == 3'd5 ? SVC  :

                        next_interrupt == 3'd5 ? SVC  :