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%%Creator: Model Technology ModelSim SE vsim 5.7e Simulator 2003.07 Jul 8 2003
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%%Title: /afs/eos.ncsu.edu/service/ece/research/tinker/bviyer/vol1/OR_1200_Multithreading_Implementation/verilog_with_my_changes/or1200_cpu/Wave_Forms_For_The_Whole_Thing/ctrl2_module.ps
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%%Title: /afs/eos.ncsu.edu/service/ece/research/tinker/bviyer/vol1/OR_1200_Multithreading_Implementation/verilog_with_my_changes/or1200_cpu/Wave_Forms_For_The_Whole_Thing/ctrl2_module.ps
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%%CreationDate: 2004-08-14 12:33:37 AM
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%%CreationDate: 2004-08-14 12:33:37 AM
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3316 802 MT 3316 802 LT 3323 842 LT 4161 842 LT 4168 802 LT ST
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3316 802 MT 3316 802 LT 3323 842 LT 4161 842 LT 4168 802 LT ST
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3103 946 MT 3316 946 LS
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|
3955 1234 MT 3955 1234 LT 3962 1274 LT 6298 1274 LT ST
|
3955 1234 MT 3955 1234 LT 3962 1274 LT 6298 1274 LT ST
|
(14610000) 3969 1234 WT pop 0 originOffset 37 add RSS
|
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|
3103 1378 MT 3316 1378 LS
|
3103 1378 MT 3316 1378 LS
|
3316 1378 MT 3316 1418 LS
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3316 1378 MT 3316 1418 LS
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3316 1418 MT 6298 1418 LS
|
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|
3103 1522 MT 3316 1522 LS
|
3316 1522 MT 3316 1522 LT 3323 1481 LT 6298 1481 LT ST
|
3316 1522 MT 3316 1522 LT 3323 1481 LT 6298 1481 LT ST
|
3316 1522 MT 3316 1522 LT 3323 1562 LT 6298 1562 LT ST
|
3316 1522 MT 3316 1522 LT 3323 1562 LT 6298 1562 LT ST
|
(00000000) 3330 1522 WT pop 0 originOffset 37 add RSS
|
(00000000) 3330 1522 WT pop 0 originOffset 37 add RSS
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|
3103 1666 MT 3316 1666 LS
|
3316 1666 MT 3316 1666 LT 3323 1625 LT 6298 1625 LT ST
|
3316 1666 MT 3316 1666 LT 3323 1625 LT 6298 1625 LT ST
|
3316 1666 MT 3316 1666 LT 3323 1706 LT 6298 1706 LT ST
|
3316 1666 MT 3316 1666 LT 3323 1706 LT 6298 1706 LT ST
|
(0) 3330 1666 WT pop 0 originOffset 37 add RSS
|
(0) 3330 1666 WT pop 0 originOffset 37 add RSS
|
3103 1810 MT 3316 1810 LS
|
3103 1810 MT 3316 1810 LS
|
3316 1810 MT 3316 1810 LT 3323 1769 LT 6298 1769 LT ST
|
3316 1810 MT 3316 1810 LT 3323 1769 LT 6298 1769 LT ST
|
3316 1810 MT 3316 1810 LT 3323 1850 LT 6298 1850 LT ST
|
3316 1810 MT 3316 1810 LT 3323 1850 LT 6298 1850 LT ST
|
(0) 3330 1810 WT pop 0 originOffset 37 add RSS
|
(0) 3330 1810 WT pop 0 originOffset 37 add RSS
|
3103 1954 MT 3316 1954 LS
|
3103 1954 MT 3316 1954 LS
|
3316 1954 MT 3316 1954 LT 3323 1913 LT 6298 1913 LT ST
|
3316 1954 MT 3316 1954 LT 3323 1913 LT 6298 1913 LT ST
|
3316 1954 MT 3316 1954 LT 3323 1994 LT 6298 1994 LT ST
|
3316 1954 MT 3316 1954 LT 3323 1994 LT 6298 1994 LT ST
|
(0) 3330 1954 WT pop 0 originOffset 37 add RSS
|
(0) 3330 1954 WT pop 0 originOffset 37 add RSS
|
3103 2098 MT 3316 2098 LS
|
3103 2098 MT 3316 2098 LS
|
3316 2098 MT 3316 2138 LS
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3316 2098 MT 3316 2138 LS
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|
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|
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|
3316 2242 MT 3316 2242 LT 3323 2201 LT 6298 2201 LT ST
|
3316 2242 MT 3316 2242 LT 3323 2282 LT 6298 2282 LT ST
|
3316 2242 MT 3316 2242 LT 3323 2282 LT 6298 2282 LT ST
|
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|
(0) 3330 2242 WT pop 0 originOffset 37 add RSS
|
3103 2386 MT 3955 2386 LS
|
3103 2386 MT 3955 2386 LS
|
3955 2386 MT 3955 2386 LT 3962 2345 LT 6298 2345 LT ST
|
3955 2386 MT 3955 2386 LT 3962 2345 LT 6298 2345 LT ST
|
3955 2386 MT 3955 2386 LT 3962 2426 LT 6298 2426 LT ST
|
3955 2386 MT 3955 2386 LT 3962 2426 LT 6298 2426 LT ST
|
(01) 3969 2386 WT pop 0 originOffset 37 add RSS
|
(01) 3969 2386 WT pop 0 originOffset 37 add RSS
|
3103 2530 MT 3955 2530 LS
|
3103 2530 MT 3955 2530 LS
|
3955 2530 MT 3955 2530 LT 3962 2489 LT 6298 2489 LT ST
|
3955 2530 MT 3955 2530 LT 3962 2489 LT 6298 2489 LT ST
|
3955 2530 MT 3955 2530 LT 3962 2570 LT 6298 2570 LT ST
|
3955 2530 MT 3955 2530 LT 3962 2570 LT 6298 2570 LT ST
|
(00) 3969 2530 WT pop 0 originOffset 37 add RSS
|
(00) 3969 2530 WT pop 0 originOffset 37 add RSS
|
3103 2674 MT 3316 2674 LS
|
3103 2674 MT 3316 2674 LS
|
3316 2674 MT 3316 2674 LT 3323 2633 LT 4161 2633 LT 4168 2674 LT ST
|
3316 2674 MT 3316 2674 LT 3323 2633 LT 4161 2633 LT 4168 2674 LT ST
|
3316 2674 MT 3316 2674 LT 3323 2714 LT 4161 2714 LT 4168 2674 LT ST
|
3316 2674 MT 3316 2674 LT 3323 2714 LT 4161 2714 LT 4168 2674 LT ST
|
(00) 3330 2674 WT pop 0 originOffset 37 add RSS
|
(00) 3330 2674 WT pop 0 originOffset 37 add RSS
|
4168 2674 MT 4168 2674 LT 4175 2633 LT 4587 2633 LT 4594 2674 LT ST
|
4168 2674 MT 4168 2674 LT 4175 2633 LT 4587 2633 LT 4594 2674 LT ST
|
4168 2674 MT 4168 2674 LT 4175 2714 LT 4587 2714 LT 4594 2674 LT ST
|
4168 2674 MT 4168 2674 LT 4175 2714 LT 4587 2714 LT 4594 2674 LT ST
|
(02) 4182 2674 WT pop 0 originOffset 37 add RSS
|
(02) 4182 2674 WT pop 0 originOffset 37 add RSS
|
4594 2674 MT 4594 2674 LT 4601 2633 LT 6298 2633 LT ST
|
4594 2674 MT 4594 2674 LT 4601 2633 LT 6298 2633 LT ST
|
4594 2674 MT 4594 2674 LT 4601 2714 LT 6298 2714 LT ST
|
4594 2674 MT 4594 2674 LT 4601 2714 LT 6298 2714 LT ST
|
(03) 4608 2674 WT pop 0 originOffset 37 add RSS
|
(03) 4608 2674 WT pop 0 originOffset 37 add RSS
|
3103 2818 MT 3955 2818 LS
|
3103 2818 MT 3955 2818 LS
|
3955 2818 MT 3955 2858 LS
|
3955 2818 MT 3955 2858 LS
|
3955 2858 MT 6298 2858 LS
|
3955 2858 MT 6298 2858 LS
|
3103 2962 MT 3955 2962 LS
|
3103 2962 MT 3955 2962 LS
|
3955 2962 MT 3955 3002 LS
|
3955 2962 MT 3955 3002 LS
|
3955 3002 MT 6298 3002 LS
|
3955 3002 MT 6298 3002 LS
|
3103 3106 MT 3316 3106 LS
|
3103 3106 MT 3316 3106 LS
|
3316 3106 MT 3316 3146 LS
|
3316 3106 MT 3316 3146 LS
|
3316 3146 MT 6298 3146 LS
|
3316 3146 MT 6298 3146 LS
|
3103 3250 MT 3316 3250 LS
|
3103 3250 MT 3316 3250 LS
|
3316 3250 MT 3316 3250 LT 3323 3209 LT 6298 3209 LT ST
|
3316 3250 MT 3316 3250 LT 3323 3209 LT 6298 3209 LT ST
|
3316 3250 MT 3316 3250 LT 3323 3290 LT 6298 3290 LT ST
|
3316 3250 MT 3316 3250 LT 3323 3290 LT 6298 3290 LT ST
|
(0) 3330 3250 WT pop 0 originOffset 37 add RSS
|
(0) 3330 3250 WT pop 0 originOffset 37 add RSS
|
3103 3394 MT 3103 3434 LS
|
3103 3394 MT 3103 3434 LS
|
3103 3434 MT 3316 3434 LS
|
3103 3434 MT 3316 3434 LS
|
3316 3434 MT 3316 3354 LS
|
3316 3434 MT 3316 3354 LS
|
3316 3354 MT 3529 3354 LS
|
3316 3354 MT 3529 3354 LS
|
3529 3354 MT 3529 3434 LS
|
3529 3354 MT 3529 3434 LS
|
3529 3434 MT 6298 3434 LS
|
3529 3434 MT 6298 3434 LS
|
3103 3538 MT 3316 3538 LS
|
3103 3538 MT 3316 3538 LS
|
3316 3538 MT 3316 3538 LT 3323 3497 LT 6298 3497 LT ST
|
3316 3538 MT 3316 3538 LT 3323 3497 LT 6298 3497 LT ST
|
3316 3538 MT 3316 3538 LT 3323 3578 LT 6298 3578 LT ST
|
3316 3538 MT 3316 3538 LT 3323 3578 LT 6298 3578 LT ST
|
(0) 3330 3538 WT pop 0 originOffset 37 add RSS
|
(0) 3330 3538 WT pop 0 originOffset 37 add RSS
|
3103 3682 MT 3316 3682 LS
|
3103 3682 MT 3316 3682 LS
|
3316 3682 MT 3316 3682 LT 3323 3641 LT 6298 3641 LT ST
|
3316 3682 MT 3316 3682 LT 3323 3641 LT 6298 3641 LT ST
|
3316 3682 MT 3316 3682 LT 3323 3722 LT 6298 3722 LT ST
|
3316 3682 MT 3316 3682 LT 3323 3722 LT 6298 3722 LT ST
|
(0) 3330 3682 WT pop 0 originOffset 37 add RSS
|
(0) 3330 3682 WT pop 0 originOffset 37 add RSS
|
3103 3826 MT 3316 3826 LS
|
3103 3826 MT 3316 3826 LS
|
3316 3826 MT 3316 3866 LS
|
3316 3826 MT 3316 3866 LS
|
3316 3866 MT 6298 3866 LS
|
3316 3866 MT 6298 3866 LS
|
3103 3970 MT 3316 3970 LS
|
3103 3970 MT 3316 3970 LS
|
3316 3970 MT 3316 3970 LT 3323 3929 LT 6298 3929 LT ST
|
3316 3970 MT 3316 3970 LT 3323 3929 LT 6298 3929 LT ST
|
3316 3970 MT 3316 3970 LT 3323 4010 LT 6298 4010 LT ST
|
3316 3970 MT 3316 3970 LT 3323 4010 LT 6298 4010 LT ST
|
(0) 3330 3970 WT pop 0 originOffset 37 add RSS
|
(0) 3330 3970 WT pop 0 originOffset 37 add RSS
|
3103 4114 MT 3316 4114 LS
|
3103 4114 MT 3316 4114 LS
|
3316 4114 MT 3316 4154 LS
|
3316 4114 MT 3316 4154 LS
|
3316 4154 MT 6298 4154 LS
|
3316 4154 MT 6298 4154 LS
|
3103 4258 MT 3316 4258 LS
|
3103 4258 MT 3316 4258 LS
|
3316 4258 MT 3316 4298 LS
|
3316 4258 MT 3316 4298 LS
|
3316 4298 MT 4168 4298 LS
|
3316 4298 MT 4168 4298 LS
|
4168 4298 MT 4168 4258 LS
|
4168 4298 MT 4168 4258 LS
|
4168 4258 MT 6298 4258 LS
|
4168 4258 MT 6298 4258 LS
|
3103 4402 MT 3316 4402 LS
|
3103 4402 MT 3316 4402 LS
|
3316 4402 MT 3316 4402 LT 3323 4361 LT 6298 4361 LT ST
|
3316 4402 MT 3316 4402 LT 3323 4361 LT 6298 4361 LT ST
|
3316 4402 MT 3316 4402 LT 3323 4442 LT 6298 4442 LT ST
|
3316 4402 MT 3316 4402 LT 3323 4442 LT 6298 4442 LT ST
|
(00000000) 3330 4402 WT pop 0 originOffset 37 add RSS
|
(00000000) 3330 4402 WT pop 0 originOffset 37 add RSS
|
% draw timeline
|
% draw timeline
|
3146 4533 MT 3146 4570 LS
|
3146 4533 MT 3146 4570 LS
|
3188 4533 MT 3188 4570 LS
|
3188 4533 MT 3188 4570 LS
|
3231 4533 MT 3231 4570 LS
|
3231 4533 MT 3231 4570 LS
|
3273 4533 MT 3273 4570 LS
|
3273 4533 MT 3273 4570 LS
|
3316 4533 MT 3316 4570 LS
|
3316 4533 MT 3316 4570 LS
|
3359 4533 MT 3359 4570 LS
|
3359 4533 MT 3359 4570 LS
|
3401 4533 MT 3401 4570 LS
|
3401 4533 MT 3401 4570 LS
|
3444 4533 MT 3444 4570 LS
|
3444 4533 MT 3444 4570 LS
|
3486 4533 MT 3486 4570 LS
|
3486 4533 MT 3486 4570 LS
|
(0) 3103 4649 WT TS RSS
|
(0) 3103 4649 WT TS RSS
|
3572 4533 MT 3572 4570 LS
|
3572 4533 MT 3572 4570 LS
|
3614 4533 MT 3614 4570 LS
|
3614 4533 MT 3614 4570 LS
|
3657 4533 MT 3657 4570 LS
|
3657 4533 MT 3657 4570 LS
|
3699 4533 MT 3699 4570 LS
|
3699 4533 MT 3699 4570 LS
|
3742 4533 MT 3742 4570 LS
|
3742 4533 MT 3742 4570 LS
|
3785 4533 MT 3785 4570 LS
|
3785 4533 MT 3785 4570 LS
|
3827 4533 MT 3827 4570 LS
|
3827 4533 MT 3827 4570 LS
|
3870 4533 MT 3870 4570 LS
|
3870 4533 MT 3870 4570 LS
|
3912 4533 MT 3912 4570 LS
|
3912 4533 MT 3912 4570 LS
|
3529 4506 MT 3529 4570 LS
|
3529 4506 MT 3529 4570 LS
|
3998 4533 MT 3998 4570 LS
|
3998 4533 MT 3998 4570 LS
|
4040 4533 MT 4040 4570 LS
|
4040 4533 MT 4040 4570 LS
|
4083 4533 MT 4083 4570 LS
|
4083 4533 MT 4083 4570 LS
|
4125 4533 MT 4125 4570 LS
|
4125 4533 MT 4125 4570 LS
|
4168 4533 MT 4168 4570 LS
|
4168 4533 MT 4168 4570 LS
|
4211 4533 MT 4211 4570 LS
|
4211 4533 MT 4211 4570 LS
|
4253 4533 MT 4253 4570 LS
|
4253 4533 MT 4253 4570 LS
|
4296 4533 MT 4296 4570 LS
|
4296 4533 MT 4296 4570 LS
|
4338 4533 MT 4338 4570 LS
|
4338 4533 MT 4338 4570 LS
|
3955 4506 MT 3955 4570 LS
|
3955 4506 MT 3955 4570 LS
|
(20) 3955 4649 WT TS RSS
|
(20) 3955 4649 WT TS RSS
|
4424 4533 MT 4424 4570 LS
|
4424 4533 MT 4424 4570 LS
|
4466 4533 MT 4466 4570 LS
|
4466 4533 MT 4466 4570 LS
|
4509 4533 MT 4509 4570 LS
|
4509 4533 MT 4509 4570 LS
|
4551 4533 MT 4551 4570 LS
|
4551 4533 MT 4551 4570 LS
|
4594 4533 MT 4594 4570 LS
|
4594 4533 MT 4594 4570 LS
|
4637 4533 MT 4637 4570 LS
|
4637 4533 MT 4637 4570 LS
|
4679 4533 MT 4679 4570 LS
|
4679 4533 MT 4679 4570 LS
|
4722 4533 MT 4722 4570 LS
|
4722 4533 MT 4722 4570 LS
|
4764 4533 MT 4764 4570 LS
|
4764 4533 MT 4764 4570 LS
|
4381 4506 MT 4381 4570 LS
|
4381 4506 MT 4381 4570 LS
|
4850 4533 MT 4850 4570 LS
|
4850 4533 MT 4850 4570 LS
|
4892 4533 MT 4892 4570 LS
|
4892 4533 MT 4892 4570 LS
|
4935 4533 MT 4935 4570 LS
|
4935 4533 MT 4935 4570 LS
|
4977 4533 MT 4977 4570 LS
|
4977 4533 MT 4977 4570 LS
|
5020 4533 MT 5020 4570 LS
|
5020 4533 MT 5020 4570 LS
|
5063 4533 MT 5063 4570 LS
|
5063 4533 MT 5063 4570 LS
|
5105 4533 MT 5105 4570 LS
|
5105 4533 MT 5105 4570 LS
|
5148 4533 MT 5148 4570 LS
|
5148 4533 MT 5148 4570 LS
|
5190 4533 MT 5190 4570 LS
|
5190 4533 MT 5190 4570 LS
|
4807 4506 MT 4807 4570 LS
|
4807 4506 MT 4807 4570 LS
|
(40) 4807 4649 WT TS RSS
|
(40) 4807 4649 WT TS RSS
|
5276 4533 MT 5276 4570 LS
|
5276 4533 MT 5276 4570 LS
|
5318 4533 MT 5318 4570 LS
|
5318 4533 MT 5318 4570 LS
|
5361 4533 MT 5361 4570 LS
|
5361 4533 MT 5361 4570 LS
|
5403 4533 MT 5403 4570 LS
|
5403 4533 MT 5403 4570 LS
|
5446 4533 MT 5446 4570 LS
|
5446 4533 MT 5446 4570 LS
|
5489 4533 MT 5489 4570 LS
|
5489 4533 MT 5489 4570 LS
|
5531 4533 MT 5531 4570 LS
|
5531 4533 MT 5531 4570 LS
|
5574 4533 MT 5574 4570 LS
|
5574 4533 MT 5574 4570 LS
|
5616 4533 MT 5616 4570 LS
|
5616 4533 MT 5616 4570 LS
|
5233 4506 MT 5233 4570 LS
|
5233 4506 MT 5233 4570 LS
|
5702 4533 MT 5702 4570 LS
|
5702 4533 MT 5702 4570 LS
|
5744 4533 MT 5744 4570 LS
|
5744 4533 MT 5744 4570 LS
|
5787 4533 MT 5787 4570 LS
|
5787 4533 MT 5787 4570 LS
|
5829 4533 MT 5829 4570 LS
|
5829 4533 MT 5829 4570 LS
|
5872 4533 MT 5872 4570 LS
|
5872 4533 MT 5872 4570 LS
|
5915 4533 MT 5915 4570 LS
|
5915 4533 MT 5915 4570 LS
|
5957 4533 MT 5957 4570 LS
|
5957 4533 MT 5957 4570 LS
|
6000 4533 MT 6000 4570 LS
|
6000 4533 MT 6000 4570 LS
|
6042 4533 MT 6042 4570 LS
|
6042 4533 MT 6042 4570 LS
|
5659 4506 MT 5659 4570 LS
|
5659 4506 MT 5659 4570 LS
|
(60) 5659 4649 WT TS RSS
|
(60) 5659 4649 WT TS RSS
|
6128 4533 MT 6128 4570 LS
|
6128 4533 MT 6128 4570 LS
|
6170 4533 MT 6170 4570 LS
|
6170 4533 MT 6170 4570 LS
|
6213 4533 MT 6213 4570 LS
|
6213 4533 MT 6213 4570 LS
|
6255 4533 MT 6255 4570 LS
|
6255 4533 MT 6255 4570 LS
|
6298 4533 MT 6298 4570 LS
|
6298 4533 MT 6298 4570 LS
|
6341 4533 MT 6341 4570 LS
|
6341 4533 MT 6341 4570 LS
|
6383 4533 MT 6383 4570 LS
|
6383 4533 MT 6383 4570 LS
|
6426 4533 MT 6426 4570 LS
|
6426 4533 MT 6426 4570 LS
|
6468 4533 MT 6468 4570 LS
|
6468 4533 MT 6468 4570 LS
|
6085 4506 MT 6085 4570 LS
|
6085 4506 MT 6085 4570 LS
|
% draw grid
|
% draw grid
|
3529 300 MT 3529 4506 LS
|
3529 300 MT 3529 4506 LS
|
3955 300 MT 3955 4506 LS
|
3955 300 MT 3955 4506 LS
|
4381 300 MT 4381 4506 LS
|
4381 300 MT 4381 4506 LS
|
4807 300 MT 4807 4506 LS
|
4807 300 MT 4807 4506 LS
|
5233 300 MT 5233 4506 LS
|
5233 300 MT 5233 4506 LS
|
5659 300 MT 5659 4506 LS
|
5659 300 MT 5659 4506 LS
|
6085 300 MT 6085 4506 LS
|
6085 300 MT 6085 4506 LS
|
% draw waveforms
|
% draw waveforms
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) 3066 409 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) 3066 409 WT TSE RSS
|
3522 300 MT 3536 300 LS
|
3522 300 MT 3536 300 LS
|
3948 300 MT 3962 300 LS
|
3948 300 MT 3962 300 LS
|
4374 300 MT 4388 300 LS
|
4374 300 MT 4388 300 LS
|
4800 300 MT 4814 300 LS
|
4800 300 MT 4814 300 LS
|
5226 300 MT 5240 300 LS
|
5226 300 MT 5240 300 LS
|
5652 300 MT 5666 300 LS
|
5652 300 MT 5666 300 LS
|
6078 300 MT 6092 300 LS
|
6078 300 MT 6092 300 LS
|
3103 370 MT 3955 370 LS
|
3103 370 MT 3955 370 LS
|
3955 370 MT 3955 410 LS
|
3955 370 MT 3955 410 LS
|
3955 410 MT 4168 410 LS
|
3955 410 MT 4168 410 LS
|
4168 410 MT 4168 370 LS
|
4168 410 MT 4168 370 LS
|
4168 370 MT 6298 370 LS
|
4168 370 MT 6298 370 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) 3066 553 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) 3066 553 WT TSE RSS
|
3522 444 MT 3536 444 LS
|
3522 444 MT 3536 444 LS
|
3948 444 MT 3962 444 LS
|
3948 444 MT 3962 444 LS
|
4374 444 MT 4388 444 LS
|
4374 444 MT 4388 444 LS
|
4800 444 MT 4814 444 LS
|
4800 444 MT 4814 444 LS
|
5226 444 MT 5240 444 LS
|
5226 444 MT 5240 444 LS
|
5652 444 MT 5666 444 LS
|
5652 444 MT 5666 444 LS
|
6078 444 MT 6092 444 LS
|
6078 444 MT 6092 444 LS
|
3103 514 MT 3103 554 LS
|
3103 514 MT 3103 554 LS
|
3103 554 MT 6298 554 LS
|
3103 554 MT 6298 554 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) 3066 697 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) 3066 697 WT TSE RSS
|
3522 588 MT 3536 588 LS
|
3522 588 MT 3536 588 LS
|
3948 588 MT 3962 588 LS
|
3948 588 MT 3962 588 LS
|
4374 588 MT 4388 588 LS
|
4374 588 MT 4388 588 LS
|
4800 588 MT 4814 588 LS
|
4800 588 MT 4814 588 LS
|
5226 588 MT 5240 588 LS
|
5226 588 MT 5240 588 LS
|
5652 588 MT 5666 588 LS
|
5652 588 MT 5666 588 LS
|
6078 588 MT 6092 588 LS
|
6078 588 MT 6092 588 LS
|
3103 658 MT 3955 658 LS
|
3103 658 MT 3955 658 LS
|
3955 658 MT 3955 698 LS
|
3955 658 MT 3955 698 LS
|
3955 698 MT 6298 698 LS
|
3955 698 MT 6298 698 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) 3066 841 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) 3066 841 WT TSE RSS
|
3522 732 MT 3536 732 LS
|
3522 732 MT 3536 732 LS
|
3948 732 MT 3962 732 LS
|
3948 732 MT 3962 732 LS
|
4374 732 MT 4388 732 LS
|
4374 732 MT 4388 732 LS
|
4800 732 MT 4814 732 LS
|
4800 732 MT 4814 732 LS
|
5226 732 MT 5240 732 LS
|
5226 732 MT 5240 732 LS
|
5652 732 MT 5666 732 LS
|
5652 732 MT 5666 732 LS
|
6078 732 MT 6092 732 LS
|
6078 732 MT 6092 732 LS
|
3103 802 MT 3316 802 LS
|
3103 802 MT 3316 802 LS
|
3316 802 MT 3316 802 LT 3323 761 LT 4161 761 LT 4168 802 LT ST
|
3316 802 MT 3316 802 LT 3323 761 LT 4161 761 LT 4168 802 LT ST
|
3316 802 MT 3316 802 LT 3323 842 LT 4161 842 LT 4168 802 LT ST
|
3316 802 MT 3316 802 LT 3323 842 LT 4161 842 LT 4168 802 LT ST
|
(14410000) 3330 802 WT pop 0 originOffset 37 add RSS
|
(14410000) 3330 802 WT pop 0 originOffset 37 add RSS
|
4168 802 MT 4168 802 LT 4175 761 LT 6298 761 LT ST
|
4168 802 MT 4168 802 LT 4175 761 LT 6298 761 LT ST
|
4168 802 MT 4168 802 LT 4175 842 LT 6298 842 LT ST
|
4168 802 MT 4168 802 LT 4175 842 LT 6298 842 LT ST
|
(14610000) 4182 802 WT pop 0 originOffset 37 add RSS
|
(14610000) 4182 802 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) 3066 985 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) 3066 985 WT TSE RSS
|
3522 876 MT 3536 876 LS
|
3522 876 MT 3536 876 LS
|
3948 876 MT 3962 876 LS
|
3948 876 MT 3962 876 LS
|
4374 876 MT 4388 876 LS
|
4374 876 MT 4388 876 LS
|
4800 876 MT 4814 876 LS
|
4800 876 MT 4814 876 LS
|
5226 876 MT 5240 876 LS
|
5226 876 MT 5240 876 LS
|
5652 876 MT 5666 876 LS
|
5652 876 MT 5666 876 LS
|
6078 876 MT 6092 876 LS
|
6078 876 MT 6092 876 LS
|
3103 946 MT 3316 946 LS
|
3103 946 MT 3316 946 LS
|
3316 946 MT 3316 986 LS
|
3316 946 MT 3316 986 LS
|
3316 986 MT 6298 986 LS
|
3316 986 MT 6298 986 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) 3066 1129 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) 3066 1129 WT TSE RSS
|
3522 1020 MT 3536 1020 LS
|
3522 1020 MT 3536 1020 LS
|
3948 1020 MT 3962 1020 LS
|
3948 1020 MT 3962 1020 LS
|
4374 1020 MT 4388 1020 LS
|
4374 1020 MT 4388 1020 LS
|
4800 1020 MT 4814 1020 LS
|
4800 1020 MT 4814 1020 LS
|
5226 1020 MT 5240 1020 LS
|
5226 1020 MT 5240 1020 LS
|
5652 1020 MT 5666 1020 LS
|
5652 1020 MT 5666 1020 LS
|
6078 1020 MT 6092 1020 LS
|
6078 1020 MT 6092 1020 LS
|
3103 1090 MT 3316 1090 LS
|
3103 1090 MT 3316 1090 LS
|
3316 1090 MT 3316 1050 LS
|
3316 1090 MT 3316 1050 LS
|
3316 1050 MT 6298 1050 LS
|
3316 1050 MT 6298 1050 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) 3066 1273 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) 3066 1273 WT TSE RSS
|
3522 1164 MT 3536 1164 LS
|
3522 1164 MT 3536 1164 LS
|
3948 1164 MT 3962 1164 LS
|
3948 1164 MT 3962 1164 LS
|
4374 1164 MT 4388 1164 LS
|
4374 1164 MT 4388 1164 LS
|
4800 1164 MT 4814 1164 LS
|
4800 1164 MT 4814 1164 LS
|
5226 1164 MT 5240 1164 LS
|
5226 1164 MT 5240 1164 LS
|
5652 1164 MT 5666 1164 LS
|
5652 1164 MT 5666 1164 LS
|
6078 1164 MT 6092 1164 LS
|
6078 1164 MT 6092 1164 LS
|
3103 1234 MT 3955 1234 LS
|
3103 1234 MT 3955 1234 LS
|
3955 1234 MT 3955 1234 LT 3962 1193 LT 6298 1193 LT ST
|
3955 1234 MT 3955 1234 LT 3962 1193 LT 6298 1193 LT ST
|
3955 1234 MT 3955 1234 LT 3962 1274 LT 6298 1274 LT ST
|
3955 1234 MT 3955 1234 LT 3962 1274 LT 6298 1274 LT ST
|
(14610000) 3969 1234 WT pop 0 originOffset 37 add RSS
|
(14610000) 3969 1234 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) 3066 1417 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) 3066 1417 WT TSE RSS
|
3522 1308 MT 3536 1308 LS
|
3522 1308 MT 3536 1308 LS
|
3948 1308 MT 3962 1308 LS
|
3948 1308 MT 3962 1308 LS
|
4374 1308 MT 4388 1308 LS
|
4374 1308 MT 4388 1308 LS
|
4800 1308 MT 4814 1308 LS
|
4800 1308 MT 4814 1308 LS
|
5226 1308 MT 5240 1308 LS
|
5226 1308 MT 5240 1308 LS
|
5652 1308 MT 5666 1308 LS
|
5652 1308 MT 5666 1308 LS
|
6078 1308 MT 6092 1308 LS
|
6078 1308 MT 6092 1308 LS
|
3103 1378 MT 3316 1378 LS
|
3103 1378 MT 3316 1378 LS
|
3316 1378 MT 3316 1418 LS
|
3316 1378 MT 3316 1418 LS
|
3316 1418 MT 6298 1418 LS
|
3316 1418 MT 6298 1418 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) 3066 1561 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) 3066 1561 WT TSE RSS
|
3522 1452 MT 3536 1452 LS
|
3522 1452 MT 3536 1452 LS
|
3948 1452 MT 3962 1452 LS
|
3948 1452 MT 3962 1452 LS
|
4374 1452 MT 4388 1452 LS
|
4374 1452 MT 4388 1452 LS
|
4800 1452 MT 4814 1452 LS
|
4800 1452 MT 4814 1452 LS
|
5226 1452 MT 5240 1452 LS
|
5226 1452 MT 5240 1452 LS
|
5652 1452 MT 5666 1452 LS
|
5652 1452 MT 5666 1452 LS
|
6078 1452 MT 6092 1452 LS
|
6078 1452 MT 6092 1452 LS
|
3103 1522 MT 3316 1522 LS
|
3103 1522 MT 3316 1522 LS
|
3316 1522 MT 3316 1522 LT 3323 1481 LT 6298 1481 LT ST
|
3316 1522 MT 3316 1522 LT 3323 1481 LT 6298 1481 LT ST
|
3316 1522 MT 3316 1522 LT 3323 1562 LT 6298 1562 LT ST
|
3316 1522 MT 3316 1522 LT 3323 1562 LT 6298 1562 LT ST
|
(00000000) 3330 1522 WT pop 0 originOffset 37 add RSS
|
(00000000) 3330 1522 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) 3066 1705 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) 3066 1705 WT TSE RSS
|
3522 1596 MT 3536 1596 LS
|
3522 1596 MT 3536 1596 LS
|
3948 1596 MT 3962 1596 LS
|
3948 1596 MT 3962 1596 LS
|
4374 1596 MT 4388 1596 LS
|
4374 1596 MT 4388 1596 LS
|
4800 1596 MT 4814 1596 LS
|
4800 1596 MT 4814 1596 LS
|
5226 1596 MT 5240 1596 LS
|
5226 1596 MT 5240 1596 LS
|
5652 1596 MT 5666 1596 LS
|
5652 1596 MT 5666 1596 LS
|
6078 1596 MT 6092 1596 LS
|
6078 1596 MT 6092 1596 LS
|
3103 1666 MT 3316 1666 LS
|
3103 1666 MT 3316 1666 LS
|
3316 1666 MT 3316 1666 LT 3323 1625 LT 6298 1625 LT ST
|
3316 1666 MT 3316 1666 LT 3323 1625 LT 6298 1625 LT ST
|
3316 1666 MT 3316 1666 LT 3323 1706 LT 6298 1706 LT ST
|
3316 1666 MT 3316 1666 LT 3323 1706 LT 6298 1706 LT ST
|
(0) 3330 1666 WT pop 0 originOffset 37 add RSS
|
(0) 3330 1666 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) 3066 1849 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) 3066 1849 WT TSE RSS
|
3522 1740 MT 3536 1740 LS
|
3522 1740 MT 3536 1740 LS
|
3948 1740 MT 3962 1740 LS
|
3948 1740 MT 3962 1740 LS
|
4374 1740 MT 4388 1740 LS
|
4374 1740 MT 4388 1740 LS
|
4800 1740 MT 4814 1740 LS
|
4800 1740 MT 4814 1740 LS
|
5226 1740 MT 5240 1740 LS
|
5226 1740 MT 5240 1740 LS
|
5652 1740 MT 5666 1740 LS
|
5652 1740 MT 5666 1740 LS
|
6078 1740 MT 6092 1740 LS
|
6078 1740 MT 6092 1740 LS
|
3103 1810 MT 3316 1810 LS
|
3103 1810 MT 3316 1810 LS
|
3316 1810 MT 3316 1810 LT 3323 1769 LT 6298 1769 LT ST
|
3316 1810 MT 3316 1810 LT 3323 1769 LT 6298 1769 LT ST
|
3316 1810 MT 3316 1810 LT 3323 1850 LT 6298 1850 LT ST
|
3316 1810 MT 3316 1810 LT 3323 1850 LT 6298 1850 LT ST
|
(0) 3330 1810 WT pop 0 originOffset 37 add RSS
|
(0) 3330 1810 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) 3066 1993 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) 3066 1993 WT TSE RSS
|
3522 1884 MT 3536 1884 LS
|
3522 1884 MT 3536 1884 LS
|
3948 1884 MT 3962 1884 LS
|
3948 1884 MT 3962 1884 LS
|
4374 1884 MT 4388 1884 LS
|
4374 1884 MT 4388 1884 LS
|
4800 1884 MT 4814 1884 LS
|
4800 1884 MT 4814 1884 LS
|
5226 1884 MT 5240 1884 LS
|
5226 1884 MT 5240 1884 LS
|
5652 1884 MT 5666 1884 LS
|
5652 1884 MT 5666 1884 LS
|
6078 1884 MT 6092 1884 LS
|
6078 1884 MT 6092 1884 LS
|
3103 1954 MT 3316 1954 LS
|
3103 1954 MT 3316 1954 LS
|
3316 1954 MT 3316 1954 LT 3323 1913 LT 6298 1913 LT ST
|
3316 1954 MT 3316 1954 LT 3323 1913 LT 6298 1913 LT ST
|
3316 1954 MT 3316 1954 LT 3323 1994 LT 6298 1994 LT ST
|
3316 1954 MT 3316 1954 LT 3323 1994 LT 6298 1994 LT ST
|
(0) 3330 1954 WT pop 0 originOffset 37 add RSS
|
(0) 3330 1954 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) 3066 2137 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) 3066 2137 WT TSE RSS
|
3522 2028 MT 3536 2028 LS
|
3522 2028 MT 3536 2028 LS
|
3948 2028 MT 3962 2028 LS
|
3948 2028 MT 3962 2028 LS
|
4374 2028 MT 4388 2028 LS
|
4374 2028 MT 4388 2028 LS
|
4800 2028 MT 4814 2028 LS
|
4800 2028 MT 4814 2028 LS
|
5226 2028 MT 5240 2028 LS
|
5226 2028 MT 5240 2028 LS
|
5652 2028 MT 5666 2028 LS
|
5652 2028 MT 5666 2028 LS
|
6078 2028 MT 6092 2028 LS
|
6078 2028 MT 6092 2028 LS
|
3103 2098 MT 3316 2098 LS
|
3103 2098 MT 3316 2098 LS
|
3316 2098 MT 3316 2138 LS
|
3316 2098 MT 3316 2138 LS
|
3316 2138 MT 6298 2138 LS
|
3316 2138 MT 6298 2138 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) 3066 2281 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) 3066 2281 WT TSE RSS
|
3522 2172 MT 3536 2172 LS
|
3522 2172 MT 3536 2172 LS
|
3948 2172 MT 3962 2172 LS
|
3948 2172 MT 3962 2172 LS
|
4374 2172 MT 4388 2172 LS
|
4374 2172 MT 4388 2172 LS
|
4800 2172 MT 4814 2172 LS
|
4800 2172 MT 4814 2172 LS
|
5226 2172 MT 5240 2172 LS
|
5226 2172 MT 5240 2172 LS
|
5652 2172 MT 5666 2172 LS
|
5652 2172 MT 5666 2172 LS
|
6078 2172 MT 6092 2172 LS
|
6078 2172 MT 6092 2172 LS
|
3103 2242 MT 3316 2242 LS
|
3103 2242 MT 3316 2242 LS
|
3316 2242 MT 3316 2242 LT 3323 2201 LT 6298 2201 LT ST
|
3316 2242 MT 3316 2242 LT 3323 2201 LT 6298 2201 LT ST
|
3316 2242 MT 3316 2242 LT 3323 2282 LT 6298 2282 LT ST
|
3316 2242 MT 3316 2242 LT 3323 2282 LT 6298 2282 LT ST
|
(0) 3330 2242 WT pop 0 originOffset 37 add RSS
|
(0) 3330 2242 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) 3066 2425 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) 3066 2425 WT TSE RSS
|
3522 2316 MT 3536 2316 LS
|
3522 2316 MT 3536 2316 LS
|
3948 2316 MT 3962 2316 LS
|
3948 2316 MT 3962 2316 LS
|
4374 2316 MT 4388 2316 LS
|
4374 2316 MT 4388 2316 LS
|
4800 2316 MT 4814 2316 LS
|
4800 2316 MT 4814 2316 LS
|
5226 2316 MT 5240 2316 LS
|
5226 2316 MT 5240 2316 LS
|
5652 2316 MT 5666 2316 LS
|
5652 2316 MT 5666 2316 LS
|
6078 2316 MT 6092 2316 LS
|
6078 2316 MT 6092 2316 LS
|
3103 2386 MT 3955 2386 LS
|
3103 2386 MT 3955 2386 LS
|
3955 2386 MT 3955 2386 LT 3962 2345 LT 6298 2345 LT ST
|
3955 2386 MT 3955 2386 LT 3962 2345 LT 6298 2345 LT ST
|
3955 2386 MT 3955 2386 LT 3962 2426 LT 6298 2426 LT ST
|
3955 2386 MT 3955 2386 LT 3962 2426 LT 6298 2426 LT ST
|
(01) 3969 2386 WT pop 0 originOffset 37 add RSS
|
(01) 3969 2386 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) 3066 2569 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) 3066 2569 WT TSE RSS
|
3522 2460 MT 3536 2460 LS
|
3522 2460 MT 3536 2460 LS
|
3948 2460 MT 3962 2460 LS
|
3948 2460 MT 3962 2460 LS
|
4374 2460 MT 4388 2460 LS
|
4374 2460 MT 4388 2460 LS
|
4800 2460 MT 4814 2460 LS
|
4800 2460 MT 4814 2460 LS
|
5226 2460 MT 5240 2460 LS
|
5226 2460 MT 5240 2460 LS
|
5652 2460 MT 5666 2460 LS
|
5652 2460 MT 5666 2460 LS
|
6078 2460 MT 6092 2460 LS
|
6078 2460 MT 6092 2460 LS
|
3103 2530 MT 3955 2530 LS
|
3103 2530 MT 3955 2530 LS
|
3955 2530 MT 3955 2530 LT 3962 2489 LT 6298 2489 LT ST
|
3955 2530 MT 3955 2530 LT 3962 2489 LT 6298 2489 LT ST
|
3955 2530 MT 3955 2530 LT 3962 2570 LT 6298 2570 LT ST
|
3955 2530 MT 3955 2530 LT 3962 2570 LT 6298 2570 LT ST
|
(00) 3969 2530 WT pop 0 originOffset 37 add RSS
|
(00) 3969 2530 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) 3066 2713 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) 3066 2713 WT TSE RSS
|
3522 2604 MT 3536 2604 LS
|
3522 2604 MT 3536 2604 LS
|
3948 2604 MT 3962 2604 LS
|
3948 2604 MT 3962 2604 LS
|
4374 2604 MT 4388 2604 LS
|
4374 2604 MT 4388 2604 LS
|
4800 2604 MT 4814 2604 LS
|
4800 2604 MT 4814 2604 LS
|
5226 2604 MT 5240 2604 LS
|
5226 2604 MT 5240 2604 LS
|
5652 2604 MT 5666 2604 LS
|
5652 2604 MT 5666 2604 LS
|
6078 2604 MT 6092 2604 LS
|
6078 2604 MT 6092 2604 LS
|
3103 2674 MT 3316 2674 LS
|
3103 2674 MT 3316 2674 LS
|
3316 2674 MT 3316 2674 LT 3323 2633 LT 4161 2633 LT 4168 2674 LT ST
|
3316 2674 MT 3316 2674 LT 3323 2633 LT 4161 2633 LT 4168 2674 LT ST
|
3316 2674 MT 3316 2674 LT 3323 2714 LT 4161 2714 LT 4168 2674 LT ST
|
3316 2674 MT 3316 2674 LT 3323 2714 LT 4161 2714 LT 4168 2674 LT ST
|
(00) 3330 2674 WT pop 0 originOffset 37 add RSS
|
(00) 3330 2674 WT pop 0 originOffset 37 add RSS
|
4168 2674 MT 4168 2674 LT 4175 2633 LT 4587 2633 LT 4594 2674 LT ST
|
4168 2674 MT 4168 2674 LT 4175 2633 LT 4587 2633 LT 4594 2674 LT ST
|
4168 2674 MT 4168 2674 LT 4175 2714 LT 4587 2714 LT 4594 2674 LT ST
|
4168 2674 MT 4168 2674 LT 4175 2714 LT 4587 2714 LT 4594 2674 LT ST
|
(02) 4182 2674 WT pop 0 originOffset 37 add RSS
|
(02) 4182 2674 WT pop 0 originOffset 37 add RSS
|
4594 2674 MT 4594 2674 LT 4601 2633 LT 6298 2633 LT ST
|
4594 2674 MT 4594 2674 LT 4601 2633 LT 6298 2633 LT ST
|
4594 2674 MT 4594 2674 LT 4601 2714 LT 6298 2714 LT ST
|
4594 2674 MT 4594 2674 LT 4601 2714 LT 6298 2714 LT ST
|
(03) 4608 2674 WT pop 0 originOffset 37 add RSS
|
(03) 4608 2674 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) 3066 2857 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) 3066 2857 WT TSE RSS
|
3522 2748 MT 3536 2748 LS
|
3522 2748 MT 3536 2748 LS
|
3948 2748 MT 3962 2748 LS
|
3948 2748 MT 3962 2748 LS
|
4374 2748 MT 4388 2748 LS
|
4374 2748 MT 4388 2748 LS
|
4800 2748 MT 4814 2748 LS
|
4800 2748 MT 4814 2748 LS
|
5226 2748 MT 5240 2748 LS
|
5226 2748 MT 5240 2748 LS
|
5652 2748 MT 5666 2748 LS
|
5652 2748 MT 5666 2748 LS
|
6078 2748 MT 6092 2748 LS
|
6078 2748 MT 6092 2748 LS
|
3103 2818 MT 3955 2818 LS
|
3103 2818 MT 3955 2818 LS
|
3955 2818 MT 3955 2858 LS
|
3955 2818 MT 3955 2858 LS
|
3955 2858 MT 6298 2858 LS
|
3955 2858 MT 6298 2858 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) 3066 3001 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) 3066 3001 WT TSE RSS
|
3522 2892 MT 3536 2892 LS
|
3522 2892 MT 3536 2892 LS
|
3948 2892 MT 3962 2892 LS
|
3948 2892 MT 3962 2892 LS
|
4374 2892 MT 4388 2892 LS
|
4374 2892 MT 4388 2892 LS
|
4800 2892 MT 4814 2892 LS
|
4800 2892 MT 4814 2892 LS
|
5226 2892 MT 5240 2892 LS
|
5226 2892 MT 5240 2892 LS
|
5652 2892 MT 5666 2892 LS
|
5652 2892 MT 5666 2892 LS
|
6078 2892 MT 6092 2892 LS
|
6078 2892 MT 6092 2892 LS
|
3103 2962 MT 3955 2962 LS
|
3103 2962 MT 3955 2962 LS
|
3955 2962 MT 3955 3002 LS
|
3955 2962 MT 3955 3002 LS
|
3955 3002 MT 6298 3002 LS
|
3955 3002 MT 6298 3002 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) 3066 3145 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) 3066 3145 WT TSE RSS
|
3522 3036 MT 3536 3036 LS
|
3522 3036 MT 3536 3036 LS
|
3948 3036 MT 3962 3036 LS
|
3948 3036 MT 3962 3036 LS
|
4374 3036 MT 4388 3036 LS
|
4374 3036 MT 4388 3036 LS
|
4800 3036 MT 4814 3036 LS
|
4800 3036 MT 4814 3036 LS
|
5226 3036 MT 5240 3036 LS
|
5226 3036 MT 5240 3036 LS
|
5652 3036 MT 5666 3036 LS
|
5652 3036 MT 5666 3036 LS
|
6078 3036 MT 6092 3036 LS
|
6078 3036 MT 6092 3036 LS
|
3103 3106 MT 3316 3106 LS
|
3103 3106 MT 3316 3106 LS
|
3316 3106 MT 3316 3146 LS
|
3316 3106 MT 3316 3146 LS
|
3316 3146 MT 6298 3146 LS
|
3316 3146 MT 6298 3146 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) 3066 3289 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) 3066 3289 WT TSE RSS
|
3522 3180 MT 3536 3180 LS
|
3522 3180 MT 3536 3180 LS
|
3948 3180 MT 3962 3180 LS
|
3948 3180 MT 3962 3180 LS
|
4374 3180 MT 4388 3180 LS
|
4374 3180 MT 4388 3180 LS
|
4800 3180 MT 4814 3180 LS
|
4800 3180 MT 4814 3180 LS
|
5226 3180 MT 5240 3180 LS
|
5226 3180 MT 5240 3180 LS
|
5652 3180 MT 5666 3180 LS
|
5652 3180 MT 5666 3180 LS
|
6078 3180 MT 6092 3180 LS
|
6078 3180 MT 6092 3180 LS
|
3103 3250 MT 3316 3250 LS
|
3103 3250 MT 3316 3250 LS
|
3316 3250 MT 3316 3250 LT 3323 3209 LT 6298 3209 LT ST
|
3316 3250 MT 3316 3250 LT 3323 3209 LT 6298 3209 LT ST
|
3316 3250 MT 3316 3250 LT 3323 3290 LT 6298 3290 LT ST
|
3316 3250 MT 3316 3250 LT 3323 3290 LT 6298 3290 LT ST
|
(0) 3330 3250 WT pop 0 originOffset 37 add RSS
|
(0) 3330 3250 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) 3066 3433 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) 3066 3433 WT TSE RSS
|
3522 3324 MT 3536 3324 LS
|
3522 3324 MT 3536 3324 LS
|
3948 3324 MT 3962 3324 LS
|
3948 3324 MT 3962 3324 LS
|
4374 3324 MT 4388 3324 LS
|
4374 3324 MT 4388 3324 LS
|
4800 3324 MT 4814 3324 LS
|
4800 3324 MT 4814 3324 LS
|
5226 3324 MT 5240 3324 LS
|
5226 3324 MT 5240 3324 LS
|
5652 3324 MT 5666 3324 LS
|
5652 3324 MT 5666 3324 LS
|
6078 3324 MT 6092 3324 LS
|
6078 3324 MT 6092 3324 LS
|
3103 3394 MT 3103 3434 LS
|
3103 3394 MT 3103 3434 LS
|
3103 3434 MT 3316 3434 LS
|
3103 3434 MT 3316 3434 LS
|
3316 3434 MT 3316 3354 LS
|
3316 3434 MT 3316 3354 LS
|
3316 3354 MT 3529 3354 LS
|
3316 3354 MT 3529 3354 LS
|
3529 3354 MT 3529 3434 LS
|
3529 3354 MT 3529 3434 LS
|
3529 3434 MT 6298 3434 LS
|
3529 3434 MT 6298 3434 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) 3066 3577 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) 3066 3577 WT TSE RSS
|
3522 3468 MT 3536 3468 LS
|
3522 3468 MT 3536 3468 LS
|
3948 3468 MT 3962 3468 LS
|
3948 3468 MT 3962 3468 LS
|
4374 3468 MT 4388 3468 LS
|
4374 3468 MT 4388 3468 LS
|
4800 3468 MT 4814 3468 LS
|
4800 3468 MT 4814 3468 LS
|
5226 3468 MT 5240 3468 LS
|
5226 3468 MT 5240 3468 LS
|
5652 3468 MT 5666 3468 LS
|
5652 3468 MT 5666 3468 LS
|
6078 3468 MT 6092 3468 LS
|
6078 3468 MT 6092 3468 LS
|
3103 3538 MT 3316 3538 LS
|
3103 3538 MT 3316 3538 LS
|
3316 3538 MT 3316 3538 LT 3323 3497 LT 6298 3497 LT ST
|
3316 3538 MT 3316 3538 LT 3323 3497 LT 6298 3497 LT ST
|
3316 3538 MT 3316 3538 LT 3323 3578 LT 6298 3578 LT ST
|
3316 3538 MT 3316 3538 LT 3323 3578 LT 6298 3578 LT ST
|
(0) 3330 3538 WT pop 0 originOffset 37 add RSS
|
(0) 3330 3538 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) 3066 3721 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) 3066 3721 WT TSE RSS
|
3522 3612 MT 3536 3612 LS
|
3522 3612 MT 3536 3612 LS
|
3948 3612 MT 3962 3612 LS
|
3948 3612 MT 3962 3612 LS
|
4374 3612 MT 4388 3612 LS
|
4374 3612 MT 4388 3612 LS
|
4800 3612 MT 4814 3612 LS
|
4800 3612 MT 4814 3612 LS
|
5226 3612 MT 5240 3612 LS
|
5226 3612 MT 5240 3612 LS
|
5652 3612 MT 5666 3612 LS
|
5652 3612 MT 5666 3612 LS
|
6078 3612 MT 6092 3612 LS
|
6078 3612 MT 6092 3612 LS
|
3103 3682 MT 3316 3682 LS
|
3103 3682 MT 3316 3682 LS
|
3316 3682 MT 3316 3682 LT 3323 3641 LT 6298 3641 LT ST
|
3316 3682 MT 3316 3682 LT 3323 3641 LT 6298 3641 LT ST
|
3316 3682 MT 3316 3682 LT 3323 3722 LT 6298 3722 LT ST
|
3316 3682 MT 3316 3682 LT 3323 3722 LT 6298 3722 LT ST
|
(0) 3330 3682 WT pop 0 originOffset 37 add RSS
|
(0) 3330 3682 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) 3066 3865 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) 3066 3865 WT TSE RSS
|
3522 3756 MT 3536 3756 LS
|
3522 3756 MT 3536 3756 LS
|
3948 3756 MT 3962 3756 LS
|
3948 3756 MT 3962 3756 LS
|
4374 3756 MT 4388 3756 LS
|
4374 3756 MT 4388 3756 LS
|
4800 3756 MT 4814 3756 LS
|
4800 3756 MT 4814 3756 LS
|
5226 3756 MT 5240 3756 LS
|
5226 3756 MT 5240 3756 LS
|
5652 3756 MT 5666 3756 LS
|
5652 3756 MT 5666 3756 LS
|
6078 3756 MT 6092 3756 LS
|
6078 3756 MT 6092 3756 LS
|
3103 3826 MT 3316 3826 LS
|
3103 3826 MT 3316 3826 LS
|
3316 3826 MT 3316 3866 LS
|
3316 3826 MT 3316 3866 LS
|
3316 3866 MT 6298 3866 LS
|
3316 3866 MT 6298 3866 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) 3066 4009 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) 3066 4009 WT TSE RSS
|
3522 3900 MT 3536 3900 LS
|
3522 3900 MT 3536 3900 LS
|
3948 3900 MT 3962 3900 LS
|
3948 3900 MT 3962 3900 LS
|
4374 3900 MT 4388 3900 LS
|
4374 3900 MT 4388 3900 LS
|
4800 3900 MT 4814 3900 LS
|
4800 3900 MT 4814 3900 LS
|
5226 3900 MT 5240 3900 LS
|
5226 3900 MT 5240 3900 LS
|
5652 3900 MT 5666 3900 LS
|
5652 3900 MT 5666 3900 LS
|
6078 3900 MT 6092 3900 LS
|
6078 3900 MT 6092 3900 LS
|
3103 3970 MT 3316 3970 LS
|
3103 3970 MT 3316 3970 LS
|
3316 3970 MT 3316 3970 LT 3323 3929 LT 6298 3929 LT ST
|
3316 3970 MT 3316 3970 LT 3323 3929 LT 6298 3929 LT ST
|
3316 3970 MT 3316 3970 LT 3323 4010 LT 6298 4010 LT ST
|
3316 3970 MT 3316 3970 LT 3323 4010 LT 6298 4010 LT ST
|
(0) 3330 3970 WT pop 0 originOffset 37 add RSS
|
(0) 3330 3970 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) 3066 4153 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) 3066 4153 WT TSE RSS
|
3522 4044 MT 3536 4044 LS
|
3522 4044 MT 3536 4044 LS
|
3948 4044 MT 3962 4044 LS
|
3948 4044 MT 3962 4044 LS
|
4374 4044 MT 4388 4044 LS
|
4374 4044 MT 4388 4044 LS
|
4800 4044 MT 4814 4044 LS
|
4800 4044 MT 4814 4044 LS
|
5226 4044 MT 5240 4044 LS
|
5226 4044 MT 5240 4044 LS
|
5652 4044 MT 5666 4044 LS
|
5652 4044 MT 5666 4044 LS
|
6078 4044 MT 6092 4044 LS
|
6078 4044 MT 6092 4044 LS
|
3103 4114 MT 3316 4114 LS
|
3103 4114 MT 3316 4114 LS
|
3316 4114 MT 3316 4154 LS
|
3316 4114 MT 3316 4154 LS
|
3316 4154 MT 6298 4154 LS
|
3316 4154 MT 6298 4154 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) 3066 4297 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) 3066 4297 WT TSE RSS
|
3522 4188 MT 3536 4188 LS
|
3522 4188 MT 3536 4188 LS
|
3948 4188 MT 3962 4188 LS
|
3948 4188 MT 3962 4188 LS
|
4374 4188 MT 4388 4188 LS
|
4374 4188 MT 4388 4188 LS
|
4800 4188 MT 4814 4188 LS
|
4800 4188 MT 4814 4188 LS
|
5226 4188 MT 5240 4188 LS
|
5226 4188 MT 5240 4188 LS
|
5652 4188 MT 5666 4188 LS
|
5652 4188 MT 5666 4188 LS
|
6078 4188 MT 6092 4188 LS
|
6078 4188 MT 6092 4188 LS
|
3103 4258 MT 3316 4258 LS
|
3103 4258 MT 3316 4258 LS
|
3316 4258 MT 3316 4298 LS
|
3316 4258 MT 3316 4298 LS
|
3316 4298 MT 4168 4298 LS
|
3316 4298 MT 4168 4298 LS
|
4168 4298 MT 4168 4258 LS
|
4168 4298 MT 4168 4258 LS
|
4168 4258 MT 6298 4258 LS
|
4168 4258 MT 6298 4258 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) 3066 4441 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) 3066 4441 WT TSE RSS
|
3522 4332 MT 3536 4332 LS
|
3522 4332 MT 3536 4332 LS
|
3948 4332 MT 3962 4332 LS
|
3948 4332 MT 3962 4332 LS
|
4374 4332 MT 4388 4332 LS
|
4374 4332 MT 4388 4332 LS
|
4800 4332 MT 4814 4332 LS
|
4800 4332 MT 4814 4332 LS
|
5226 4332 MT 5240 4332 LS
|
5226 4332 MT 5240 4332 LS
|
5652 4332 MT 5666 4332 LS
|
5652 4332 MT 5666 4332 LS
|
6078 4332 MT 6092 4332 LS
|
6078 4332 MT 6092 4332 LS
|
3103 4402 MT 3316 4402 LS
|
3103 4402 MT 3316 4402 LS
|
3316 4402 MT 3316 4402 LT 3323 4361 LT 6298 4361 LT ST
|
3316 4402 MT 3316 4402 LT 3323 4361 LT 6298 4361 LT ST
|
3316 4402 MT 3316 4402 LT 3323 4442 LT 6298 4442 LT ST
|
3316 4402 MT 3316 4402 LT 3323 4442 LT 6298 4442 LT ST
|
(00000000) 3330 4402 WT pop 0 originOffset 37 add RSS
|
(00000000) 3330 4402 WT pop 0 originOffset 37 add RSS
|
% draw footer
|
% draw footer
|
(Entity:tb_or1200_cpu Architecture: Date: Sat Aug 14 00:33:37 EDT 2004 Row: 1 Page: 1) 300 4799 WT TSW RSS
|
(Entity:tb_or1200_cpu Architecture: Date: Sat Aug 14 00:33:37 EDT 2004 Row: 1 Page: 1) 300 4799 WT TSW RSS
|
grestore
|
grestore
|
showpage
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showpage
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%%Page: 2 2
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gsave
|
gsave
|
90 rotate 0.12 dup neg scale
|
90 rotate 0.12 dup neg scale
|
% dump string table
|
% dump string table
|
/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
|
/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
|
/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
|
/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
|
/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
|
/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
|
/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
|
/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
|
/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
|
/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
|
/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
|
/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
|
/ARC {5 -2 roll SX 5 2 roll arc} def
|
/ARC {5 -2 roll SX 5 2 roll arc} def
|
/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3103 def/REdge 5699 def/LabelWidth 3066 def
|
/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3103 def/REdge 5699 def/LabelWidth 3066 def
|
/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
|
/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
|
/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
|
/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/alu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/alu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_taken) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_taken) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/clk) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/clk) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/comp_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/comp_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_limm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_limm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/du_hwbkpt) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/du_hwbkpt) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/except_illegal) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/except_illegal) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) MLW
|
% draw waveform shading
|
% draw waveform shading
|
[] 0 SD
|
[] 0 SD
|
2.995 setlinewidth
|
2.995 setlinewidth
|
0 setlinejoin
|
0 setlinejoin
|
0 setlinecap
|
0 setlinecap
|
0 0 0 CL
|
0 0 0 CL
|
3103 370 MT 3316 370 LS
|
3103 370 MT 3316 370 LS
|
3316 370 MT 3316 370 LT 3323 329 LT 4161 329 LT 4168 370 LT ST
|
3316 370 MT 3316 370 LT 3323 329 LT 4161 329 LT 4168 370 LT ST
|
3316 370 MT 3316 370 LT 3323 410 LT 4161 410 LT 4168 370 LT ST
|
3316 370 MT 3316 370 LT 3323 410 LT 4161 410 LT 4168 370 LT ST
|
(0000) 3330 370 WT pop 0 originOffset 37 add RSS
|
(0000) 3330 370 WT pop 0 originOffset 37 add RSS
|
4168 370 MT 4168 370 LT 4175 329 LT 4587 329 LT 4594 370 LT ST
|
4168 370 MT 4168 370 LT 4175 329 LT 4587 329 LT 4594 370 LT ST
|
4168 370 MT 4168 370 LT 4175 410 LT 4587 410 LT 4594 370 LT ST
|
4168 370 MT 4168 370 LT 4175 410 LT 4587 410 LT 4594 370 LT ST
|
(1000) 4182 370 WT pop 0 originOffset 37 add RSS
|
(1000) 4182 370 WT pop 0 originOffset 37 add RSS
|
4594 370 MT 4594 370 LT 4601 329 LT 6298 329 LT ST
|
4594 370 MT 4594 370 LT 4601 329 LT 6298 329 LT ST
|
4594 370 MT 4594 370 LT 4601 410 LT 6298 410 LT ST
|
4594 370 MT 4594 370 LT 4601 410 LT 6298 410 LT ST
|
(1800) 4608 370 WT pop 0 originOffset 37 add RSS
|
(1800) 4608 370 WT pop 0 originOffset 37 add RSS
|
3103 514 MT 3316 514 LS
|
3103 514 MT 3316 514 LS
|
3316 514 MT 3316 514 LT 3323 473 LT 4587 473 LT 4594 514 LT ST
|
3316 514 MT 3316 514 LT 3323 473 LT 4587 473 LT 4594 514 LT ST
|
3316 514 MT 3316 514 LT 3323 554 LT 4587 554 LT 4594 514 LT ST
|
3316 514 MT 3316 514 LT 3323 554 LT 4587 554 LT 4594 514 LT ST
|
(0) 3330 514 WT pop 0 originOffset 37 add RSS
|
(0) 3330 514 WT pop 0 originOffset 37 add RSS
|
4594 514 MT 4594 514 LT 4601 473 LT 5013 473 LT 5020 514 LT ST
|
4594 514 MT 4594 514 LT 4601 473 LT 5013 473 LT 5020 514 LT ST
|
4594 514 MT 4594 514 LT 4601 554 LT 5013 554 LT 5020 514 LT ST
|
4594 514 MT 4594 514 LT 4601 554 LT 5013 554 LT 5020 514 LT ST
|
(1) 4608 514 WT pop 0 originOffset 37 add RSS
|
(1) 4608 514 WT pop 0 originOffset 37 add RSS
|
5020 514 MT 5020 514 LT 5027 473 LT 5439 473 LT 5446 514 LT ST
|
5020 514 MT 5020 514 LT 5027 473 LT 5439 473 LT 5446 514 LT ST
|
5020 514 MT 5020 514 LT 5027 554 LT 5439 554 LT 5446 514 LT ST
|
5020 514 MT 5020 514 LT 5027 554 LT 5439 554 LT 5446 514 LT ST
|
(2) 5034 514 WT pop 0 originOffset 37 add RSS
|
(2) 5034 514 WT pop 0 originOffset 37 add RSS
|
5446 514 MT 5446 514 LT 5453 473 LT 5865 473 LT 5872 514 LT ST
|
5446 514 MT 5446 514 LT 5453 473 LT 5865 473 LT 5872 514 LT ST
|
5446 514 MT 5446 514 LT 5453 554 LT 5865 554 LT 5872 514 LT ST
|
5446 514 MT 5446 514 LT 5453 554 LT 5865 554 LT 5872 514 LT ST
|
(3) 5460 514 WT pop 0 originOffset 37 add RSS
|
(3) 5460 514 WT pop 0 originOffset 37 add RSS
|
5872 514 MT 5872 514 LT 5879 473 LT 6298 473 LT ST
|
5872 514 MT 5872 514 LT 5879 473 LT 6298 473 LT ST
|
5872 514 MT 5872 514 LT 5879 554 LT 6298 554 LT ST
|
5872 514 MT 5872 514 LT 5879 554 LT 6298 554 LT ST
|
(4) 5886 514 WT pop 0 originOffset 37 add RSS
|
(4) 5886 514 WT pop 0 originOffset 37 add RSS
|
3103 658 MT 3316 658 LS
|
3103 658 MT 3316 658 LS
|
3316 658 MT 3316 658 LT 3323 617 LT 5013 617 LT 5020 658 LT ST
|
3316 658 MT 3316 658 LT 3323 617 LT 5013 617 LT 5020 658 LT ST
|
3316 658 MT 3316 658 LT 3323 698 LT 5013 698 LT 5020 658 LT ST
|
3316 658 MT 3316 658 LT 3323 698 LT 5013 698 LT 5020 658 LT ST
|
(0) 3330 658 WT pop 0 originOffset 37 add RSS
|
(0) 3330 658 WT pop 0 originOffset 37 add RSS
|
5020 658 MT 5020 658 LT 5027 617 LT 5439 617 LT 5446 658 LT ST
|
5020 658 MT 5020 658 LT 5027 617 LT 5439 617 LT 5446 658 LT ST
|
5020 658 MT 5020 658 LT 5027 698 LT 5439 698 LT 5446 658 LT ST
|
5020 658 MT 5020 658 LT 5027 698 LT 5439 698 LT 5446 658 LT ST
|
(1) 5034 658 WT pop 0 originOffset 37 add RSS
|
(1) 5034 658 WT pop 0 originOffset 37 add RSS
|
5446 658 MT 5446 658 LT 5453 617 LT 5865 617 LT 5872 658 LT ST
|
5446 658 MT 5446 658 LT 5453 617 LT 5865 617 LT 5872 658 LT ST
|
5446 658 MT 5446 658 LT 5453 698 LT 5865 698 LT 5872 658 LT ST
|
5446 658 MT 5446 658 LT 5453 698 LT 5865 698 LT 5872 658 LT ST
|
(2) 5460 658 WT pop 0 originOffset 37 add RSS
|
(2) 5460 658 WT pop 0 originOffset 37 add RSS
|
5872 658 MT 5872 658 LT 5879 617 LT 6298 617 LT ST
|
5872 658 MT 5872 658 LT 5879 617 LT 6298 617 LT ST
|
5872 658 MT 5872 658 LT 5879 698 LT 6298 698 LT ST
|
5872 658 MT 5872 658 LT 5879 698 LT 6298 698 LT ST
|
(3) 5886 658 WT pop 0 originOffset 37 add RSS
|
(3) 5886 658 WT pop 0 originOffset 37 add RSS
|
3103 802 MT 3955 802 LS
|
3103 802 MT 3955 802 LS
|
3955 802 MT 3955 842 LS
|
3955 802 MT 3955 842 LS
|
3955 842 MT 6298 842 LS
|
3955 842 MT 6298 842 LS
|
3103 946 MT 3316 946 LS
|
3103 946 MT 3316 946 LS
|
3316 946 MT 3316 946 LT 3323 905 LT 5013 905 LT 5020 946 LT ST
|
3316 946 MT 3316 946 LT 3323 905 LT 5013 905 LT 5020 946 LT ST
|
3316 946 MT 3316 946 LT 3323 986 LT 5013 986 LT 5020 946 LT ST
|
3316 946 MT 3316 946 LT 3323 986 LT 5013 986 LT 5020 946 LT ST
|
(14410000) 3330 946 WT pop 0 originOffset 37 add RSS
|
(14410000) 3330 946 WT pop 0 originOffset 37 add RSS
|
5020 946 MT 5020 946 LT 5027 905 LT 6298 905 LT ST
|
5020 946 MT 5020 946 LT 5027 905 LT 6298 905 LT ST
|
5020 946 MT 5020 946 LT 5027 986 LT 6298 986 LT ST
|
5020 946 MT 5020 946 LT 5027 986 LT 6298 986 LT ST
|
(14610000) 5034 946 WT pop 0 originOffset 37 add RSS
|
(14610000) 5034 946 WT pop 0 originOffset 37 add RSS
|
3103 1090 MT 3316 1090 LS
|
3103 1090 MT 3316 1090 LS
|
3316 1090 MT 3316 1090 LT 3323 1049 LT 4587 1049 LT 4594 1090 LT ST
|
3316 1090 MT 3316 1090 LT 3323 1049 LT 4587 1049 LT 4594 1090 LT ST
|
3316 1090 MT 3316 1090 LT 3323 1130 LT 4587 1130 LT 4594 1090 LT ST
|
3316 1090 MT 3316 1090 LT 3323 1130 LT 4587 1130 LT 4594 1090 LT ST
|
(00) 3330 1090 WT pop 0 originOffset 37 add RSS
|
(00) 3330 1090 WT pop 0 originOffset 37 add RSS
|
4594 1090 MT 4594 1090 LT 4601 1049 LT 5013 1049 LT 5020 1090 LT ST
|
4594 1090 MT 4594 1090 LT 4601 1049 LT 5013 1049 LT 5020 1090 LT ST
|
4594 1090 MT 4594 1090 LT 4601 1130 LT 5013 1130 LT 5020 1090 LT ST
|
4594 1090 MT 4594 1090 LT 4601 1130 LT 5013 1130 LT 5020 1090 LT ST
|
(02) 4608 1090 WT pop 0 originOffset 37 add RSS
|
(02) 4608 1090 WT pop 0 originOffset 37 add RSS
|
5020 1090 MT 5020 1090 LT 5027 1049 LT 6298 1049 LT ST
|
5020 1090 MT 5020 1090 LT 5027 1049 LT 6298 1049 LT ST
|
5020 1090 MT 5020 1090 LT 5027 1130 LT 6298 1130 LT ST
|
5020 1090 MT 5020 1090 LT 5027 1130 LT 6298 1130 LT ST
|
(03) 5034 1090 WT pop 0 originOffset 37 add RSS
|
(03) 5034 1090 WT pop 0 originOffset 37 add RSS
|
3103 1234 MT 3316 1234 LS
|
3103 1234 MT 3316 1234 LS
|
3316 1234 MT 3316 1274 LS
|
3316 1234 MT 3316 1274 LS
|
3316 1274 MT 6298 1274 LS
|
3316 1274 MT 6298 1274 LS
|
% draw timeline
|
% draw timeline
|
3146 4533 MT 3146 4570 LS
|
3146 4533 MT 3146 4570 LS
|
3188 4533 MT 3188 4570 LS
|
3188 4533 MT 3188 4570 LS
|
3231 4533 MT 3231 4570 LS
|
3231 4533 MT 3231 4570 LS
|
3273 4533 MT 3273 4570 LS
|
3273 4533 MT 3273 4570 LS
|
3316 4533 MT 3316 4570 LS
|
3316 4533 MT 3316 4570 LS
|
3359 4533 MT 3359 4570 LS
|
3359 4533 MT 3359 4570 LS
|
3401 4533 MT 3401 4570 LS
|
3401 4533 MT 3401 4570 LS
|
3444 4533 MT 3444 4570 LS
|
3444 4533 MT 3444 4570 LS
|
3486 4533 MT 3486 4570 LS
|
3486 4533 MT 3486 4570 LS
|
(0) 3103 4649 WT TS RSS
|
(0) 3103 4649 WT TS RSS
|
3572 4533 MT 3572 4570 LS
|
3572 4533 MT 3572 4570 LS
|
3614 4533 MT 3614 4570 LS
|
3614 4533 MT 3614 4570 LS
|
3657 4533 MT 3657 4570 LS
|
3657 4533 MT 3657 4570 LS
|
3699 4533 MT 3699 4570 LS
|
3699 4533 MT 3699 4570 LS
|
3742 4533 MT 3742 4570 LS
|
3742 4533 MT 3742 4570 LS
|
3785 4533 MT 3785 4570 LS
|
3785 4533 MT 3785 4570 LS
|
3827 4533 MT 3827 4570 LS
|
3827 4533 MT 3827 4570 LS
|
3870 4533 MT 3870 4570 LS
|
3870 4533 MT 3870 4570 LS
|
3912 4533 MT 3912 4570 LS
|
3912 4533 MT 3912 4570 LS
|
3529 4506 MT 3529 4570 LS
|
3529 4506 MT 3529 4570 LS
|
3998 4533 MT 3998 4570 LS
|
3998 4533 MT 3998 4570 LS
|
4040 4533 MT 4040 4570 LS
|
4040 4533 MT 4040 4570 LS
|
4083 4533 MT 4083 4570 LS
|
4083 4533 MT 4083 4570 LS
|
4125 4533 MT 4125 4570 LS
|
4125 4533 MT 4125 4570 LS
|
4168 4533 MT 4168 4570 LS
|
4168 4533 MT 4168 4570 LS
|
4211 4533 MT 4211 4570 LS
|
4211 4533 MT 4211 4570 LS
|
4253 4533 MT 4253 4570 LS
|
4253 4533 MT 4253 4570 LS
|
4296 4533 MT 4296 4570 LS
|
4296 4533 MT 4296 4570 LS
|
4338 4533 MT 4338 4570 LS
|
4338 4533 MT 4338 4570 LS
|
3955 4506 MT 3955 4570 LS
|
3955 4506 MT 3955 4570 LS
|
(20) 3955 4649 WT TS RSS
|
(20) 3955 4649 WT TS RSS
|
4424 4533 MT 4424 4570 LS
|
4424 4533 MT 4424 4570 LS
|
4466 4533 MT 4466 4570 LS
|
4466 4533 MT 4466 4570 LS
|
4509 4533 MT 4509 4570 LS
|
4509 4533 MT 4509 4570 LS
|
4551 4533 MT 4551 4570 LS
|
4551 4533 MT 4551 4570 LS
|
4594 4533 MT 4594 4570 LS
|
4594 4533 MT 4594 4570 LS
|
4637 4533 MT 4637 4570 LS
|
4637 4533 MT 4637 4570 LS
|
4679 4533 MT 4679 4570 LS
|
4679 4533 MT 4679 4570 LS
|
4722 4533 MT 4722 4570 LS
|
4722 4533 MT 4722 4570 LS
|
4764 4533 MT 4764 4570 LS
|
4764 4533 MT 4764 4570 LS
|
4381 4506 MT 4381 4570 LS
|
4381 4506 MT 4381 4570 LS
|
4850 4533 MT 4850 4570 LS
|
4850 4533 MT 4850 4570 LS
|
4892 4533 MT 4892 4570 LS
|
4892 4533 MT 4892 4570 LS
|
4935 4533 MT 4935 4570 LS
|
4935 4533 MT 4935 4570 LS
|
4977 4533 MT 4977 4570 LS
|
4977 4533 MT 4977 4570 LS
|
5020 4533 MT 5020 4570 LS
|
5020 4533 MT 5020 4570 LS
|
5063 4533 MT 5063 4570 LS
|
5063 4533 MT 5063 4570 LS
|
5105 4533 MT 5105 4570 LS
|
5105 4533 MT 5105 4570 LS
|
5148 4533 MT 5148 4570 LS
|
5148 4533 MT 5148 4570 LS
|
5190 4533 MT 5190 4570 LS
|
5190 4533 MT 5190 4570 LS
|
4807 4506 MT 4807 4570 LS
|
4807 4506 MT 4807 4570 LS
|
(40) 4807 4649 WT TS RSS
|
(40) 4807 4649 WT TS RSS
|
5276 4533 MT 5276 4570 LS
|
5276 4533 MT 5276 4570 LS
|
5318 4533 MT 5318 4570 LS
|
5318 4533 MT 5318 4570 LS
|
5361 4533 MT 5361 4570 LS
|
5361 4533 MT 5361 4570 LS
|
5403 4533 MT 5403 4570 LS
|
5403 4533 MT 5403 4570 LS
|
5446 4533 MT 5446 4570 LS
|
5446 4533 MT 5446 4570 LS
|
5489 4533 MT 5489 4570 LS
|
5489 4533 MT 5489 4570 LS
|
5531 4533 MT 5531 4570 LS
|
5531 4533 MT 5531 4570 LS
|
5574 4533 MT 5574 4570 LS
|
5574 4533 MT 5574 4570 LS
|
5616 4533 MT 5616 4570 LS
|
5616 4533 MT 5616 4570 LS
|
5233 4506 MT 5233 4570 LS
|
5233 4506 MT 5233 4570 LS
|
5702 4533 MT 5702 4570 LS
|
5702 4533 MT 5702 4570 LS
|
5744 4533 MT 5744 4570 LS
|
5744 4533 MT 5744 4570 LS
|
5787 4533 MT 5787 4570 LS
|
5787 4533 MT 5787 4570 LS
|
5829 4533 MT 5829 4570 LS
|
5829 4533 MT 5829 4570 LS
|
5872 4533 MT 5872 4570 LS
|
5872 4533 MT 5872 4570 LS
|
5915 4533 MT 5915 4570 LS
|
5915 4533 MT 5915 4570 LS
|
5957 4533 MT 5957 4570 LS
|
5957 4533 MT 5957 4570 LS
|
6000 4533 MT 6000 4570 LS
|
6000 4533 MT 6000 4570 LS
|
6042 4533 MT 6042 4570 LS
|
6042 4533 MT 6042 4570 LS
|
5659 4506 MT 5659 4570 LS
|
5659 4506 MT 5659 4570 LS
|
(60) 5659 4649 WT TS RSS
|
(60) 5659 4649 WT TS RSS
|
6128 4533 MT 6128 4570 LS
|
6128 4533 MT 6128 4570 LS
|
6170 4533 MT 6170 4570 LS
|
6170 4533 MT 6170 4570 LS
|
6213 4533 MT 6213 4570 LS
|
6213 4533 MT 6213 4570 LS
|
6255 4533 MT 6255 4570 LS
|
6255 4533 MT 6255 4570 LS
|
6298 4533 MT 6298 4570 LS
|
6298 4533 MT 6298 4570 LS
|
6341 4533 MT 6341 4570 LS
|
6341 4533 MT 6341 4570 LS
|
6383 4533 MT 6383 4570 LS
|
6383 4533 MT 6383 4570 LS
|
6426 4533 MT 6426 4570 LS
|
6426 4533 MT 6426 4570 LS
|
6468 4533 MT 6468 4570 LS
|
6468 4533 MT 6468 4570 LS
|
6085 4506 MT 6085 4570 LS
|
6085 4506 MT 6085 4570 LS
|
% draw grid
|
% draw grid
|
3529 300 MT 3529 4506 LS
|
3529 300 MT 3529 4506 LS
|
3955 300 MT 3955 4506 LS
|
3955 300 MT 3955 4506 LS
|
4381 300 MT 4381 4506 LS
|
4381 300 MT 4381 4506 LS
|
4807 300 MT 4807 4506 LS
|
4807 300 MT 4807 4506 LS
|
5233 300 MT 5233 4506 LS
|
5233 300 MT 5233 4506 LS
|
5659 300 MT 5659 4506 LS
|
5659 300 MT 5659 4506 LS
|
6085 300 MT 6085 4506 LS
|
6085 300 MT 6085 4506 LS
|
% draw waveforms
|
% draw waveforms
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) 3066 409 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) 3066 409 WT TSE RSS
|
3522 300 MT 3536 300 LS
|
3522 300 MT 3536 300 LS
|
3948 300 MT 3962 300 LS
|
3948 300 MT 3962 300 LS
|
4374 300 MT 4388 300 LS
|
4374 300 MT 4388 300 LS
|
4800 300 MT 4814 300 LS
|
4800 300 MT 4814 300 LS
|
5226 300 MT 5240 300 LS
|
5226 300 MT 5240 300 LS
|
5652 300 MT 5666 300 LS
|
5652 300 MT 5666 300 LS
|
6078 300 MT 6092 300 LS
|
6078 300 MT 6092 300 LS
|
3103 370 MT 3316 370 LS
|
3103 370 MT 3316 370 LS
|
3316 370 MT 3316 370 LT 3323 329 LT 4161 329 LT 4168 370 LT ST
|
3316 370 MT 3316 370 LT 3323 329 LT 4161 329 LT 4168 370 LT ST
|
3316 370 MT 3316 370 LT 3323 410 LT 4161 410 LT 4168 370 LT ST
|
3316 370 MT 3316 370 LT 3323 410 LT 4161 410 LT 4168 370 LT ST
|
(0000) 3330 370 WT pop 0 originOffset 37 add RSS
|
(0000) 3330 370 WT pop 0 originOffset 37 add RSS
|
4168 370 MT 4168 370 LT 4175 329 LT 4587 329 LT 4594 370 LT ST
|
4168 370 MT 4168 370 LT 4175 329 LT 4587 329 LT 4594 370 LT ST
|
4168 370 MT 4168 370 LT 4175 410 LT 4587 410 LT 4594 370 LT ST
|
4168 370 MT 4168 370 LT 4175 410 LT 4587 410 LT 4594 370 LT ST
|
(1000) 4182 370 WT pop 0 originOffset 37 add RSS
|
(1000) 4182 370 WT pop 0 originOffset 37 add RSS
|
4594 370 MT 4594 370 LT 4601 329 LT 6298 329 LT ST
|
4594 370 MT 4594 370 LT 4601 329 LT 6298 329 LT ST
|
4594 370 MT 4594 370 LT 4601 410 LT 6298 410 LT ST
|
4594 370 MT 4594 370 LT 4601 410 LT 6298 410 LT ST
|
(1800) 4608 370 WT pop 0 originOffset 37 add RSS
|
(1800) 4608 370 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) 3066 553 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) 3066 553 WT TSE RSS
|
3522 444 MT 3536 444 LS
|
3522 444 MT 3536 444 LS
|
3948 444 MT 3962 444 LS
|
3948 444 MT 3962 444 LS
|
4374 444 MT 4388 444 LS
|
4374 444 MT 4388 444 LS
|
4800 444 MT 4814 444 LS
|
4800 444 MT 4814 444 LS
|
5226 444 MT 5240 444 LS
|
5226 444 MT 5240 444 LS
|
5652 444 MT 5666 444 LS
|
5652 444 MT 5666 444 LS
|
6078 444 MT 6092 444 LS
|
6078 444 MT 6092 444 LS
|
3103 514 MT 3316 514 LS
|
3103 514 MT 3316 514 LS
|
3316 514 MT 3316 514 LT 3323 473 LT 4587 473 LT 4594 514 LT ST
|
3316 514 MT 3316 514 LT 3323 473 LT 4587 473 LT 4594 514 LT ST
|
3316 514 MT 3316 514 LT 3323 554 LT 4587 554 LT 4594 514 LT ST
|
3316 514 MT 3316 514 LT 3323 554 LT 4587 554 LT 4594 514 LT ST
|
(0) 3330 514 WT pop 0 originOffset 37 add RSS
|
(0) 3330 514 WT pop 0 originOffset 37 add RSS
|
4594 514 MT 4594 514 LT 4601 473 LT 5013 473 LT 5020 514 LT ST
|
4594 514 MT 4594 514 LT 4601 473 LT 5013 473 LT 5020 514 LT ST
|
4594 514 MT 4594 514 LT 4601 554 LT 5013 554 LT 5020 514 LT ST
|
4594 514 MT 4594 514 LT 4601 554 LT 5013 554 LT 5020 514 LT ST
|
(1) 4608 514 WT pop 0 originOffset 37 add RSS
|
(1) 4608 514 WT pop 0 originOffset 37 add RSS
|
5020 514 MT 5020 514 LT 5027 473 LT 5439 473 LT 5446 514 LT ST
|
5020 514 MT 5020 514 LT 5027 473 LT 5439 473 LT 5446 514 LT ST
|
5020 514 MT 5020 514 LT 5027 554 LT 5439 554 LT 5446 514 LT ST
|
5020 514 MT 5020 514 LT 5027 554 LT 5439 554 LT 5446 514 LT ST
|
(2) 5034 514 WT pop 0 originOffset 37 add RSS
|
(2) 5034 514 WT pop 0 originOffset 37 add RSS
|
5446 514 MT 5446 514 LT 5453 473 LT 5865 473 LT 5872 514 LT ST
|
5446 514 MT 5446 514 LT 5453 473 LT 5865 473 LT 5872 514 LT ST
|
5446 514 MT 5446 514 LT 5453 554 LT 5865 554 LT 5872 514 LT ST
|
5446 514 MT 5446 514 LT 5453 554 LT 5865 554 LT 5872 514 LT ST
|
(3) 5460 514 WT pop 0 originOffset 37 add RSS
|
(3) 5460 514 WT pop 0 originOffset 37 add RSS
|
5872 514 MT 5872 514 LT 5879 473 LT 6298 473 LT ST
|
5872 514 MT 5872 514 LT 5879 473 LT 6298 473 LT ST
|
5872 514 MT 5872 514 LT 5879 554 LT 6298 554 LT ST
|
5872 514 MT 5872 514 LT 5879 554 LT 6298 554 LT ST
|
(4) 5886 514 WT pop 0 originOffset 37 add RSS
|
(4) 5886 514 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) 3066 697 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) 3066 697 WT TSE RSS
|
3522 588 MT 3536 588 LS
|
3522 588 MT 3536 588 LS
|
3948 588 MT 3962 588 LS
|
3948 588 MT 3962 588 LS
|
4374 588 MT 4388 588 LS
|
4374 588 MT 4388 588 LS
|
4800 588 MT 4814 588 LS
|
4800 588 MT 4814 588 LS
|
5226 588 MT 5240 588 LS
|
5226 588 MT 5240 588 LS
|
5652 588 MT 5666 588 LS
|
5652 588 MT 5666 588 LS
|
6078 588 MT 6092 588 LS
|
6078 588 MT 6092 588 LS
|
3103 658 MT 3316 658 LS
|
3103 658 MT 3316 658 LS
|
3316 658 MT 3316 658 LT 3323 617 LT 5013 617 LT 5020 658 LT ST
|
3316 658 MT 3316 658 LT 3323 617 LT 5013 617 LT 5020 658 LT ST
|
3316 658 MT 3316 658 LT 3323 698 LT 5013 698 LT 5020 658 LT ST
|
3316 658 MT 3316 658 LT 3323 698 LT 5013 698 LT 5020 658 LT ST
|
(0) 3330 658 WT pop 0 originOffset 37 add RSS
|
(0) 3330 658 WT pop 0 originOffset 37 add RSS
|
5020 658 MT 5020 658 LT 5027 617 LT 5439 617 LT 5446 658 LT ST
|
5020 658 MT 5020 658 LT 5027 617 LT 5439 617 LT 5446 658 LT ST
|
5020 658 MT 5020 658 LT 5027 698 LT 5439 698 LT 5446 658 LT ST
|
5020 658 MT 5020 658 LT 5027 698 LT 5439 698 LT 5446 658 LT ST
|
(1) 5034 658 WT pop 0 originOffset 37 add RSS
|
(1) 5034 658 WT pop 0 originOffset 37 add RSS
|
5446 658 MT 5446 658 LT 5453 617 LT 5865 617 LT 5872 658 LT ST
|
5446 658 MT 5446 658 LT 5453 617 LT 5865 617 LT 5872 658 LT ST
|
5446 658 MT 5446 658 LT 5453 698 LT 5865 698 LT 5872 658 LT ST
|
5446 658 MT 5446 658 LT 5453 698 LT 5865 698 LT 5872 658 LT ST
|
(2) 5460 658 WT pop 0 originOffset 37 add RSS
|
(2) 5460 658 WT pop 0 originOffset 37 add RSS
|
5872 658 MT 5872 658 LT 5879 617 LT 6298 617 LT ST
|
5872 658 MT 5872 658 LT 5879 617 LT 6298 617 LT ST
|
5872 658 MT 5872 658 LT 5879 698 LT 6298 698 LT ST
|
5872 658 MT 5872 658 LT 5879 698 LT 6298 698 LT ST
|
(3) 5886 658 WT pop 0 originOffset 37 add RSS
|
(3) 5886 658 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) 3066 841 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) 3066 841 WT TSE RSS
|
3522 732 MT 3536 732 LS
|
3522 732 MT 3536 732 LS
|
3948 732 MT 3962 732 LS
|
3948 732 MT 3962 732 LS
|
4374 732 MT 4388 732 LS
|
4374 732 MT 4388 732 LS
|
4800 732 MT 4814 732 LS
|
4800 732 MT 4814 732 LS
|
5226 732 MT 5240 732 LS
|
5226 732 MT 5240 732 LS
|
5652 732 MT 5666 732 LS
|
5652 732 MT 5666 732 LS
|
6078 732 MT 6092 732 LS
|
6078 732 MT 6092 732 LS
|
3103 802 MT 3955 802 LS
|
3103 802 MT 3955 802 LS
|
3955 802 MT 3955 842 LS
|
3955 802 MT 3955 842 LS
|
3955 842 MT 6298 842 LS
|
3955 842 MT 6298 842 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) 3066 985 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) 3066 985 WT TSE RSS
|
3522 876 MT 3536 876 LS
|
3522 876 MT 3536 876 LS
|
3948 876 MT 3962 876 LS
|
3948 876 MT 3962 876 LS
|
4374 876 MT 4388 876 LS
|
4374 876 MT 4388 876 LS
|
4800 876 MT 4814 876 LS
|
4800 876 MT 4814 876 LS
|
5226 876 MT 5240 876 LS
|
5226 876 MT 5240 876 LS
|
5652 876 MT 5666 876 LS
|
5652 876 MT 5666 876 LS
|
6078 876 MT 6092 876 LS
|
6078 876 MT 6092 876 LS
|
3103 946 MT 3316 946 LS
|
3103 946 MT 3316 946 LS
|
3316 946 MT 3316 946 LT 3323 905 LT 5013 905 LT 5020 946 LT ST
|
3316 946 MT 3316 946 LT 3323 905 LT 5013 905 LT 5020 946 LT ST
|
3316 946 MT 3316 946 LT 3323 986 LT 5013 986 LT 5020 946 LT ST
|
3316 946 MT 3316 946 LT 3323 986 LT 5013 986 LT 5020 946 LT ST
|
(14410000) 3330 946 WT pop 0 originOffset 37 add RSS
|
(14410000) 3330 946 WT pop 0 originOffset 37 add RSS
|
5020 946 MT 5020 946 LT 5027 905 LT 6298 905 LT ST
|
5020 946 MT 5020 946 LT 5027 905 LT 6298 905 LT ST
|
5020 946 MT 5020 946 LT 5027 986 LT 6298 986 LT ST
|
5020 946 MT 5020 946 LT 5027 986 LT 6298 986 LT ST
|
(14610000) 5034 946 WT pop 0 originOffset 37 add RSS
|
(14610000) 5034 946 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) 3066 1129 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) 3066 1129 WT TSE RSS
|
3522 1020 MT 3536 1020 LS
|
3522 1020 MT 3536 1020 LS
|
3948 1020 MT 3962 1020 LS
|
3948 1020 MT 3962 1020 LS
|
4374 1020 MT 4388 1020 LS
|
4374 1020 MT 4388 1020 LS
|
4800 1020 MT 4814 1020 LS
|
4800 1020 MT 4814 1020 LS
|
5226 1020 MT 5240 1020 LS
|
5226 1020 MT 5240 1020 LS
|
5652 1020 MT 5666 1020 LS
|
5652 1020 MT 5666 1020 LS
|
6078 1020 MT 6092 1020 LS
|
6078 1020 MT 6092 1020 LS
|
3103 1090 MT 3316 1090 LS
|
3103 1090 MT 3316 1090 LS
|
3316 1090 MT 3316 1090 LT 3323 1049 LT 4587 1049 LT 4594 1090 LT ST
|
3316 1090 MT 3316 1090 LT 3323 1049 LT 4587 1049 LT 4594 1090 LT ST
|
3316 1090 MT 3316 1090 LT 3323 1130 LT 4587 1130 LT 4594 1090 LT ST
|
3316 1090 MT 3316 1090 LT 3323 1130 LT 4587 1130 LT 4594 1090 LT ST
|
(00) 3330 1090 WT pop 0 originOffset 37 add RSS
|
(00) 3330 1090 WT pop 0 originOffset 37 add RSS
|
4594 1090 MT 4594 1090 LT 4601 1049 LT 5013 1049 LT 5020 1090 LT ST
|
4594 1090 MT 4594 1090 LT 4601 1049 LT 5013 1049 LT 5020 1090 LT ST
|
4594 1090 MT 4594 1090 LT 4601 1130 LT 5013 1130 LT 5020 1090 LT ST
|
4594 1090 MT 4594 1090 LT 4601 1130 LT 5013 1130 LT 5020 1090 LT ST
|
(02) 4608 1090 WT pop 0 originOffset 37 add RSS
|
(02) 4608 1090 WT pop 0 originOffset 37 add RSS
|
5020 1090 MT 5020 1090 LT 5027 1049 LT 6298 1049 LT ST
|
5020 1090 MT 5020 1090 LT 5027 1049 LT 6298 1049 LT ST
|
5020 1090 MT 5020 1090 LT 5027 1130 LT 6298 1130 LT ST
|
5020 1090 MT 5020 1090 LT 5027 1130 LT 6298 1130 LT ST
|
(03) 5034 1090 WT pop 0 originOffset 37 add RSS
|
(03) 5034 1090 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) 3066 1273 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) 3066 1273 WT TSE RSS
|
3522 1164 MT 3536 1164 LS
|
3522 1164 MT 3536 1164 LS
|
3948 1164 MT 3962 1164 LS
|
3948 1164 MT 3962 1164 LS
|
4374 1164 MT 4388 1164 LS
|
4374 1164 MT 4388 1164 LS
|
4800 1164 MT 4814 1164 LS
|
4800 1164 MT 4814 1164 LS
|
5226 1164 MT 5240 1164 LS
|
5226 1164 MT 5240 1164 LS
|
5652 1164 MT 5666 1164 LS
|
5652 1164 MT 5666 1164 LS
|
6078 1164 MT 6092 1164 LS
|
6078 1164 MT 6092 1164 LS
|
3103 1234 MT 3316 1234 LS
|
3103 1234 MT 3316 1234 LS
|
3316 1234 MT 3316 1274 LS
|
3316 1234 MT 3316 1274 LS
|
3316 1274 MT 6298 1274 LS
|
3316 1274 MT 6298 1274 LS
|
% draw footer
|
% draw footer
|
(Entity:tb_or1200_cpu Architecture: Date: Sat Aug 14 00:33:37 EDT 2004 Row: 1 Page: 2) 300 4799 WT TSW RSS
|
(Entity:tb_or1200_cpu Architecture: Date: Sat Aug 14 00:33:37 EDT 2004 Row: 1 Page: 2) 300 4799 WT TSW RSS
|
grestore
|
grestore
|
showpage
|
showpage
|
%%Page: 3 3
|
%%Page: 3 3
|
gsave
|
gsave
|
90 rotate 0.12 dup neg scale
|
90 rotate 0.12 dup neg scale
|
% dump string table
|
% dump string table
|
/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
|
/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
|
/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
|
/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
|
/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
|
/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
|
/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
|
/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
|
/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
|
/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
|
/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
|
/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
|
/ARC {5 -2 roll SX 5 2 roll arc} def
|
/ARC {5 -2 roll SX 5 2 roll arc} def
|
/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3103 def/REdge 5699 def/LabelWidth 3066 def
|
/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3103 def/REdge 5699 def/LabelWidth 3066 def
|
/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
|
/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
|
/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
|
/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/alu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/alu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_taken) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_taken) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/clk) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/clk) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/comp_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/comp_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_limm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_limm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/du_hwbkpt) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/du_hwbkpt) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/except_illegal) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/except_illegal) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) MLW
|
% draw waveform shading
|
% draw waveform shading
|
[] 0 SD
|
[] 0 SD
|
2.995 setlinewidth
|
2.995 setlinewidth
|
0 setlinejoin
|
0 setlinejoin
|
0 setlinecap
|
0 setlinecap
|
0 0 0 CL
|
0 0 0 CL
|
3103 370 MT 6298 370 LS
|
3103 370 MT 6298 370 LS
|
3103 554 MT 6298 554 LS
|
3103 554 MT 6298 554 LS
|
3103 698 MT 6298 698 LS
|
3103 698 MT 6298 698 LS
|
3103 761 MT 3103 761 LT 6298 761 LT ST
|
3103 761 MT 3103 761 LT 6298 761 LT ST
|
3103 842 MT 3103 842 LT 6298 842 LT ST
|
3103 842 MT 3103 842 LT 6298 842 LT ST
|
(14610000) 3117 802 WT pop 0 originOffset 37 add RSS
|
(14610000) 3117 802 WT pop 0 originOffset 37 add RSS
|
3103 986 MT 6298 986 LS
|
3103 986 MT 6298 986 LS
|
3103 1050 MT 6298 1050 LS
|
3103 1050 MT 6298 1050 LS
|
3103 1193 MT 3103 1193 LT 6298 1193 LT ST
|
3103 1193 MT 3103 1193 LT 6298 1193 LT ST
|
3103 1274 MT 3103 1274 LT 6298 1274 LT ST
|
3103 1274 MT 3103 1274 LT 6298 1274 LT ST
|
(14610000) 3117 1234 WT pop 0 originOffset 37 add RSS
|
(14610000) 3117 1234 WT pop 0 originOffset 37 add RSS
|
3103 1418 MT 6298 1418 LS
|
3103 1418 MT 6298 1418 LS
|
3103 1481 MT 3103 1481 LT 6298 1481 LT ST
|
3103 1481 MT 3103 1481 LT 6298 1481 LT ST
|
3103 1562 MT 3103 1562 LT 6298 1562 LT ST
|
3103 1562 MT 3103 1562 LT 6298 1562 LT ST
|
(00000000) 3117 1522 WT pop 0 originOffset 37 add RSS
|
(00000000) 3117 1522 WT pop 0 originOffset 37 add RSS
|
3103 1625 MT 3103 1625 LT 6298 1625 LT ST
|
3103 1625 MT 3103 1625 LT 6298 1625 LT ST
|
3103 1706 MT 3103 1706 LT 6298 1706 LT ST
|
3103 1706 MT 3103 1706 LT 6298 1706 LT ST
|
(0) 3117 1666 WT pop 0 originOffset 37 add RSS
|
(0) 3117 1666 WT pop 0 originOffset 37 add RSS
|
3103 1769 MT 3103 1769 LT 6298 1769 LT ST
|
3103 1769 MT 3103 1769 LT 6298 1769 LT ST
|
3103 1850 MT 3103 1850 LT 6298 1850 LT ST
|
3103 1850 MT 3103 1850 LT 6298 1850 LT ST
|
(0) 3117 1810 WT pop 0 originOffset 37 add RSS
|
(0) 3117 1810 WT pop 0 originOffset 37 add RSS
|
3103 1913 MT 3103 1913 LT 6298 1913 LT ST
|
3103 1913 MT 3103 1913 LT 6298 1913 LT ST
|
3103 1994 MT 3103 1994 LT 6298 1994 LT ST
|
3103 1994 MT 3103 1994 LT 6298 1994 LT ST
|
(0) 3117 1954 WT pop 0 originOffset 37 add RSS
|
(0) 3117 1954 WT pop 0 originOffset 37 add RSS
|
3103 2138 MT 6298 2138 LS
|
3103 2138 MT 6298 2138 LS
|
3103 2201 MT 3103 2201 LT 6298 2201 LT ST
|
3103 2201 MT 3103 2201 LT 6298 2201 LT ST
|
3103 2282 MT 3103 2282 LT 6298 2282 LT ST
|
3103 2282 MT 3103 2282 LT 6298 2282 LT ST
|
(0) 3117 2242 WT pop 0 originOffset 37 add RSS
|
(0) 3117 2242 WT pop 0 originOffset 37 add RSS
|
3103 2345 MT 3103 2345 LT 6298 2345 LT ST
|
3103 2345 MT 3103 2345 LT 6298 2345 LT ST
|
3103 2426 MT 3103 2426 LT 6298 2426 LT ST
|
3103 2426 MT 3103 2426 LT 6298 2426 LT ST
|
(01) 3117 2386 WT pop 0 originOffset 37 add RSS
|
(01) 3117 2386 WT pop 0 originOffset 37 add RSS
|
3103 2489 MT 3103 2489 LT 6298 2489 LT ST
|
3103 2489 MT 3103 2489 LT 6298 2489 LT ST
|
3103 2570 MT 3103 2570 LT 6298 2570 LT ST
|
3103 2570 MT 3103 2570 LT 6298 2570 LT ST
|
(00) 3117 2530 WT pop 0 originOffset 37 add RSS
|
(00) 3117 2530 WT pop 0 originOffset 37 add RSS
|
3103 2633 MT 3103 2633 LT 6298 2633 LT ST
|
3103 2633 MT 3103 2633 LT 6298 2633 LT ST
|
3103 2714 MT 3103 2714 LT 6298 2714 LT ST
|
3103 2714 MT 3103 2714 LT 6298 2714 LT ST
|
(03) 3117 2674 WT pop 0 originOffset 37 add RSS
|
(03) 3117 2674 WT pop 0 originOffset 37 add RSS
|
3103 2858 MT 6298 2858 LS
|
3103 2858 MT 6298 2858 LS
|
3103 3002 MT 6298 3002 LS
|
3103 3002 MT 6298 3002 LS
|
3103 3146 MT 6298 3146 LS
|
3103 3146 MT 6298 3146 LS
|
3103 3209 MT 3103 3209 LT 6298 3209 LT ST
|
3103 3209 MT 3103 3209 LT 6298 3209 LT ST
|
3103 3290 MT 3103 3290 LT 6298 3290 LT ST
|
3103 3290 MT 3103 3290 LT 6298 3290 LT ST
|
(0) 3117 3250 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3250 WT pop 0 originOffset 37 add RSS
|
3103 3434 MT 6298 3434 LS
|
3103 3434 MT 6298 3434 LS
|
3103 3497 MT 3103 3497 LT 6298 3497 LT ST
|
3103 3497 MT 3103 3497 LT 6298 3497 LT ST
|
3103 3578 MT 3103 3578 LT 6298 3578 LT ST
|
3103 3578 MT 3103 3578 LT 6298 3578 LT ST
|
(0) 3117 3538 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3538 WT pop 0 originOffset 37 add RSS
|
3103 3641 MT 3103 3641 LT 6298 3641 LT ST
|
3103 3641 MT 3103 3641 LT 6298 3641 LT ST
|
3103 3722 MT 3103 3722 LT 6298 3722 LT ST
|
3103 3722 MT 3103 3722 LT 6298 3722 LT ST
|
(0) 3117 3682 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3682 WT pop 0 originOffset 37 add RSS
|
3103 3866 MT 6298 3866 LS
|
3103 3866 MT 6298 3866 LS
|
3103 3929 MT 3103 3929 LT 6298 3929 LT ST
|
3103 3929 MT 3103 3929 LT 6298 3929 LT ST
|
3103 4010 MT 3103 4010 LT 6298 4010 LT ST
|
3103 4010 MT 3103 4010 LT 6298 4010 LT ST
|
(0) 3117 3970 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3970 WT pop 0 originOffset 37 add RSS
|
3103 4154 MT 6298 4154 LS
|
3103 4154 MT 6298 4154 LS
|
3103 4258 MT 6298 4258 LS
|
3103 4258 MT 6298 4258 LS
|
3103 4361 MT 3103 4361 LT 6298 4361 LT ST
|
3103 4361 MT 3103 4361 LT 6298 4361 LT ST
|
3103 4442 MT 3103 4442 LT 6298 4442 LT ST
|
3103 4442 MT 3103 4442 LT 6298 4442 LT ST
|
(00000000) 3117 4402 WT pop 0 originOffset 37 add RSS
|
(00000000) 3117 4402 WT pop 0 originOffset 37 add RSS
|
% draw timeline
|
% draw timeline
|
3145 4533 MT 3145 4570 LS
|
3145 4533 MT 3145 4570 LS
|
3187 4533 MT 3187 4570 LS
|
3187 4533 MT 3187 4570 LS
|
3230 4533 MT 3230 4570 LS
|
3230 4533 MT 3230 4570 LS
|
3272 4533 MT 3272 4570 LS
|
3272 4533 MT 3272 4570 LS
|
3359 4533 MT 3359 4570 LS
|
3359 4533 MT 3359 4570 LS
|
3401 4533 MT 3401 4570 LS
|
3401 4533 MT 3401 4570 LS
|
3444 4533 MT 3444 4570 LS
|
3444 4533 MT 3444 4570 LS
|
3486 4533 MT 3486 4570 LS
|
3486 4533 MT 3486 4570 LS
|
3529 4533 MT 3529 4570 LS
|
3529 4533 MT 3529 4570 LS
|
3572 4533 MT 3572 4570 LS
|
3572 4533 MT 3572 4570 LS
|
3614 4533 MT 3614 4570 LS
|
3614 4533 MT 3614 4570 LS
|
3657 4533 MT 3657 4570 LS
|
3657 4533 MT 3657 4570 LS
|
3699 4533 MT 3699 4570 LS
|
3699 4533 MT 3699 4570 LS
|
3316 4506 MT 3316 4570 LS
|
3316 4506 MT 3316 4570 LS
|
(80) 3316 4649 WT TS RSS
|
(80) 3316 4649 WT TS RSS
|
3785 4533 MT 3785 4570 LS
|
3785 4533 MT 3785 4570 LS
|
3827 4533 MT 3827 4570 LS
|
3827 4533 MT 3827 4570 LS
|
3870 4533 MT 3870 4570 LS
|
3870 4533 MT 3870 4570 LS
|
3912 4533 MT 3912 4570 LS
|
3912 4533 MT 3912 4570 LS
|
3955 4533 MT 3955 4570 LS
|
3955 4533 MT 3955 4570 LS
|
3998 4533 MT 3998 4570 LS
|
3998 4533 MT 3998 4570 LS
|
4040 4533 MT 4040 4570 LS
|
4040 4533 MT 4040 4570 LS
|
4083 4533 MT 4083 4570 LS
|
4083 4533 MT 4083 4570 LS
|
4125 4533 MT 4125 4570 LS
|
4125 4533 MT 4125 4570 LS
|
3742 4506 MT 3742 4570 LS
|
3742 4506 MT 3742 4570 LS
|
4211 4533 MT 4211 4570 LS
|
4211 4533 MT 4211 4570 LS
|
4253 4533 MT 4253 4570 LS
|
4253 4533 MT 4253 4570 LS
|
4296 4533 MT 4296 4570 LS
|
4296 4533 MT 4296 4570 LS
|
4338 4533 MT 4338 4570 LS
|
4338 4533 MT 4338 4570 LS
|
4381 4533 MT 4381 4570 LS
|
4381 4533 MT 4381 4570 LS
|
4424 4533 MT 4424 4570 LS
|
4424 4533 MT 4424 4570 LS
|
4466 4533 MT 4466 4570 LS
|
4466 4533 MT 4466 4570 LS
|
4509 4533 MT 4509 4570 LS
|
4509 4533 MT 4509 4570 LS
|
4551 4533 MT 4551 4570 LS
|
4551 4533 MT 4551 4570 LS
|
4168 4506 MT 4168 4570 LS
|
4168 4506 MT 4168 4570 LS
|
(100) 4168 4649 WT TS RSS
|
(100) 4168 4649 WT TS RSS
|
4637 4533 MT 4637 4570 LS
|
4637 4533 MT 4637 4570 LS
|
4679 4533 MT 4679 4570 LS
|
4679 4533 MT 4679 4570 LS
|
4722 4533 MT 4722 4570 LS
|
4722 4533 MT 4722 4570 LS
|
4764 4533 MT 4764 4570 LS
|
4764 4533 MT 4764 4570 LS
|
4807 4533 MT 4807 4570 LS
|
4807 4533 MT 4807 4570 LS
|
4850 4533 MT 4850 4570 LS
|
4850 4533 MT 4850 4570 LS
|
4892 4533 MT 4892 4570 LS
|
4892 4533 MT 4892 4570 LS
|
4935 4533 MT 4935 4570 LS
|
4935 4533 MT 4935 4570 LS
|
4977 4533 MT 4977 4570 LS
|
4977 4533 MT 4977 4570 LS
|
4594 4506 MT 4594 4570 LS
|
4594 4506 MT 4594 4570 LS
|
5063 4533 MT 5063 4570 LS
|
5063 4533 MT 5063 4570 LS
|
5105 4533 MT 5105 4570 LS
|
5105 4533 MT 5105 4570 LS
|
5148 4533 MT 5148 4570 LS
|
5148 4533 MT 5148 4570 LS
|
5190 4533 MT 5190 4570 LS
|
5190 4533 MT 5190 4570 LS
|
5233 4533 MT 5233 4570 LS
|
5233 4533 MT 5233 4570 LS
|
5276 4533 MT 5276 4570 LS
|
5276 4533 MT 5276 4570 LS
|
5318 4533 MT 5318 4570 LS
|
5318 4533 MT 5318 4570 LS
|
5361 4533 MT 5361 4570 LS
|
5361 4533 MT 5361 4570 LS
|
5403 4533 MT 5403 4570 LS
|
5403 4533 MT 5403 4570 LS
|
5020 4506 MT 5020 4570 LS
|
5020 4506 MT 5020 4570 LS
|
(120) 5020 4649 WT TS RSS
|
(120) 5020 4649 WT TS RSS
|
5489 4533 MT 5489 4570 LS
|
5489 4533 MT 5489 4570 LS
|
5531 4533 MT 5531 4570 LS
|
5531 4533 MT 5531 4570 LS
|
5574 4533 MT 5574 4570 LS
|
5574 4533 MT 5574 4570 LS
|
5616 4533 MT 5616 4570 LS
|
5616 4533 MT 5616 4570 LS
|
5659 4533 MT 5659 4570 LS
|
5659 4533 MT 5659 4570 LS
|
5702 4533 MT 5702 4570 LS
|
5702 4533 MT 5702 4570 LS
|
5744 4533 MT 5744 4570 LS
|
5744 4533 MT 5744 4570 LS
|
5787 4533 MT 5787 4570 LS
|
5787 4533 MT 5787 4570 LS
|
5829 4533 MT 5829 4570 LS
|
5829 4533 MT 5829 4570 LS
|
5446 4506 MT 5446 4570 LS
|
5446 4506 MT 5446 4570 LS
|
5915 4533 MT 5915 4570 LS
|
5915 4533 MT 5915 4570 LS
|
5957 4533 MT 5957 4570 LS
|
5957 4533 MT 5957 4570 LS
|
6000 4533 MT 6000 4570 LS
|
6000 4533 MT 6000 4570 LS
|
6042 4533 MT 6042 4570 LS
|
6042 4533 MT 6042 4570 LS
|
6085 4533 MT 6085 4570 LS
|
6085 4533 MT 6085 4570 LS
|
6128 4533 MT 6128 4570 LS
|
6128 4533 MT 6128 4570 LS
|
6170 4533 MT 6170 4570 LS
|
6170 4533 MT 6170 4570 LS
|
6213 4533 MT 6213 4570 LS
|
6213 4533 MT 6213 4570 LS
|
6255 4533 MT 6255 4570 LS
|
6255 4533 MT 6255 4570 LS
|
5872 4506 MT 5872 4570 LS
|
5872 4506 MT 5872 4570 LS
|
(140) 5872 4649 WT TS RSS
|
(140) 5872 4649 WT TS RSS
|
6341 4533 MT 6341 4570 LS
|
6341 4533 MT 6341 4570 LS
|
6383 4533 MT 6383 4570 LS
|
6383 4533 MT 6383 4570 LS
|
6426 4533 MT 6426 4570 LS
|
6426 4533 MT 6426 4570 LS
|
6468 4533 MT 6468 4570 LS
|
6468 4533 MT 6468 4570 LS
|
6511 4533 MT 6511 4570 LS
|
6511 4533 MT 6511 4570 LS
|
6554 4533 MT 6554 4570 LS
|
6554 4533 MT 6554 4570 LS
|
6596 4533 MT 6596 4570 LS
|
6596 4533 MT 6596 4570 LS
|
6639 4533 MT 6639 4570 LS
|
6639 4533 MT 6639 4570 LS
|
6681 4533 MT 6681 4570 LS
|
6681 4533 MT 6681 4570 LS
|
6298 4506 MT 6298 4570 LS
|
6298 4506 MT 6298 4570 LS
|
% draw grid
|
% draw grid
|
3316 300 MT 3316 4506 LS
|
3316 300 MT 3316 4506 LS
|
3742 300 MT 3742 4506 LS
|
3742 300 MT 3742 4506 LS
|
4168 300 MT 4168 4506 LS
|
4168 300 MT 4168 4506 LS
|
4594 300 MT 4594 4506 LS
|
4594 300 MT 4594 4506 LS
|
5020 300 MT 5020 4506 LS
|
5020 300 MT 5020 4506 LS
|
5446 300 MT 5446 4506 LS
|
5446 300 MT 5446 4506 LS
|
5872 300 MT 5872 4506 LS
|
5872 300 MT 5872 4506 LS
|
6298 300 MT 6298 4506 LS
|
6298 300 MT 6298 4506 LS
|
% draw waveforms
|
% draw waveforms
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) 3066 409 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) 3066 409 WT TSE RSS
|
3309 300 MT 3323 300 LS
|
3309 300 MT 3323 300 LS
|
3735 300 MT 3749 300 LS
|
3735 300 MT 3749 300 LS
|
4161 300 MT 4175 300 LS
|
4161 300 MT 4175 300 LS
|
4587 300 MT 4601 300 LS
|
4587 300 MT 4601 300 LS
|
5013 300 MT 5027 300 LS
|
5013 300 MT 5027 300 LS
|
5439 300 MT 5453 300 LS
|
5439 300 MT 5453 300 LS
|
5865 300 MT 5879 300 LS
|
5865 300 MT 5879 300 LS
|
6291 300 MT 6305 300 LS
|
6291 300 MT 6305 300 LS
|
3103 370 MT 6298 370 LS
|
3103 370 MT 6298 370 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) 3066 553 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) 3066 553 WT TSE RSS
|
3309 444 MT 3323 444 LS
|
3309 444 MT 3323 444 LS
|
3735 444 MT 3749 444 LS
|
3735 444 MT 3749 444 LS
|
4161 444 MT 4175 444 LS
|
4161 444 MT 4175 444 LS
|
4587 444 MT 4601 444 LS
|
4587 444 MT 4601 444 LS
|
5013 444 MT 5027 444 LS
|
5013 444 MT 5027 444 LS
|
5439 444 MT 5453 444 LS
|
5439 444 MT 5453 444 LS
|
5865 444 MT 5879 444 LS
|
5865 444 MT 5879 444 LS
|
6291 444 MT 6305 444 LS
|
6291 444 MT 6305 444 LS
|
3103 554 MT 6298 554 LS
|
3103 554 MT 6298 554 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) 3066 697 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) 3066 697 WT TSE RSS
|
3309 588 MT 3323 588 LS
|
3309 588 MT 3323 588 LS
|
3735 588 MT 3749 588 LS
|
3735 588 MT 3749 588 LS
|
4161 588 MT 4175 588 LS
|
4161 588 MT 4175 588 LS
|
4587 588 MT 4601 588 LS
|
4587 588 MT 4601 588 LS
|
5013 588 MT 5027 588 LS
|
5013 588 MT 5027 588 LS
|
5439 588 MT 5453 588 LS
|
5439 588 MT 5453 588 LS
|
5865 588 MT 5879 588 LS
|
5865 588 MT 5879 588 LS
|
6291 588 MT 6305 588 LS
|
6291 588 MT 6305 588 LS
|
3103 698 MT 6298 698 LS
|
3103 698 MT 6298 698 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) 3066 841 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) 3066 841 WT TSE RSS
|
3309 732 MT 3323 732 LS
|
3309 732 MT 3323 732 LS
|
3735 732 MT 3749 732 LS
|
3735 732 MT 3749 732 LS
|
4161 732 MT 4175 732 LS
|
4161 732 MT 4175 732 LS
|
4587 732 MT 4601 732 LS
|
4587 732 MT 4601 732 LS
|
5013 732 MT 5027 732 LS
|
5013 732 MT 5027 732 LS
|
5439 732 MT 5453 732 LS
|
5439 732 MT 5453 732 LS
|
5865 732 MT 5879 732 LS
|
5865 732 MT 5879 732 LS
|
6291 732 MT 6305 732 LS
|
6291 732 MT 6305 732 LS
|
3103 761 MT 3103 761 LT 6298 761 LT ST
|
3103 761 MT 3103 761 LT 6298 761 LT ST
|
3103 842 MT 3103 842 LT 6298 842 LT ST
|
3103 842 MT 3103 842 LT 6298 842 LT ST
|
(14610000) 3117 802 WT pop 0 originOffset 37 add RSS
|
(14610000) 3117 802 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) 3066 985 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) 3066 985 WT TSE RSS
|
3309 876 MT 3323 876 LS
|
3309 876 MT 3323 876 LS
|
3735 876 MT 3749 876 LS
|
3735 876 MT 3749 876 LS
|
4161 876 MT 4175 876 LS
|
4161 876 MT 4175 876 LS
|
4587 876 MT 4601 876 LS
|
4587 876 MT 4601 876 LS
|
5013 876 MT 5027 876 LS
|
5013 876 MT 5027 876 LS
|
5439 876 MT 5453 876 LS
|
5439 876 MT 5453 876 LS
|
5865 876 MT 5879 876 LS
|
5865 876 MT 5879 876 LS
|
6291 876 MT 6305 876 LS
|
6291 876 MT 6305 876 LS
|
3103 986 MT 6298 986 LS
|
3103 986 MT 6298 986 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) 3066 1129 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) 3066 1129 WT TSE RSS
|
3309 1020 MT 3323 1020 LS
|
3309 1020 MT 3323 1020 LS
|
3735 1020 MT 3749 1020 LS
|
3735 1020 MT 3749 1020 LS
|
4161 1020 MT 4175 1020 LS
|
4161 1020 MT 4175 1020 LS
|
4587 1020 MT 4601 1020 LS
|
4587 1020 MT 4601 1020 LS
|
5013 1020 MT 5027 1020 LS
|
5013 1020 MT 5027 1020 LS
|
5439 1020 MT 5453 1020 LS
|
5439 1020 MT 5453 1020 LS
|
5865 1020 MT 5879 1020 LS
|
5865 1020 MT 5879 1020 LS
|
6291 1020 MT 6305 1020 LS
|
6291 1020 MT 6305 1020 LS
|
3103 1050 MT 6298 1050 LS
|
3103 1050 MT 6298 1050 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) 3066 1273 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) 3066 1273 WT TSE RSS
|
3309 1164 MT 3323 1164 LS
|
3309 1164 MT 3323 1164 LS
|
3735 1164 MT 3749 1164 LS
|
3735 1164 MT 3749 1164 LS
|
4161 1164 MT 4175 1164 LS
|
4161 1164 MT 4175 1164 LS
|
4587 1164 MT 4601 1164 LS
|
4587 1164 MT 4601 1164 LS
|
5013 1164 MT 5027 1164 LS
|
5013 1164 MT 5027 1164 LS
|
5439 1164 MT 5453 1164 LS
|
5439 1164 MT 5453 1164 LS
|
5865 1164 MT 5879 1164 LS
|
5865 1164 MT 5879 1164 LS
|
6291 1164 MT 6305 1164 LS
|
6291 1164 MT 6305 1164 LS
|
3103 1193 MT 3103 1193 LT 6298 1193 LT ST
|
3103 1193 MT 3103 1193 LT 6298 1193 LT ST
|
3103 1274 MT 3103 1274 LT 6298 1274 LT ST
|
3103 1274 MT 3103 1274 LT 6298 1274 LT ST
|
(14610000) 3117 1234 WT pop 0 originOffset 37 add RSS
|
(14610000) 3117 1234 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) 3066 1417 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) 3066 1417 WT TSE RSS
|
3309 1308 MT 3323 1308 LS
|
3309 1308 MT 3323 1308 LS
|
3735 1308 MT 3749 1308 LS
|
3735 1308 MT 3749 1308 LS
|
4161 1308 MT 4175 1308 LS
|
4161 1308 MT 4175 1308 LS
|
4587 1308 MT 4601 1308 LS
|
4587 1308 MT 4601 1308 LS
|
5013 1308 MT 5027 1308 LS
|
5013 1308 MT 5027 1308 LS
|
5439 1308 MT 5453 1308 LS
|
5439 1308 MT 5453 1308 LS
|
5865 1308 MT 5879 1308 LS
|
5865 1308 MT 5879 1308 LS
|
6291 1308 MT 6305 1308 LS
|
6291 1308 MT 6305 1308 LS
|
3103 1418 MT 6298 1418 LS
|
3103 1418 MT 6298 1418 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) 3066 1561 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) 3066 1561 WT TSE RSS
|
3309 1452 MT 3323 1452 LS
|
3309 1452 MT 3323 1452 LS
|
3735 1452 MT 3749 1452 LS
|
3735 1452 MT 3749 1452 LS
|
4161 1452 MT 4175 1452 LS
|
4161 1452 MT 4175 1452 LS
|
4587 1452 MT 4601 1452 LS
|
4587 1452 MT 4601 1452 LS
|
5013 1452 MT 5027 1452 LS
|
5013 1452 MT 5027 1452 LS
|
5439 1452 MT 5453 1452 LS
|
5439 1452 MT 5453 1452 LS
|
5865 1452 MT 5879 1452 LS
|
5865 1452 MT 5879 1452 LS
|
6291 1452 MT 6305 1452 LS
|
6291 1452 MT 6305 1452 LS
|
3103 1481 MT 3103 1481 LT 6298 1481 LT ST
|
3103 1481 MT 3103 1481 LT 6298 1481 LT ST
|
3103 1562 MT 3103 1562 LT 6298 1562 LT ST
|
3103 1562 MT 3103 1562 LT 6298 1562 LT ST
|
(00000000) 3117 1522 WT pop 0 originOffset 37 add RSS
|
(00000000) 3117 1522 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) 3066 1705 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) 3066 1705 WT TSE RSS
|
3309 1596 MT 3323 1596 LS
|
3309 1596 MT 3323 1596 LS
|
3735 1596 MT 3749 1596 LS
|
3735 1596 MT 3749 1596 LS
|
4161 1596 MT 4175 1596 LS
|
4161 1596 MT 4175 1596 LS
|
4587 1596 MT 4601 1596 LS
|
4587 1596 MT 4601 1596 LS
|
5013 1596 MT 5027 1596 LS
|
5013 1596 MT 5027 1596 LS
|
5439 1596 MT 5453 1596 LS
|
5439 1596 MT 5453 1596 LS
|
5865 1596 MT 5879 1596 LS
|
5865 1596 MT 5879 1596 LS
|
6291 1596 MT 6305 1596 LS
|
6291 1596 MT 6305 1596 LS
|
3103 1625 MT 3103 1625 LT 6298 1625 LT ST
|
3103 1625 MT 3103 1625 LT 6298 1625 LT ST
|
3103 1706 MT 3103 1706 LT 6298 1706 LT ST
|
3103 1706 MT 3103 1706 LT 6298 1706 LT ST
|
(0) 3117 1666 WT pop 0 originOffset 37 add RSS
|
(0) 3117 1666 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) 3066 1849 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) 3066 1849 WT TSE RSS
|
3309 1740 MT 3323 1740 LS
|
3309 1740 MT 3323 1740 LS
|
3735 1740 MT 3749 1740 LS
|
3735 1740 MT 3749 1740 LS
|
4161 1740 MT 4175 1740 LS
|
4161 1740 MT 4175 1740 LS
|
4587 1740 MT 4601 1740 LS
|
4587 1740 MT 4601 1740 LS
|
5013 1740 MT 5027 1740 LS
|
5013 1740 MT 5027 1740 LS
|
5439 1740 MT 5453 1740 LS
|
5439 1740 MT 5453 1740 LS
|
5865 1740 MT 5879 1740 LS
|
5865 1740 MT 5879 1740 LS
|
6291 1740 MT 6305 1740 LS
|
6291 1740 MT 6305 1740 LS
|
3103 1769 MT 3103 1769 LT 6298 1769 LT ST
|
3103 1769 MT 3103 1769 LT 6298 1769 LT ST
|
3103 1850 MT 3103 1850 LT 6298 1850 LT ST
|
3103 1850 MT 3103 1850 LT 6298 1850 LT ST
|
(0) 3117 1810 WT pop 0 originOffset 37 add RSS
|
(0) 3117 1810 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) 3066 1993 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) 3066 1993 WT TSE RSS
|
3309 1884 MT 3323 1884 LS
|
3309 1884 MT 3323 1884 LS
|
3735 1884 MT 3749 1884 LS
|
3735 1884 MT 3749 1884 LS
|
4161 1884 MT 4175 1884 LS
|
4161 1884 MT 4175 1884 LS
|
4587 1884 MT 4601 1884 LS
|
4587 1884 MT 4601 1884 LS
|
5013 1884 MT 5027 1884 LS
|
5013 1884 MT 5027 1884 LS
|
5439 1884 MT 5453 1884 LS
|
5439 1884 MT 5453 1884 LS
|
5865 1884 MT 5879 1884 LS
|
5865 1884 MT 5879 1884 LS
|
6291 1884 MT 6305 1884 LS
|
6291 1884 MT 6305 1884 LS
|
3103 1913 MT 3103 1913 LT 6298 1913 LT ST
|
3103 1913 MT 3103 1913 LT 6298 1913 LT ST
|
3103 1994 MT 3103 1994 LT 6298 1994 LT ST
|
3103 1994 MT 3103 1994 LT 6298 1994 LT ST
|
(0) 3117 1954 WT pop 0 originOffset 37 add RSS
|
(0) 3117 1954 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) 3066 2137 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) 3066 2137 WT TSE RSS
|
3309 2028 MT 3323 2028 LS
|
3309 2028 MT 3323 2028 LS
|
3735 2028 MT 3749 2028 LS
|
3735 2028 MT 3749 2028 LS
|
4161 2028 MT 4175 2028 LS
|
4161 2028 MT 4175 2028 LS
|
4587 2028 MT 4601 2028 LS
|
4587 2028 MT 4601 2028 LS
|
5013 2028 MT 5027 2028 LS
|
5013 2028 MT 5027 2028 LS
|
5439 2028 MT 5453 2028 LS
|
5439 2028 MT 5453 2028 LS
|
5865 2028 MT 5879 2028 LS
|
5865 2028 MT 5879 2028 LS
|
6291 2028 MT 6305 2028 LS
|
6291 2028 MT 6305 2028 LS
|
3103 2138 MT 6298 2138 LS
|
3103 2138 MT 6298 2138 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) 3066 2281 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) 3066 2281 WT TSE RSS
|
3309 2172 MT 3323 2172 LS
|
3309 2172 MT 3323 2172 LS
|
3735 2172 MT 3749 2172 LS
|
3735 2172 MT 3749 2172 LS
|
4161 2172 MT 4175 2172 LS
|
4161 2172 MT 4175 2172 LS
|
4587 2172 MT 4601 2172 LS
|
4587 2172 MT 4601 2172 LS
|
5013 2172 MT 5027 2172 LS
|
5013 2172 MT 5027 2172 LS
|
5439 2172 MT 5453 2172 LS
|
5439 2172 MT 5453 2172 LS
|
5865 2172 MT 5879 2172 LS
|
5865 2172 MT 5879 2172 LS
|
6291 2172 MT 6305 2172 LS
|
6291 2172 MT 6305 2172 LS
|
3103 2201 MT 3103 2201 LT 6298 2201 LT ST
|
3103 2201 MT 3103 2201 LT 6298 2201 LT ST
|
3103 2282 MT 3103 2282 LT 6298 2282 LT ST
|
3103 2282 MT 3103 2282 LT 6298 2282 LT ST
|
(0) 3117 2242 WT pop 0 originOffset 37 add RSS
|
(0) 3117 2242 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) 3066 2425 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) 3066 2425 WT TSE RSS
|
3309 2316 MT 3323 2316 LS
|
3309 2316 MT 3323 2316 LS
|
3735 2316 MT 3749 2316 LS
|
3735 2316 MT 3749 2316 LS
|
4161 2316 MT 4175 2316 LS
|
4161 2316 MT 4175 2316 LS
|
4587 2316 MT 4601 2316 LS
|
4587 2316 MT 4601 2316 LS
|
5013 2316 MT 5027 2316 LS
|
5013 2316 MT 5027 2316 LS
|
5439 2316 MT 5453 2316 LS
|
5439 2316 MT 5453 2316 LS
|
5865 2316 MT 5879 2316 LS
|
5865 2316 MT 5879 2316 LS
|
6291 2316 MT 6305 2316 LS
|
6291 2316 MT 6305 2316 LS
|
3103 2345 MT 3103 2345 LT 6298 2345 LT ST
|
3103 2345 MT 3103 2345 LT 6298 2345 LT ST
|
3103 2426 MT 3103 2426 LT 6298 2426 LT ST
|
3103 2426 MT 3103 2426 LT 6298 2426 LT ST
|
(01) 3117 2386 WT pop 0 originOffset 37 add RSS
|
(01) 3117 2386 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) 3066 2569 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) 3066 2569 WT TSE RSS
|
3309 2460 MT 3323 2460 LS
|
3309 2460 MT 3323 2460 LS
|
3735 2460 MT 3749 2460 LS
|
3735 2460 MT 3749 2460 LS
|
4161 2460 MT 4175 2460 LS
|
4161 2460 MT 4175 2460 LS
|
4587 2460 MT 4601 2460 LS
|
4587 2460 MT 4601 2460 LS
|
5013 2460 MT 5027 2460 LS
|
5013 2460 MT 5027 2460 LS
|
5439 2460 MT 5453 2460 LS
|
5439 2460 MT 5453 2460 LS
|
5865 2460 MT 5879 2460 LS
|
5865 2460 MT 5879 2460 LS
|
6291 2460 MT 6305 2460 LS
|
6291 2460 MT 6305 2460 LS
|
3103 2489 MT 3103 2489 LT 6298 2489 LT ST
|
3103 2489 MT 3103 2489 LT 6298 2489 LT ST
|
3103 2570 MT 3103 2570 LT 6298 2570 LT ST
|
3103 2570 MT 3103 2570 LT 6298 2570 LT ST
|
(00) 3117 2530 WT pop 0 originOffset 37 add RSS
|
(00) 3117 2530 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) 3066 2713 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) 3066 2713 WT TSE RSS
|
3309 2604 MT 3323 2604 LS
|
3309 2604 MT 3323 2604 LS
|
3735 2604 MT 3749 2604 LS
|
3735 2604 MT 3749 2604 LS
|
4161 2604 MT 4175 2604 LS
|
4161 2604 MT 4175 2604 LS
|
4587 2604 MT 4601 2604 LS
|
4587 2604 MT 4601 2604 LS
|
5013 2604 MT 5027 2604 LS
|
5013 2604 MT 5027 2604 LS
|
5439 2604 MT 5453 2604 LS
|
5439 2604 MT 5453 2604 LS
|
5865 2604 MT 5879 2604 LS
|
5865 2604 MT 5879 2604 LS
|
6291 2604 MT 6305 2604 LS
|
6291 2604 MT 6305 2604 LS
|
3103 2633 MT 3103 2633 LT 6298 2633 LT ST
|
3103 2633 MT 3103 2633 LT 6298 2633 LT ST
|
3103 2714 MT 3103 2714 LT 6298 2714 LT ST
|
3103 2714 MT 3103 2714 LT 6298 2714 LT ST
|
(03) 3117 2674 WT pop 0 originOffset 37 add RSS
|
(03) 3117 2674 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) 3066 2857 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) 3066 2857 WT TSE RSS
|
3309 2748 MT 3323 2748 LS
|
3309 2748 MT 3323 2748 LS
|
3735 2748 MT 3749 2748 LS
|
3735 2748 MT 3749 2748 LS
|
4161 2748 MT 4175 2748 LS
|
4161 2748 MT 4175 2748 LS
|
4587 2748 MT 4601 2748 LS
|
4587 2748 MT 4601 2748 LS
|
5013 2748 MT 5027 2748 LS
|
5013 2748 MT 5027 2748 LS
|
5439 2748 MT 5453 2748 LS
|
5439 2748 MT 5453 2748 LS
|
5865 2748 MT 5879 2748 LS
|
5865 2748 MT 5879 2748 LS
|
6291 2748 MT 6305 2748 LS
|
6291 2748 MT 6305 2748 LS
|
3103 2858 MT 6298 2858 LS
|
3103 2858 MT 6298 2858 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) 3066 3001 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) 3066 3001 WT TSE RSS
|
3309 2892 MT 3323 2892 LS
|
3309 2892 MT 3323 2892 LS
|
3735 2892 MT 3749 2892 LS
|
3735 2892 MT 3749 2892 LS
|
4161 2892 MT 4175 2892 LS
|
4161 2892 MT 4175 2892 LS
|
4587 2892 MT 4601 2892 LS
|
4587 2892 MT 4601 2892 LS
|
5013 2892 MT 5027 2892 LS
|
5013 2892 MT 5027 2892 LS
|
5439 2892 MT 5453 2892 LS
|
5439 2892 MT 5453 2892 LS
|
5865 2892 MT 5879 2892 LS
|
5865 2892 MT 5879 2892 LS
|
6291 2892 MT 6305 2892 LS
|
6291 2892 MT 6305 2892 LS
|
3103 3002 MT 6298 3002 LS
|
3103 3002 MT 6298 3002 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) 3066 3145 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) 3066 3145 WT TSE RSS
|
3309 3036 MT 3323 3036 LS
|
3309 3036 MT 3323 3036 LS
|
3735 3036 MT 3749 3036 LS
|
3735 3036 MT 3749 3036 LS
|
4161 3036 MT 4175 3036 LS
|
4161 3036 MT 4175 3036 LS
|
4587 3036 MT 4601 3036 LS
|
4587 3036 MT 4601 3036 LS
|
5013 3036 MT 5027 3036 LS
|
5013 3036 MT 5027 3036 LS
|
5439 3036 MT 5453 3036 LS
|
5439 3036 MT 5453 3036 LS
|
5865 3036 MT 5879 3036 LS
|
5865 3036 MT 5879 3036 LS
|
6291 3036 MT 6305 3036 LS
|
6291 3036 MT 6305 3036 LS
|
3103 3146 MT 6298 3146 LS
|
3103 3146 MT 6298 3146 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) 3066 3289 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) 3066 3289 WT TSE RSS
|
3309 3180 MT 3323 3180 LS
|
3309 3180 MT 3323 3180 LS
|
3735 3180 MT 3749 3180 LS
|
3735 3180 MT 3749 3180 LS
|
4161 3180 MT 4175 3180 LS
|
4161 3180 MT 4175 3180 LS
|
4587 3180 MT 4601 3180 LS
|
4587 3180 MT 4601 3180 LS
|
5013 3180 MT 5027 3180 LS
|
5013 3180 MT 5027 3180 LS
|
5439 3180 MT 5453 3180 LS
|
5439 3180 MT 5453 3180 LS
|
5865 3180 MT 5879 3180 LS
|
5865 3180 MT 5879 3180 LS
|
6291 3180 MT 6305 3180 LS
|
6291 3180 MT 6305 3180 LS
|
3103 3209 MT 3103 3209 LT 6298 3209 LT ST
|
3103 3209 MT 3103 3209 LT 6298 3209 LT ST
|
3103 3290 MT 3103 3290 LT 6298 3290 LT ST
|
3103 3290 MT 3103 3290 LT 6298 3290 LT ST
|
(0) 3117 3250 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3250 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) 3066 3433 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) 3066 3433 WT TSE RSS
|
3309 3324 MT 3323 3324 LS
|
3309 3324 MT 3323 3324 LS
|
3735 3324 MT 3749 3324 LS
|
3735 3324 MT 3749 3324 LS
|
4161 3324 MT 4175 3324 LS
|
4161 3324 MT 4175 3324 LS
|
4587 3324 MT 4601 3324 LS
|
4587 3324 MT 4601 3324 LS
|
5013 3324 MT 5027 3324 LS
|
5013 3324 MT 5027 3324 LS
|
5439 3324 MT 5453 3324 LS
|
5439 3324 MT 5453 3324 LS
|
5865 3324 MT 5879 3324 LS
|
5865 3324 MT 5879 3324 LS
|
6291 3324 MT 6305 3324 LS
|
6291 3324 MT 6305 3324 LS
|
3103 3434 MT 6298 3434 LS
|
3103 3434 MT 6298 3434 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) 3066 3577 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) 3066 3577 WT TSE RSS
|
3309 3468 MT 3323 3468 LS
|
3309 3468 MT 3323 3468 LS
|
3735 3468 MT 3749 3468 LS
|
3735 3468 MT 3749 3468 LS
|
4161 3468 MT 4175 3468 LS
|
4161 3468 MT 4175 3468 LS
|
4587 3468 MT 4601 3468 LS
|
4587 3468 MT 4601 3468 LS
|
5013 3468 MT 5027 3468 LS
|
5013 3468 MT 5027 3468 LS
|
5439 3468 MT 5453 3468 LS
|
5439 3468 MT 5453 3468 LS
|
5865 3468 MT 5879 3468 LS
|
5865 3468 MT 5879 3468 LS
|
6291 3468 MT 6305 3468 LS
|
6291 3468 MT 6305 3468 LS
|
3103 3497 MT 3103 3497 LT 6298 3497 LT ST
|
3103 3497 MT 3103 3497 LT 6298 3497 LT ST
|
3103 3578 MT 3103 3578 LT 6298 3578 LT ST
|
3103 3578 MT 3103 3578 LT 6298 3578 LT ST
|
(0) 3117 3538 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3538 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) 3066 3721 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) 3066 3721 WT TSE RSS
|
3309 3612 MT 3323 3612 LS
|
3309 3612 MT 3323 3612 LS
|
3735 3612 MT 3749 3612 LS
|
3735 3612 MT 3749 3612 LS
|
4161 3612 MT 4175 3612 LS
|
4161 3612 MT 4175 3612 LS
|
4587 3612 MT 4601 3612 LS
|
4587 3612 MT 4601 3612 LS
|
5013 3612 MT 5027 3612 LS
|
5013 3612 MT 5027 3612 LS
|
5439 3612 MT 5453 3612 LS
|
5439 3612 MT 5453 3612 LS
|
5865 3612 MT 5879 3612 LS
|
5865 3612 MT 5879 3612 LS
|
6291 3612 MT 6305 3612 LS
|
6291 3612 MT 6305 3612 LS
|
3103 3641 MT 3103 3641 LT 6298 3641 LT ST
|
3103 3641 MT 3103 3641 LT 6298 3641 LT ST
|
3103 3722 MT 3103 3722 LT 6298 3722 LT ST
|
3103 3722 MT 3103 3722 LT 6298 3722 LT ST
|
(0) 3117 3682 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3682 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) 3066 3865 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) 3066 3865 WT TSE RSS
|
3309 3756 MT 3323 3756 LS
|
3309 3756 MT 3323 3756 LS
|
3735 3756 MT 3749 3756 LS
|
3735 3756 MT 3749 3756 LS
|
4161 3756 MT 4175 3756 LS
|
4161 3756 MT 4175 3756 LS
|
4587 3756 MT 4601 3756 LS
|
4587 3756 MT 4601 3756 LS
|
5013 3756 MT 5027 3756 LS
|
5013 3756 MT 5027 3756 LS
|
5439 3756 MT 5453 3756 LS
|
5439 3756 MT 5453 3756 LS
|
5865 3756 MT 5879 3756 LS
|
5865 3756 MT 5879 3756 LS
|
6291 3756 MT 6305 3756 LS
|
6291 3756 MT 6305 3756 LS
|
3103 3866 MT 6298 3866 LS
|
3103 3866 MT 6298 3866 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) 3066 4009 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) 3066 4009 WT TSE RSS
|
3309 3900 MT 3323 3900 LS
|
3309 3900 MT 3323 3900 LS
|
3735 3900 MT 3749 3900 LS
|
3735 3900 MT 3749 3900 LS
|
4161 3900 MT 4175 3900 LS
|
4161 3900 MT 4175 3900 LS
|
4587 3900 MT 4601 3900 LS
|
4587 3900 MT 4601 3900 LS
|
5013 3900 MT 5027 3900 LS
|
5013 3900 MT 5027 3900 LS
|
5439 3900 MT 5453 3900 LS
|
5439 3900 MT 5453 3900 LS
|
5865 3900 MT 5879 3900 LS
|
5865 3900 MT 5879 3900 LS
|
6291 3900 MT 6305 3900 LS
|
6291 3900 MT 6305 3900 LS
|
3103 3929 MT 3103 3929 LT 6298 3929 LT ST
|
3103 3929 MT 3103 3929 LT 6298 3929 LT ST
|
3103 4010 MT 3103 4010 LT 6298 4010 LT ST
|
3103 4010 MT 3103 4010 LT 6298 4010 LT ST
|
(0) 3117 3970 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3970 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) 3066 4153 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) 3066 4153 WT TSE RSS
|
3309 4044 MT 3323 4044 LS
|
3309 4044 MT 3323 4044 LS
|
3735 4044 MT 3749 4044 LS
|
3735 4044 MT 3749 4044 LS
|
4161 4044 MT 4175 4044 LS
|
4161 4044 MT 4175 4044 LS
|
4587 4044 MT 4601 4044 LS
|
4587 4044 MT 4601 4044 LS
|
5013 4044 MT 5027 4044 LS
|
5013 4044 MT 5027 4044 LS
|
5439 4044 MT 5453 4044 LS
|
5439 4044 MT 5453 4044 LS
|
5865 4044 MT 5879 4044 LS
|
5865 4044 MT 5879 4044 LS
|
6291 4044 MT 6305 4044 LS
|
6291 4044 MT 6305 4044 LS
|
3103 4154 MT 6298 4154 LS
|
3103 4154 MT 6298 4154 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) 3066 4297 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) 3066 4297 WT TSE RSS
|
3309 4188 MT 3323 4188 LS
|
3309 4188 MT 3323 4188 LS
|
3735 4188 MT 3749 4188 LS
|
3735 4188 MT 3749 4188 LS
|
4161 4188 MT 4175 4188 LS
|
4161 4188 MT 4175 4188 LS
|
4587 4188 MT 4601 4188 LS
|
4587 4188 MT 4601 4188 LS
|
5013 4188 MT 5027 4188 LS
|
5013 4188 MT 5027 4188 LS
|
5439 4188 MT 5453 4188 LS
|
5439 4188 MT 5453 4188 LS
|
5865 4188 MT 5879 4188 LS
|
5865 4188 MT 5879 4188 LS
|
6291 4188 MT 6305 4188 LS
|
6291 4188 MT 6305 4188 LS
|
3103 4258 MT 6298 4258 LS
|
3103 4258 MT 6298 4258 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) 3066 4441 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) 3066 4441 WT TSE RSS
|
3309 4332 MT 3323 4332 LS
|
3309 4332 MT 3323 4332 LS
|
3735 4332 MT 3749 4332 LS
|
3735 4332 MT 3749 4332 LS
|
4161 4332 MT 4175 4332 LS
|
4161 4332 MT 4175 4332 LS
|
4587 4332 MT 4601 4332 LS
|
4587 4332 MT 4601 4332 LS
|
5013 4332 MT 5027 4332 LS
|
5013 4332 MT 5027 4332 LS
|
5439 4332 MT 5453 4332 LS
|
5439 4332 MT 5453 4332 LS
|
5865 4332 MT 5879 4332 LS
|
5865 4332 MT 5879 4332 LS
|
6291 4332 MT 6305 4332 LS
|
6291 4332 MT 6305 4332 LS
|
3103 4361 MT 3103 4361 LT 6298 4361 LT ST
|
3103 4361 MT 3103 4361 LT 6298 4361 LT ST
|
3103 4442 MT 3103 4442 LT 6298 4442 LT ST
|
3103 4442 MT 3103 4442 LT 6298 4442 LT ST
|
(00000000) 3117 4402 WT pop 0 originOffset 37 add RSS
|
(00000000) 3117 4402 WT pop 0 originOffset 37 add RSS
|
% draw footer
|
% draw footer
|
(Entity:tb_or1200_cpu Architecture: Date: Sat Aug 14 00:33:37 EDT 2004 Row: 2 Page: 3) 300 4799 WT TSW RSS
|
(Entity:tb_or1200_cpu Architecture: Date: Sat Aug 14 00:33:37 EDT 2004 Row: 2 Page: 3) 300 4799 WT TSW RSS
|
grestore
|
grestore
|
showpage
|
showpage
|
%%Page: 4 4
|
%%Page: 4 4
|
gsave
|
gsave
|
90 rotate 0.12 dup neg scale
|
90 rotate 0.12 dup neg scale
|
% dump string table
|
% dump string table
|
/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
|
/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
|
/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
|
/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
|
/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
|
/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
|
/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
|
/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
|
/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
|
/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
|
/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
|
/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
|
/ARC {5 -2 roll SX 5 2 roll arc} def
|
/ARC {5 -2 roll SX 5 2 roll arc} def
|
/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3103 def/REdge 5699 def/LabelWidth 3066 def
|
/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3103 def/REdge 5699 def/LabelWidth 3066 def
|
/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
|
/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
|
/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
|
/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/alu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/alu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_taken) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_taken) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/clk) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/clk) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/comp_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/comp_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_limm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_limm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/du_hwbkpt) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/du_hwbkpt) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/except_illegal) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/except_illegal) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) MLW
|
% draw waveform shading
|
% draw waveform shading
|
[] 0 SD
|
[] 0 SD
|
2.995 setlinewidth
|
2.995 setlinewidth
|
0 setlinejoin
|
0 setlinejoin
|
0 setlinecap
|
0 setlinecap
|
0 0 0 CL
|
0 0 0 CL
|
3103 329 MT 3103 329 LT 6298 329 LT ST
|
3103 329 MT 3103 329 LT 6298 329 LT ST
|
3103 410 MT 3103 410 LT 6298 410 LT ST
|
3103 410 MT 3103 410 LT 6298 410 LT ST
|
(1800) 3117 370 WT pop 0 originOffset 37 add RSS
|
(1800) 3117 370 WT pop 0 originOffset 37 add RSS
|
3103 473 MT 3103 473 LT 3522 473 LT 3529 514 LT ST
|
3103 473 MT 3103 473 LT 3522 473 LT 3529 514 LT ST
|
3103 554 MT 3103 554 LT 3522 554 LT 3529 514 LT ST
|
3103 554 MT 3103 554 LT 3522 554 LT 3529 514 LT ST
|
(5) 3117 514 WT pop 0 originOffset 37 add RSS
|
(5) 3117 514 WT pop 0 originOffset 37 add RSS
|
3529 514 MT 3529 514 LT 3536 473 LT 3948 473 LT 3955 514 LT ST
|
3529 514 MT 3529 514 LT 3536 473 LT 3948 473 LT 3955 514 LT ST
|
3529 514 MT 3529 514 LT 3536 554 LT 3948 554 LT 3955 514 LT ST
|
3529 514 MT 3529 514 LT 3536 554 LT 3948 554 LT 3955 514 LT ST
|
(6) 3543 514 WT pop 0 originOffset 37 add RSS
|
(6) 3543 514 WT pop 0 originOffset 37 add RSS
|
3955 514 MT 3955 514 LT 3962 473 LT 4374 473 LT 4381 514 LT ST
|
3955 514 MT 3955 514 LT 3962 473 LT 4374 473 LT 4381 514 LT ST
|
3955 514 MT 3955 514 LT 3962 554 LT 4374 554 LT 4381 514 LT ST
|
3955 514 MT 3955 514 LT 3962 554 LT 4374 554 LT 4381 514 LT ST
|
(7) 3969 514 WT pop 0 originOffset 37 add RSS
|
(7) 3969 514 WT pop 0 originOffset 37 add RSS
|
4381 514 MT 4381 514 LT 4388 473 LT 4800 473 LT 4807 514 LT ST
|
4381 514 MT 4381 514 LT 4388 473 LT 4800 473 LT 4807 514 LT ST
|
4381 514 MT 4381 514 LT 4388 554 LT 4800 554 LT 4807 514 LT ST
|
4381 514 MT 4381 514 LT 4388 554 LT 4800 554 LT 4807 514 LT ST
|
(0) 4395 514 WT pop 0 originOffset 37 add RSS
|
(0) 4395 514 WT pop 0 originOffset 37 add RSS
|
4807 514 MT 4807 514 LT 4814 473 LT 5226 473 LT 5233 514 LT ST
|
4807 514 MT 4807 514 LT 4814 473 LT 5226 473 LT 5233 514 LT ST
|
4807 514 MT 4807 514 LT 4814 554 LT 5226 554 LT 5233 514 LT ST
|
4807 514 MT 4807 514 LT 4814 554 LT 5226 554 LT 5233 514 LT ST
|
(1) 4821 514 WT pop 0 originOffset 37 add RSS
|
(1) 4821 514 WT pop 0 originOffset 37 add RSS
|
5233 514 MT 5233 514 LT 5240 473 LT 5652 473 LT 5659 514 LT ST
|
5233 514 MT 5233 514 LT 5240 473 LT 5652 473 LT 5659 514 LT ST
|
5233 514 MT 5233 514 LT 5240 554 LT 5652 554 LT 5659 514 LT ST
|
5233 514 MT 5233 514 LT 5240 554 LT 5652 554 LT 5659 514 LT ST
|
(2) 5247 514 WT pop 0 originOffset 37 add RSS
|
(2) 5247 514 WT pop 0 originOffset 37 add RSS
|
5659 514 MT 5659 514 LT 5666 473 LT 6078 473 LT 6085 514 LT ST
|
5659 514 MT 5659 514 LT 5666 473 LT 6078 473 LT 6085 514 LT ST
|
5659 514 MT 5659 514 LT 5666 554 LT 6078 554 LT 6085 514 LT ST
|
5659 514 MT 5659 514 LT 5666 554 LT 6078 554 LT 6085 514 LT ST
|
(3) 5673 514 WT pop 0 originOffset 37 add RSS
|
(3) 5673 514 WT pop 0 originOffset 37 add RSS
|
6085 514 MT 6085 514 LT 6092 473 LT 6298 473 LT ST
|
6085 514 MT 6085 514 LT 6092 473 LT 6298 473 LT ST
|
6085 514 MT 6085 514 LT 6092 554 LT 6298 554 LT ST
|
6085 514 MT 6085 514 LT 6092 554 LT 6298 554 LT ST
|
(4) 6099 514 WT pop 0 originOffset 37 add RSS
|
(4) 6099 514 WT pop 0 originOffset 37 add RSS
|
3103 617 MT 3103 617 LT 3522 617 LT 3529 658 LT ST
|
3103 617 MT 3103 617 LT 3522 617 LT 3529 658 LT ST
|
3103 698 MT 3103 698 LT 3522 698 LT 3529 658 LT ST
|
3103 698 MT 3103 698 LT 3522 698 LT 3529 658 LT ST
|
(4) 3117 658 WT pop 0 originOffset 37 add RSS
|
(4) 3117 658 WT pop 0 originOffset 37 add RSS
|
3529 658 MT 3529 658 LT 3536 617 LT 3948 617 LT 3955 658 LT ST
|
3529 658 MT 3529 658 LT 3536 617 LT 3948 617 LT 3955 658 LT ST
|
3529 658 MT 3529 658 LT 3536 698 LT 3948 698 LT 3955 658 LT ST
|
3529 658 MT 3529 658 LT 3536 698 LT 3948 698 LT 3955 658 LT ST
|
(5) 3543 658 WT pop 0 originOffset 37 add RSS
|
(5) 3543 658 WT pop 0 originOffset 37 add RSS
|
3955 658 MT 3955 658 LT 3962 617 LT 4374 617 LT 4381 658 LT ST
|
3955 658 MT 3955 658 LT 3962 617 LT 4374 617 LT 4381 658 LT ST
|
3955 658 MT 3955 658 LT 3962 698 LT 4374 698 LT 4381 658 LT ST
|
3955 658 MT 3955 658 LT 3962 698 LT 4374 698 LT 4381 658 LT ST
|
(6) 3969 658 WT pop 0 originOffset 37 add RSS
|
(6) 3969 658 WT pop 0 originOffset 37 add RSS
|
4381 658 MT 4381 658 LT 4388 617 LT 4800 617 LT 4807 658 LT ST
|
4381 658 MT 4381 658 LT 4388 617 LT 4800 617 LT 4807 658 LT ST
|
4381 658 MT 4381 658 LT 4388 698 LT 4800 698 LT 4807 658 LT ST
|
4381 658 MT 4381 658 LT 4388 698 LT 4800 698 LT 4807 658 LT ST
|
(7) 4395 658 WT pop 0 originOffset 37 add RSS
|
(7) 4395 658 WT pop 0 originOffset 37 add RSS
|
4807 658 MT 4807 658 LT 4814 617 LT 5226 617 LT 5233 658 LT ST
|
4807 658 MT 4807 658 LT 4814 617 LT 5226 617 LT 5233 658 LT ST
|
4807 658 MT 4807 658 LT 4814 698 LT 5226 698 LT 5233 658 LT ST
|
4807 658 MT 4807 658 LT 4814 698 LT 5226 698 LT 5233 658 LT ST
|
(0) 4821 658 WT pop 0 originOffset 37 add RSS
|
(0) 4821 658 WT pop 0 originOffset 37 add RSS
|
5233 658 MT 5233 658 LT 5240 617 LT 5652 617 LT 5659 658 LT ST
|
5233 658 MT 5233 658 LT 5240 617 LT 5652 617 LT 5659 658 LT ST
|
5233 658 MT 5233 658 LT 5240 698 LT 5652 698 LT 5659 658 LT ST
|
5233 658 MT 5233 658 LT 5240 698 LT 5652 698 LT 5659 658 LT ST
|
(1) 5247 658 WT pop 0 originOffset 37 add RSS
|
(1) 5247 658 WT pop 0 originOffset 37 add RSS
|
5659 658 MT 5659 658 LT 5666 617 LT 6078 617 LT 6085 658 LT ST
|
5659 658 MT 5659 658 LT 5666 617 LT 6078 617 LT 6085 658 LT ST
|
5659 658 MT 5659 658 LT 5666 698 LT 6078 698 LT 6085 658 LT ST
|
5659 658 MT 5659 658 LT 5666 698 LT 6078 698 LT 6085 658 LT ST
|
(2) 5673 658 WT pop 0 originOffset 37 add RSS
|
(2) 5673 658 WT pop 0 originOffset 37 add RSS
|
6085 658 MT 6085 658 LT 6092 617 LT 6298 617 LT ST
|
6085 658 MT 6085 658 LT 6092 617 LT 6298 617 LT ST
|
6085 658 MT 6085 658 LT 6092 698 LT 6298 698 LT ST
|
6085 658 MT 6085 658 LT 6092 698 LT 6298 698 LT ST
|
(3) 6099 658 WT pop 0 originOffset 37 add RSS
|
(3) 6099 658 WT pop 0 originOffset 37 add RSS
|
3103 842 MT 6298 842 LS
|
3103 842 MT 6298 842 LS
|
3103 905 MT 3103 905 LT 6298 905 LT ST
|
3103 905 MT 3103 905 LT 6298 905 LT ST
|
3103 986 MT 3103 986 LT 6298 986 LT ST
|
3103 986 MT 3103 986 LT 6298 986 LT ST
|
(14610000) 3117 946 WT pop 0 originOffset 37 add RSS
|
(14610000) 3117 946 WT pop 0 originOffset 37 add RSS
|
3103 1049 MT 3103 1049 LT 6298 1049 LT ST
|
3103 1049 MT 3103 1049 LT 6298 1049 LT ST
|
3103 1130 MT 3103 1130 LT 6298 1130 LT ST
|
3103 1130 MT 3103 1130 LT 6298 1130 LT ST
|
(03) 3117 1090 WT pop 0 originOffset 37 add RSS
|
(03) 3117 1090 WT pop 0 originOffset 37 add RSS
|
3103 1274 MT 6298 1274 LS
|
3103 1274 MT 6298 1274 LS
|
% draw timeline
|
% draw timeline
|
3145 4533 MT 3145 4570 LS
|
3145 4533 MT 3145 4570 LS
|
3187 4533 MT 3187 4570 LS
|
3187 4533 MT 3187 4570 LS
|
3230 4533 MT 3230 4570 LS
|
3230 4533 MT 3230 4570 LS
|
3272 4533 MT 3272 4570 LS
|
3272 4533 MT 3272 4570 LS
|
3359 4533 MT 3359 4570 LS
|
3359 4533 MT 3359 4570 LS
|
3401 4533 MT 3401 4570 LS
|
3401 4533 MT 3401 4570 LS
|
3444 4533 MT 3444 4570 LS
|
3444 4533 MT 3444 4570 LS
|
3486 4533 MT 3486 4570 LS
|
3486 4533 MT 3486 4570 LS
|
3529 4533 MT 3529 4570 LS
|
3529 4533 MT 3529 4570 LS
|
3572 4533 MT 3572 4570 LS
|
3572 4533 MT 3572 4570 LS
|
3614 4533 MT 3614 4570 LS
|
3614 4533 MT 3614 4570 LS
|
3657 4533 MT 3657 4570 LS
|
3657 4533 MT 3657 4570 LS
|
3699 4533 MT 3699 4570 LS
|
3699 4533 MT 3699 4570 LS
|
3316 4506 MT 3316 4570 LS
|
3316 4506 MT 3316 4570 LS
|
(80) 3316 4649 WT TS RSS
|
(80) 3316 4649 WT TS RSS
|
3785 4533 MT 3785 4570 LS
|
3785 4533 MT 3785 4570 LS
|
3827 4533 MT 3827 4570 LS
|
3827 4533 MT 3827 4570 LS
|
3870 4533 MT 3870 4570 LS
|
3870 4533 MT 3870 4570 LS
|
3912 4533 MT 3912 4570 LS
|
3912 4533 MT 3912 4570 LS
|
3955 4533 MT 3955 4570 LS
|
3955 4533 MT 3955 4570 LS
|
3998 4533 MT 3998 4570 LS
|
3998 4533 MT 3998 4570 LS
|
4040 4533 MT 4040 4570 LS
|
4040 4533 MT 4040 4570 LS
|
4083 4533 MT 4083 4570 LS
|
4083 4533 MT 4083 4570 LS
|
4125 4533 MT 4125 4570 LS
|
4125 4533 MT 4125 4570 LS
|
3742 4506 MT 3742 4570 LS
|
3742 4506 MT 3742 4570 LS
|
4211 4533 MT 4211 4570 LS
|
4211 4533 MT 4211 4570 LS
|
4253 4533 MT 4253 4570 LS
|
4253 4533 MT 4253 4570 LS
|
4296 4533 MT 4296 4570 LS
|
4296 4533 MT 4296 4570 LS
|
4338 4533 MT 4338 4570 LS
|
4338 4533 MT 4338 4570 LS
|
4381 4533 MT 4381 4570 LS
|
4381 4533 MT 4381 4570 LS
|
4424 4533 MT 4424 4570 LS
|
4424 4533 MT 4424 4570 LS
|
4466 4533 MT 4466 4570 LS
|
4466 4533 MT 4466 4570 LS
|
4509 4533 MT 4509 4570 LS
|
4509 4533 MT 4509 4570 LS
|
4551 4533 MT 4551 4570 LS
|
4551 4533 MT 4551 4570 LS
|
4168 4506 MT 4168 4570 LS
|
4168 4506 MT 4168 4570 LS
|
(100) 4168 4649 WT TS RSS
|
(100) 4168 4649 WT TS RSS
|
4637 4533 MT 4637 4570 LS
|
4637 4533 MT 4637 4570 LS
|
4679 4533 MT 4679 4570 LS
|
4679 4533 MT 4679 4570 LS
|
4722 4533 MT 4722 4570 LS
|
4722 4533 MT 4722 4570 LS
|
4764 4533 MT 4764 4570 LS
|
4764 4533 MT 4764 4570 LS
|
4807 4533 MT 4807 4570 LS
|
4807 4533 MT 4807 4570 LS
|
4850 4533 MT 4850 4570 LS
|
4850 4533 MT 4850 4570 LS
|
4892 4533 MT 4892 4570 LS
|
4892 4533 MT 4892 4570 LS
|
4935 4533 MT 4935 4570 LS
|
4935 4533 MT 4935 4570 LS
|
4977 4533 MT 4977 4570 LS
|
4977 4533 MT 4977 4570 LS
|
4594 4506 MT 4594 4570 LS
|
4594 4506 MT 4594 4570 LS
|
5063 4533 MT 5063 4570 LS
|
5063 4533 MT 5063 4570 LS
|
5105 4533 MT 5105 4570 LS
|
5105 4533 MT 5105 4570 LS
|
5148 4533 MT 5148 4570 LS
|
5148 4533 MT 5148 4570 LS
|
5190 4533 MT 5190 4570 LS
|
5190 4533 MT 5190 4570 LS
|
5233 4533 MT 5233 4570 LS
|
5233 4533 MT 5233 4570 LS
|
5276 4533 MT 5276 4570 LS
|
5276 4533 MT 5276 4570 LS
|
5318 4533 MT 5318 4570 LS
|
5318 4533 MT 5318 4570 LS
|
5361 4533 MT 5361 4570 LS
|
5361 4533 MT 5361 4570 LS
|
5403 4533 MT 5403 4570 LS
|
5403 4533 MT 5403 4570 LS
|
5020 4506 MT 5020 4570 LS
|
5020 4506 MT 5020 4570 LS
|
(120) 5020 4649 WT TS RSS
|
(120) 5020 4649 WT TS RSS
|
5489 4533 MT 5489 4570 LS
|
5489 4533 MT 5489 4570 LS
|
5531 4533 MT 5531 4570 LS
|
5531 4533 MT 5531 4570 LS
|
5574 4533 MT 5574 4570 LS
|
5574 4533 MT 5574 4570 LS
|
5616 4533 MT 5616 4570 LS
|
5616 4533 MT 5616 4570 LS
|
5659 4533 MT 5659 4570 LS
|
5659 4533 MT 5659 4570 LS
|
5702 4533 MT 5702 4570 LS
|
5702 4533 MT 5702 4570 LS
|
5744 4533 MT 5744 4570 LS
|
5744 4533 MT 5744 4570 LS
|
5787 4533 MT 5787 4570 LS
|
5787 4533 MT 5787 4570 LS
|
5829 4533 MT 5829 4570 LS
|
5829 4533 MT 5829 4570 LS
|
5446 4506 MT 5446 4570 LS
|
5446 4506 MT 5446 4570 LS
|
5915 4533 MT 5915 4570 LS
|
5915 4533 MT 5915 4570 LS
|
5957 4533 MT 5957 4570 LS
|
5957 4533 MT 5957 4570 LS
|
6000 4533 MT 6000 4570 LS
|
6000 4533 MT 6000 4570 LS
|
6042 4533 MT 6042 4570 LS
|
6042 4533 MT 6042 4570 LS
|
6085 4533 MT 6085 4570 LS
|
6085 4533 MT 6085 4570 LS
|
6128 4533 MT 6128 4570 LS
|
6128 4533 MT 6128 4570 LS
|
6170 4533 MT 6170 4570 LS
|
6170 4533 MT 6170 4570 LS
|
6213 4533 MT 6213 4570 LS
|
6213 4533 MT 6213 4570 LS
|
6255 4533 MT 6255 4570 LS
|
6255 4533 MT 6255 4570 LS
|
5872 4506 MT 5872 4570 LS
|
5872 4506 MT 5872 4570 LS
|
(140) 5872 4649 WT TS RSS
|
(140) 5872 4649 WT TS RSS
|
6341 4533 MT 6341 4570 LS
|
6341 4533 MT 6341 4570 LS
|
6383 4533 MT 6383 4570 LS
|
6383 4533 MT 6383 4570 LS
|
6426 4533 MT 6426 4570 LS
|
6426 4533 MT 6426 4570 LS
|
6468 4533 MT 6468 4570 LS
|
6468 4533 MT 6468 4570 LS
|
6511 4533 MT 6511 4570 LS
|
6511 4533 MT 6511 4570 LS
|
6554 4533 MT 6554 4570 LS
|
6554 4533 MT 6554 4570 LS
|
6596 4533 MT 6596 4570 LS
|
6596 4533 MT 6596 4570 LS
|
6639 4533 MT 6639 4570 LS
|
6639 4533 MT 6639 4570 LS
|
6681 4533 MT 6681 4570 LS
|
6681 4533 MT 6681 4570 LS
|
6298 4506 MT 6298 4570 LS
|
6298 4506 MT 6298 4570 LS
|
% draw grid
|
% draw grid
|
3316 300 MT 3316 4506 LS
|
3316 300 MT 3316 4506 LS
|
3742 300 MT 3742 4506 LS
|
3742 300 MT 3742 4506 LS
|
4168 300 MT 4168 4506 LS
|
4168 300 MT 4168 4506 LS
|
4594 300 MT 4594 4506 LS
|
4594 300 MT 4594 4506 LS
|
5020 300 MT 5020 4506 LS
|
5020 300 MT 5020 4506 LS
|
5446 300 MT 5446 4506 LS
|
5446 300 MT 5446 4506 LS
|
5872 300 MT 5872 4506 LS
|
5872 300 MT 5872 4506 LS
|
6298 300 MT 6298 4506 LS
|
6298 300 MT 6298 4506 LS
|
% draw waveforms
|
% draw waveforms
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) 3066 409 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) 3066 409 WT TSE RSS
|
3309 300 MT 3323 300 LS
|
3309 300 MT 3323 300 LS
|
3735 300 MT 3749 300 LS
|
3735 300 MT 3749 300 LS
|
4161 300 MT 4175 300 LS
|
4161 300 MT 4175 300 LS
|
4587 300 MT 4601 300 LS
|
4587 300 MT 4601 300 LS
|
5013 300 MT 5027 300 LS
|
5013 300 MT 5027 300 LS
|
5439 300 MT 5453 300 LS
|
5439 300 MT 5453 300 LS
|
5865 300 MT 5879 300 LS
|
5865 300 MT 5879 300 LS
|
6291 300 MT 6305 300 LS
|
6291 300 MT 6305 300 LS
|
3103 329 MT 3103 329 LT 6298 329 LT ST
|
3103 329 MT 3103 329 LT 6298 329 LT ST
|
3103 410 MT 3103 410 LT 6298 410 LT ST
|
3103 410 MT 3103 410 LT 6298 410 LT ST
|
(1800) 3117 370 WT pop 0 originOffset 37 add RSS
|
(1800) 3117 370 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) 3066 553 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) 3066 553 WT TSE RSS
|
3309 444 MT 3323 444 LS
|
3309 444 MT 3323 444 LS
|
3735 444 MT 3749 444 LS
|
3735 444 MT 3749 444 LS
|
4161 444 MT 4175 444 LS
|
4161 444 MT 4175 444 LS
|
4587 444 MT 4601 444 LS
|
4587 444 MT 4601 444 LS
|
5013 444 MT 5027 444 LS
|
5013 444 MT 5027 444 LS
|
5439 444 MT 5453 444 LS
|
5439 444 MT 5453 444 LS
|
5865 444 MT 5879 444 LS
|
5865 444 MT 5879 444 LS
|
6291 444 MT 6305 444 LS
|
6291 444 MT 6305 444 LS
|
3103 473 MT 3103 473 LT 3522 473 LT 3529 514 LT ST
|
3103 473 MT 3103 473 LT 3522 473 LT 3529 514 LT ST
|
3103 554 MT 3103 554 LT 3522 554 LT 3529 514 LT ST
|
3103 554 MT 3103 554 LT 3522 554 LT 3529 514 LT ST
|
(5) 3117 514 WT pop 0 originOffset 37 add RSS
|
(5) 3117 514 WT pop 0 originOffset 37 add RSS
|
3529 514 MT 3529 514 LT 3536 473 LT 3948 473 LT 3955 514 LT ST
|
3529 514 MT 3529 514 LT 3536 473 LT 3948 473 LT 3955 514 LT ST
|
3529 514 MT 3529 514 LT 3536 554 LT 3948 554 LT 3955 514 LT ST
|
3529 514 MT 3529 514 LT 3536 554 LT 3948 554 LT 3955 514 LT ST
|
(6) 3543 514 WT pop 0 originOffset 37 add RSS
|
(6) 3543 514 WT pop 0 originOffset 37 add RSS
|
3955 514 MT 3955 514 LT 3962 473 LT 4374 473 LT 4381 514 LT ST
|
3955 514 MT 3955 514 LT 3962 473 LT 4374 473 LT 4381 514 LT ST
|
3955 514 MT 3955 514 LT 3962 554 LT 4374 554 LT 4381 514 LT ST
|
3955 514 MT 3955 514 LT 3962 554 LT 4374 554 LT 4381 514 LT ST
|
(7) 3969 514 WT pop 0 originOffset 37 add RSS
|
(7) 3969 514 WT pop 0 originOffset 37 add RSS
|
4381 514 MT 4381 514 LT 4388 473 LT 4800 473 LT 4807 514 LT ST
|
4381 514 MT 4381 514 LT 4388 473 LT 4800 473 LT 4807 514 LT ST
|
4381 514 MT 4381 514 LT 4388 554 LT 4800 554 LT 4807 514 LT ST
|
4381 514 MT 4381 514 LT 4388 554 LT 4800 554 LT 4807 514 LT ST
|
(0) 4395 514 WT pop 0 originOffset 37 add RSS
|
(0) 4395 514 WT pop 0 originOffset 37 add RSS
|
4807 514 MT 4807 514 LT 4814 473 LT 5226 473 LT 5233 514 LT ST
|
4807 514 MT 4807 514 LT 4814 473 LT 5226 473 LT 5233 514 LT ST
|
4807 514 MT 4807 514 LT 4814 554 LT 5226 554 LT 5233 514 LT ST
|
4807 514 MT 4807 514 LT 4814 554 LT 5226 554 LT 5233 514 LT ST
|
(1) 4821 514 WT pop 0 originOffset 37 add RSS
|
(1) 4821 514 WT pop 0 originOffset 37 add RSS
|
5233 514 MT 5233 514 LT 5240 473 LT 5652 473 LT 5659 514 LT ST
|
5233 514 MT 5233 514 LT 5240 473 LT 5652 473 LT 5659 514 LT ST
|
5233 514 MT 5233 514 LT 5240 554 LT 5652 554 LT 5659 514 LT ST
|
5233 514 MT 5233 514 LT 5240 554 LT 5652 554 LT 5659 514 LT ST
|
(2) 5247 514 WT pop 0 originOffset 37 add RSS
|
(2) 5247 514 WT pop 0 originOffset 37 add RSS
|
5659 514 MT 5659 514 LT 5666 473 LT 6078 473 LT 6085 514 LT ST
|
5659 514 MT 5659 514 LT 5666 473 LT 6078 473 LT 6085 514 LT ST
|
5659 514 MT 5659 514 LT 5666 554 LT 6078 554 LT 6085 514 LT ST
|
5659 514 MT 5659 514 LT 5666 554 LT 6078 554 LT 6085 514 LT ST
|
(3) 5673 514 WT pop 0 originOffset 37 add RSS
|
(3) 5673 514 WT pop 0 originOffset 37 add RSS
|
6085 514 MT 6085 514 LT 6092 473 LT 6298 473 LT ST
|
6085 514 MT 6085 514 LT 6092 473 LT 6298 473 LT ST
|
6085 514 MT 6085 514 LT 6092 554 LT 6298 554 LT ST
|
6085 514 MT 6085 514 LT 6092 554 LT 6298 554 LT ST
|
(4) 6099 514 WT pop 0 originOffset 37 add RSS
|
(4) 6099 514 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) 3066 697 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) 3066 697 WT TSE RSS
|
3309 588 MT 3323 588 LS
|
3309 588 MT 3323 588 LS
|
3735 588 MT 3749 588 LS
|
3735 588 MT 3749 588 LS
|
4161 588 MT 4175 588 LS
|
4161 588 MT 4175 588 LS
|
4587 588 MT 4601 588 LS
|
4587 588 MT 4601 588 LS
|
5013 588 MT 5027 588 LS
|
5013 588 MT 5027 588 LS
|
5439 588 MT 5453 588 LS
|
5439 588 MT 5453 588 LS
|
5865 588 MT 5879 588 LS
|
5865 588 MT 5879 588 LS
|
6291 588 MT 6305 588 LS
|
6291 588 MT 6305 588 LS
|
3103 617 MT 3103 617 LT 3522 617 LT 3529 658 LT ST
|
3103 617 MT 3103 617 LT 3522 617 LT 3529 658 LT ST
|
3103 698 MT 3103 698 LT 3522 698 LT 3529 658 LT ST
|
3103 698 MT 3103 698 LT 3522 698 LT 3529 658 LT ST
|
(4) 3117 658 WT pop 0 originOffset 37 add RSS
|
(4) 3117 658 WT pop 0 originOffset 37 add RSS
|
3529 658 MT 3529 658 LT 3536 617 LT 3948 617 LT 3955 658 LT ST
|
3529 658 MT 3529 658 LT 3536 617 LT 3948 617 LT 3955 658 LT ST
|
3529 658 MT 3529 658 LT 3536 698 LT 3948 698 LT 3955 658 LT ST
|
3529 658 MT 3529 658 LT 3536 698 LT 3948 698 LT 3955 658 LT ST
|
(5) 3543 658 WT pop 0 originOffset 37 add RSS
|
(5) 3543 658 WT pop 0 originOffset 37 add RSS
|
3955 658 MT 3955 658 LT 3962 617 LT 4374 617 LT 4381 658 LT ST
|
3955 658 MT 3955 658 LT 3962 617 LT 4374 617 LT 4381 658 LT ST
|
3955 658 MT 3955 658 LT 3962 698 LT 4374 698 LT 4381 658 LT ST
|
3955 658 MT 3955 658 LT 3962 698 LT 4374 698 LT 4381 658 LT ST
|
(6) 3969 658 WT pop 0 originOffset 37 add RSS
|
(6) 3969 658 WT pop 0 originOffset 37 add RSS
|
4381 658 MT 4381 658 LT 4388 617 LT 4800 617 LT 4807 658 LT ST
|
4381 658 MT 4381 658 LT 4388 617 LT 4800 617 LT 4807 658 LT ST
|
4381 658 MT 4381 658 LT 4388 698 LT 4800 698 LT 4807 658 LT ST
|
4381 658 MT 4381 658 LT 4388 698 LT 4800 698 LT 4807 658 LT ST
|
(7) 4395 658 WT pop 0 originOffset 37 add RSS
|
(7) 4395 658 WT pop 0 originOffset 37 add RSS
|
4807 658 MT 4807 658 LT 4814 617 LT 5226 617 LT 5233 658 LT ST
|
4807 658 MT 4807 658 LT 4814 617 LT 5226 617 LT 5233 658 LT ST
|
4807 658 MT 4807 658 LT 4814 698 LT 5226 698 LT 5233 658 LT ST
|
4807 658 MT 4807 658 LT 4814 698 LT 5226 698 LT 5233 658 LT ST
|
(0) 4821 658 WT pop 0 originOffset 37 add RSS
|
(0) 4821 658 WT pop 0 originOffset 37 add RSS
|
5233 658 MT 5233 658 LT 5240 617 LT 5652 617 LT 5659 658 LT ST
|
5233 658 MT 5233 658 LT 5240 617 LT 5652 617 LT 5659 658 LT ST
|
5233 658 MT 5233 658 LT 5240 698 LT 5652 698 LT 5659 658 LT ST
|
5233 658 MT 5233 658 LT 5240 698 LT 5652 698 LT 5659 658 LT ST
|
(1) 5247 658 WT pop 0 originOffset 37 add RSS
|
(1) 5247 658 WT pop 0 originOffset 37 add RSS
|
5659 658 MT 5659 658 LT 5666 617 LT 6078 617 LT 6085 658 LT ST
|
5659 658 MT 5659 658 LT 5666 617 LT 6078 617 LT 6085 658 LT ST
|
5659 658 MT 5659 658 LT 5666 698 LT 6078 698 LT 6085 658 LT ST
|
5659 658 MT 5659 658 LT 5666 698 LT 6078 698 LT 6085 658 LT ST
|
(2) 5673 658 WT pop 0 originOffset 37 add RSS
|
(2) 5673 658 WT pop 0 originOffset 37 add RSS
|
6085 658 MT 6085 658 LT 6092 617 LT 6298 617 LT ST
|
6085 658 MT 6085 658 LT 6092 617 LT 6298 617 LT ST
|
6085 658 MT 6085 658 LT 6092 698 LT 6298 698 LT ST
|
6085 658 MT 6085 658 LT 6092 698 LT 6298 698 LT ST
|
(3) 6099 658 WT pop 0 originOffset 37 add RSS
|
(3) 6099 658 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) 3066 841 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) 3066 841 WT TSE RSS
|
3309 732 MT 3323 732 LS
|
3309 732 MT 3323 732 LS
|
3735 732 MT 3749 732 LS
|
3735 732 MT 3749 732 LS
|
4161 732 MT 4175 732 LS
|
4161 732 MT 4175 732 LS
|
4587 732 MT 4601 732 LS
|
4587 732 MT 4601 732 LS
|
5013 732 MT 5027 732 LS
|
5013 732 MT 5027 732 LS
|
5439 732 MT 5453 732 LS
|
5439 732 MT 5453 732 LS
|
5865 732 MT 5879 732 LS
|
5865 732 MT 5879 732 LS
|
6291 732 MT 6305 732 LS
|
6291 732 MT 6305 732 LS
|
3103 842 MT 6298 842 LS
|
3103 842 MT 6298 842 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) 3066 985 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) 3066 985 WT TSE RSS
|
3309 876 MT 3323 876 LS
|
3309 876 MT 3323 876 LS
|
3735 876 MT 3749 876 LS
|
3735 876 MT 3749 876 LS
|
4161 876 MT 4175 876 LS
|
4161 876 MT 4175 876 LS
|
4587 876 MT 4601 876 LS
|
4587 876 MT 4601 876 LS
|
5013 876 MT 5027 876 LS
|
5013 876 MT 5027 876 LS
|
5439 876 MT 5453 876 LS
|
5439 876 MT 5453 876 LS
|
5865 876 MT 5879 876 LS
|
5865 876 MT 5879 876 LS
|
6291 876 MT 6305 876 LS
|
6291 876 MT 6305 876 LS
|
3103 905 MT 3103 905 LT 6298 905 LT ST
|
3103 905 MT 3103 905 LT 6298 905 LT ST
|
3103 986 MT 3103 986 LT 6298 986 LT ST
|
3103 986 MT 3103 986 LT 6298 986 LT ST
|
(14610000) 3117 946 WT pop 0 originOffset 37 add RSS
|
(14610000) 3117 946 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) 3066 1129 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) 3066 1129 WT TSE RSS
|
3309 1020 MT 3323 1020 LS
|
3309 1020 MT 3323 1020 LS
|
3735 1020 MT 3749 1020 LS
|
3735 1020 MT 3749 1020 LS
|
4161 1020 MT 4175 1020 LS
|
4161 1020 MT 4175 1020 LS
|
4587 1020 MT 4601 1020 LS
|
4587 1020 MT 4601 1020 LS
|
5013 1020 MT 5027 1020 LS
|
5013 1020 MT 5027 1020 LS
|
5439 1020 MT 5453 1020 LS
|
5439 1020 MT 5453 1020 LS
|
5865 1020 MT 5879 1020 LS
|
5865 1020 MT 5879 1020 LS
|
6291 1020 MT 6305 1020 LS
|
6291 1020 MT 6305 1020 LS
|
3103 1049 MT 3103 1049 LT 6298 1049 LT ST
|
3103 1049 MT 3103 1049 LT 6298 1049 LT ST
|
3103 1130 MT 3103 1130 LT 6298 1130 LT ST
|
3103 1130 MT 3103 1130 LT 6298 1130 LT ST
|
(03) 3117 1090 WT pop 0 originOffset 37 add RSS
|
(03) 3117 1090 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) 3066 1273 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) 3066 1273 WT TSE RSS
|
3309 1164 MT 3323 1164 LS
|
3309 1164 MT 3323 1164 LS
|
3735 1164 MT 3749 1164 LS
|
3735 1164 MT 3749 1164 LS
|
4161 1164 MT 4175 1164 LS
|
4161 1164 MT 4175 1164 LS
|
4587 1164 MT 4601 1164 LS
|
4587 1164 MT 4601 1164 LS
|
5013 1164 MT 5027 1164 LS
|
5013 1164 MT 5027 1164 LS
|
5439 1164 MT 5453 1164 LS
|
5439 1164 MT 5453 1164 LS
|
5865 1164 MT 5879 1164 LS
|
5865 1164 MT 5879 1164 LS
|
6291 1164 MT 6305 1164 LS
|
6291 1164 MT 6305 1164 LS
|
3103 1274 MT 6298 1274 LS
|
3103 1274 MT 6298 1274 LS
|
% draw footer
|
% draw footer
|
(Entity:tb_or1200_cpu Architecture: Date: Sat Aug 14 00:33:37 EDT 2004 Row: 2 Page: 4) 300 4799 WT TSW RSS
|
(Entity:tb_or1200_cpu Architecture: Date: Sat Aug 14 00:33:37 EDT 2004 Row: 2 Page: 4) 300 4799 WT TSW RSS
|
grestore
|
grestore
|
showpage
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showpage
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%%Page: 5 5
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%%Page: 5 5
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gsave
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gsave
|
90 rotate 0.12 dup neg scale
|
90 rotate 0.12 dup neg scale
|
% dump string table
|
% dump string table
|
/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
|
/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
|
/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
|
/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
|
/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
|
/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
|
/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
|
/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
|
/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
|
/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
|
/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
|
/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
|
/ARC {5 -2 roll SX 5 2 roll arc} def
|
/ARC {5 -2 roll SX 5 2 roll arc} def
|
/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3103 def/REdge 5699 def/LabelWidth 3066 def
|
/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3103 def/REdge 5699 def/LabelWidth 3066 def
|
/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
|
/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
|
/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
|
/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/alu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/alu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_taken) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_taken) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/clk) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/clk) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/comp_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/comp_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_limm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_limm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/du_hwbkpt) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/du_hwbkpt) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/except_illegal) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/except_illegal) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) MLW
|
% draw waveform shading
|
% draw waveform shading
|
[] 0 SD
|
[] 0 SD
|
2.995 setlinewidth
|
2.995 setlinewidth
|
0 setlinejoin
|
0 setlinejoin
|
0 setlinecap
|
0 setlinecap
|
0 0 0 CL
|
0 0 0 CL
|
3103 370 MT 6298 370 LS
|
3103 370 MT 6298 370 LS
|
3103 554 MT 6298 554 LS
|
3103 554 MT 6298 554 LS
|
3103 698 MT 6298 698 LS
|
3103 698 MT 6298 698 LS
|
3103 761 MT 3103 761 LT 6298 761 LT ST
|
3103 761 MT 3103 761 LT 6298 761 LT ST
|
3103 842 MT 3103 842 LT 6298 842 LT ST
|
3103 842 MT 3103 842 LT 6298 842 LT ST
|
(14610000) 3117 802 WT pop 0 originOffset 37 add RSS
|
(14610000) 3117 802 WT pop 0 originOffset 37 add RSS
|
3103 986 MT 6298 986 LS
|
3103 986 MT 6298 986 LS
|
3103 1050 MT 6298 1050 LS
|
3103 1050 MT 6298 1050 LS
|
3103 1193 MT 3103 1193 LT 6298 1193 LT ST
|
3103 1193 MT 3103 1193 LT 6298 1193 LT ST
|
3103 1274 MT 3103 1274 LT 6298 1274 LT ST
|
3103 1274 MT 3103 1274 LT 6298 1274 LT ST
|
(14610000) 3117 1234 WT pop 0 originOffset 37 add RSS
|
(14610000) 3117 1234 WT pop 0 originOffset 37 add RSS
|
3103 1418 MT 6298 1418 LS
|
3103 1418 MT 6298 1418 LS
|
3103 1481 MT 3103 1481 LT 6298 1481 LT ST
|
3103 1481 MT 3103 1481 LT 6298 1481 LT ST
|
3103 1562 MT 3103 1562 LT 6298 1562 LT ST
|
3103 1562 MT 3103 1562 LT 6298 1562 LT ST
|
(00000000) 3117 1522 WT pop 0 originOffset 37 add RSS
|
(00000000) 3117 1522 WT pop 0 originOffset 37 add RSS
|
3103 1625 MT 3103 1625 LT 6298 1625 LT ST
|
3103 1625 MT 3103 1625 LT 6298 1625 LT ST
|
3103 1706 MT 3103 1706 LT 6298 1706 LT ST
|
3103 1706 MT 3103 1706 LT 6298 1706 LT ST
|
(0) 3117 1666 WT pop 0 originOffset 37 add RSS
|
(0) 3117 1666 WT pop 0 originOffset 37 add RSS
|
3103 1769 MT 3103 1769 LT 6298 1769 LT ST
|
3103 1769 MT 3103 1769 LT 6298 1769 LT ST
|
3103 1850 MT 3103 1850 LT 6298 1850 LT ST
|
3103 1850 MT 3103 1850 LT 6298 1850 LT ST
|
(0) 3117 1810 WT pop 0 originOffset 37 add RSS
|
(0) 3117 1810 WT pop 0 originOffset 37 add RSS
|
3103 1913 MT 3103 1913 LT 6298 1913 LT ST
|
3103 1913 MT 3103 1913 LT 6298 1913 LT ST
|
3103 1994 MT 3103 1994 LT 6298 1994 LT ST
|
3103 1994 MT 3103 1994 LT 6298 1994 LT ST
|
(0) 3117 1954 WT pop 0 originOffset 37 add RSS
|
(0) 3117 1954 WT pop 0 originOffset 37 add RSS
|
3103 2138 MT 6298 2138 LS
|
3103 2138 MT 6298 2138 LS
|
3103 2201 MT 3103 2201 LT 6298 2201 LT ST
|
3103 2201 MT 3103 2201 LT 6298 2201 LT ST
|
3103 2282 MT 3103 2282 LT 6298 2282 LT ST
|
3103 2282 MT 3103 2282 LT 6298 2282 LT ST
|
(0) 3117 2242 WT pop 0 originOffset 37 add RSS
|
(0) 3117 2242 WT pop 0 originOffset 37 add RSS
|
3103 2345 MT 3103 2345 LT 6298 2345 LT ST
|
3103 2345 MT 3103 2345 LT 6298 2345 LT ST
|
3103 2426 MT 3103 2426 LT 6298 2426 LT ST
|
3103 2426 MT 3103 2426 LT 6298 2426 LT ST
|
(01) 3117 2386 WT pop 0 originOffset 37 add RSS
|
(01) 3117 2386 WT pop 0 originOffset 37 add RSS
|
3103 2489 MT 3103 2489 LT 6298 2489 LT ST
|
3103 2489 MT 3103 2489 LT 6298 2489 LT ST
|
3103 2570 MT 3103 2570 LT 6298 2570 LT ST
|
3103 2570 MT 3103 2570 LT 6298 2570 LT ST
|
(00) 3117 2530 WT pop 0 originOffset 37 add RSS
|
(00) 3117 2530 WT pop 0 originOffset 37 add RSS
|
3103 2633 MT 3103 2633 LT 6298 2633 LT ST
|
3103 2633 MT 3103 2633 LT 6298 2633 LT ST
|
3103 2714 MT 3103 2714 LT 6298 2714 LT ST
|
3103 2714 MT 3103 2714 LT 6298 2714 LT ST
|
(03) 3117 2674 WT pop 0 originOffset 37 add RSS
|
(03) 3117 2674 WT pop 0 originOffset 37 add RSS
|
3103 2858 MT 6298 2858 LS
|
3103 2858 MT 6298 2858 LS
|
3103 3002 MT 6298 3002 LS
|
3103 3002 MT 6298 3002 LS
|
3103 3146 MT 6298 3146 LS
|
3103 3146 MT 6298 3146 LS
|
3103 3209 MT 3103 3209 LT 6298 3209 LT ST
|
3103 3209 MT 3103 3209 LT 6298 3209 LT ST
|
3103 3290 MT 3103 3290 LT 6298 3290 LT ST
|
3103 3290 MT 3103 3290 LT 6298 3290 LT ST
|
(0) 3117 3250 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3250 WT pop 0 originOffset 37 add RSS
|
3103 3434 MT 6298 3434 LS
|
3103 3434 MT 6298 3434 LS
|
3103 3497 MT 3103 3497 LT 6298 3497 LT ST
|
3103 3497 MT 3103 3497 LT 6298 3497 LT ST
|
3103 3578 MT 3103 3578 LT 6298 3578 LT ST
|
3103 3578 MT 3103 3578 LT 6298 3578 LT ST
|
(0) 3117 3538 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3538 WT pop 0 originOffset 37 add RSS
|
3103 3641 MT 3103 3641 LT 6298 3641 LT ST
|
3103 3641 MT 3103 3641 LT 6298 3641 LT ST
|
3103 3722 MT 3103 3722 LT 6298 3722 LT ST
|
3103 3722 MT 3103 3722 LT 6298 3722 LT ST
|
(0) 3117 3682 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3682 WT pop 0 originOffset 37 add RSS
|
3103 3866 MT 6298 3866 LS
|
3103 3866 MT 6298 3866 LS
|
3103 3929 MT 3103 3929 LT 6298 3929 LT ST
|
3103 3929 MT 3103 3929 LT 6298 3929 LT ST
|
3103 4010 MT 3103 4010 LT 6298 4010 LT ST
|
3103 4010 MT 3103 4010 LT 6298 4010 LT ST
|
(0) 3117 3970 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3970 WT pop 0 originOffset 37 add RSS
|
3103 4154 MT 6298 4154 LS
|
3103 4154 MT 6298 4154 LS
|
3103 4258 MT 6298 4258 LS
|
3103 4258 MT 6298 4258 LS
|
3103 4361 MT 3103 4361 LT 6298 4361 LT ST
|
3103 4361 MT 3103 4361 LT 6298 4361 LT ST
|
3103 4442 MT 3103 4442 LT 6298 4442 LT ST
|
3103 4442 MT 3103 4442 LT 6298 4442 LT ST
|
(00000000) 3117 4402 WT pop 0 originOffset 37 add RSS
|
(00000000) 3117 4402 WT pop 0 originOffset 37 add RSS
|
% draw timeline
|
% draw timeline
|
3146 4533 MT 3146 4570 LS
|
3146 4533 MT 3146 4570 LS
|
3188 4533 MT 3188 4570 LS
|
3188 4533 MT 3188 4570 LS
|
3231 4533 MT 3231 4570 LS
|
3231 4533 MT 3231 4570 LS
|
3273 4533 MT 3273 4570 LS
|
3273 4533 MT 3273 4570 LS
|
3316 4533 MT 3316 4570 LS
|
3316 4533 MT 3316 4570 LS
|
3359 4533 MT 3359 4570 LS
|
3359 4533 MT 3359 4570 LS
|
3401 4533 MT 3401 4570 LS
|
3401 4533 MT 3401 4570 LS
|
3444 4533 MT 3444 4570 LS
|
3444 4533 MT 3444 4570 LS
|
3486 4533 MT 3486 4570 LS
|
3486 4533 MT 3486 4570 LS
|
3572 4533 MT 3572 4570 LS
|
3572 4533 MT 3572 4570 LS
|
3614 4533 MT 3614 4570 LS
|
3614 4533 MT 3614 4570 LS
|
3657 4533 MT 3657 4570 LS
|
3657 4533 MT 3657 4570 LS
|
3699 4533 MT 3699 4570 LS
|
3699 4533 MT 3699 4570 LS
|
3742 4533 MT 3742 4570 LS
|
3742 4533 MT 3742 4570 LS
|
3785 4533 MT 3785 4570 LS
|
3785 4533 MT 3785 4570 LS
|
3827 4533 MT 3827 4570 LS
|
3827 4533 MT 3827 4570 LS
|
3870 4533 MT 3870 4570 LS
|
3870 4533 MT 3870 4570 LS
|
3912 4533 MT 3912 4570 LS
|
3912 4533 MT 3912 4570 LS
|
3529 4506 MT 3529 4570 LS
|
3529 4506 MT 3529 4570 LS
|
(160) 3529 4649 WT TS RSS
|
(160) 3529 4649 WT TS RSS
|
3998 4533 MT 3998 4570 LS
|
3998 4533 MT 3998 4570 LS
|
4040 4533 MT 4040 4570 LS
|
4040 4533 MT 4040 4570 LS
|
4083 4533 MT 4083 4570 LS
|
4083 4533 MT 4083 4570 LS
|
4125 4533 MT 4125 4570 LS
|
4125 4533 MT 4125 4570 LS
|
4168 4533 MT 4168 4570 LS
|
4168 4533 MT 4168 4570 LS
|
4211 4533 MT 4211 4570 LS
|
4211 4533 MT 4211 4570 LS
|
4253 4533 MT 4253 4570 LS
|
4253 4533 MT 4253 4570 LS
|
4296 4533 MT 4296 4570 LS
|
4296 4533 MT 4296 4570 LS
|
4338 4533 MT 4338 4570 LS
|
4338 4533 MT 4338 4570 LS
|
3955 4506 MT 3955 4570 LS
|
3955 4506 MT 3955 4570 LS
|
4424 4533 MT 4424 4570 LS
|
4424 4533 MT 4424 4570 LS
|
4466 4533 MT 4466 4570 LS
|
4466 4533 MT 4466 4570 LS
|
4509 4533 MT 4509 4570 LS
|
4509 4533 MT 4509 4570 LS
|
4551 4533 MT 4551 4570 LS
|
4551 4533 MT 4551 4570 LS
|
4594 4533 MT 4594 4570 LS
|
4594 4533 MT 4594 4570 LS
|
4637 4533 MT 4637 4570 LS
|
4637 4533 MT 4637 4570 LS
|
4679 4533 MT 4679 4570 LS
|
4679 4533 MT 4679 4570 LS
|
4722 4533 MT 4722 4570 LS
|
4722 4533 MT 4722 4570 LS
|
4764 4533 MT 4764 4570 LS
|
4764 4533 MT 4764 4570 LS
|
4381 4506 MT 4381 4570 LS
|
4381 4506 MT 4381 4570 LS
|
(180) 4381 4649 WT TS RSS
|
(180) 4381 4649 WT TS RSS
|
4850 4533 MT 4850 4570 LS
|
4850 4533 MT 4850 4570 LS
|
4892 4533 MT 4892 4570 LS
|
4892 4533 MT 4892 4570 LS
|
4935 4533 MT 4935 4570 LS
|
4935 4533 MT 4935 4570 LS
|
4977 4533 MT 4977 4570 LS
|
4977 4533 MT 4977 4570 LS
|
5020 4533 MT 5020 4570 LS
|
5020 4533 MT 5020 4570 LS
|
5063 4533 MT 5063 4570 LS
|
5063 4533 MT 5063 4570 LS
|
5105 4533 MT 5105 4570 LS
|
5105 4533 MT 5105 4570 LS
|
5148 4533 MT 5148 4570 LS
|
5148 4533 MT 5148 4570 LS
|
5190 4533 MT 5190 4570 LS
|
5190 4533 MT 5190 4570 LS
|
4807 4506 MT 4807 4570 LS
|
4807 4506 MT 4807 4570 LS
|
5276 4533 MT 5276 4570 LS
|
5276 4533 MT 5276 4570 LS
|
5318 4533 MT 5318 4570 LS
|
5318 4533 MT 5318 4570 LS
|
5361 4533 MT 5361 4570 LS
|
5361 4533 MT 5361 4570 LS
|
5403 4533 MT 5403 4570 LS
|
5403 4533 MT 5403 4570 LS
|
5446 4533 MT 5446 4570 LS
|
5446 4533 MT 5446 4570 LS
|
5489 4533 MT 5489 4570 LS
|
5489 4533 MT 5489 4570 LS
|
5531 4533 MT 5531 4570 LS
|
5531 4533 MT 5531 4570 LS
|
5574 4533 MT 5574 4570 LS
|
5574 4533 MT 5574 4570 LS
|
5616 4533 MT 5616 4570 LS
|
5616 4533 MT 5616 4570 LS
|
5233 4506 MT 5233 4570 LS
|
5233 4506 MT 5233 4570 LS
|
(200) 5233 4649 WT TS RSS
|
(200) 5233 4649 WT TS RSS
|
5702 4533 MT 5702 4570 LS
|
5702 4533 MT 5702 4570 LS
|
5744 4533 MT 5744 4570 LS
|
5744 4533 MT 5744 4570 LS
|
5787 4533 MT 5787 4570 LS
|
5787 4533 MT 5787 4570 LS
|
5829 4533 MT 5829 4570 LS
|
5829 4533 MT 5829 4570 LS
|
5872 4533 MT 5872 4570 LS
|
5872 4533 MT 5872 4570 LS
|
5915 4533 MT 5915 4570 LS
|
5915 4533 MT 5915 4570 LS
|
5957 4533 MT 5957 4570 LS
|
5957 4533 MT 5957 4570 LS
|
6000 4533 MT 6000 4570 LS
|
6000 4533 MT 6000 4570 LS
|
6042 4533 MT 6042 4570 LS
|
6042 4533 MT 6042 4570 LS
|
5659 4506 MT 5659 4570 LS
|
5659 4506 MT 5659 4570 LS
|
6128 4533 MT 6128 4570 LS
|
6128 4533 MT 6128 4570 LS
|
6170 4533 MT 6170 4570 LS
|
6170 4533 MT 6170 4570 LS
|
6213 4533 MT 6213 4570 LS
|
6213 4533 MT 6213 4570 LS
|
6255 4533 MT 6255 4570 LS
|
6255 4533 MT 6255 4570 LS
|
6298 4533 MT 6298 4570 LS
|
6298 4533 MT 6298 4570 LS
|
6341 4533 MT 6341 4570 LS
|
6341 4533 MT 6341 4570 LS
|
6383 4533 MT 6383 4570 LS
|
6383 4533 MT 6383 4570 LS
|
6426 4533 MT 6426 4570 LS
|
6426 4533 MT 6426 4570 LS
|
6468 4533 MT 6468 4570 LS
|
6468 4533 MT 6468 4570 LS
|
6085 4506 MT 6085 4570 LS
|
6085 4506 MT 6085 4570 LS
|
(220) 6085 4649 WT TS RSS
|
(220) 6085 4649 WT TS RSS
|
% draw grid
|
% draw grid
|
3529 300 MT 3529 4506 LS
|
3529 300 MT 3529 4506 LS
|
3955 300 MT 3955 4506 LS
|
3955 300 MT 3955 4506 LS
|
4381 300 MT 4381 4506 LS
|
4381 300 MT 4381 4506 LS
|
4807 300 MT 4807 4506 LS
|
4807 300 MT 4807 4506 LS
|
5233 300 MT 5233 4506 LS
|
5233 300 MT 5233 4506 LS
|
5659 300 MT 5659 4506 LS
|
5659 300 MT 5659 4506 LS
|
6085 300 MT 6085 4506 LS
|
6085 300 MT 6085 4506 LS
|
% draw waveforms
|
% draw waveforms
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) 3066 409 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) 3066 409 WT TSE RSS
|
3522 300 MT 3536 300 LS
|
3522 300 MT 3536 300 LS
|
3948 300 MT 3962 300 LS
|
3948 300 MT 3962 300 LS
|
4374 300 MT 4388 300 LS
|
4374 300 MT 4388 300 LS
|
4800 300 MT 4814 300 LS
|
4800 300 MT 4814 300 LS
|
5226 300 MT 5240 300 LS
|
5226 300 MT 5240 300 LS
|
5652 300 MT 5666 300 LS
|
5652 300 MT 5666 300 LS
|
6078 300 MT 6092 300 LS
|
6078 300 MT 6092 300 LS
|
3103 370 MT 6298 370 LS
|
3103 370 MT 6298 370 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) 3066 553 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) 3066 553 WT TSE RSS
|
3522 444 MT 3536 444 LS
|
3522 444 MT 3536 444 LS
|
3948 444 MT 3962 444 LS
|
3948 444 MT 3962 444 LS
|
4374 444 MT 4388 444 LS
|
4374 444 MT 4388 444 LS
|
4800 444 MT 4814 444 LS
|
4800 444 MT 4814 444 LS
|
5226 444 MT 5240 444 LS
|
5226 444 MT 5240 444 LS
|
5652 444 MT 5666 444 LS
|
5652 444 MT 5666 444 LS
|
6078 444 MT 6092 444 LS
|
6078 444 MT 6092 444 LS
|
3103 554 MT 6298 554 LS
|
3103 554 MT 6298 554 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) 3066 697 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) 3066 697 WT TSE RSS
|
3522 588 MT 3536 588 LS
|
3522 588 MT 3536 588 LS
|
3948 588 MT 3962 588 LS
|
3948 588 MT 3962 588 LS
|
4374 588 MT 4388 588 LS
|
4374 588 MT 4388 588 LS
|
4800 588 MT 4814 588 LS
|
4800 588 MT 4814 588 LS
|
5226 588 MT 5240 588 LS
|
5226 588 MT 5240 588 LS
|
5652 588 MT 5666 588 LS
|
5652 588 MT 5666 588 LS
|
6078 588 MT 6092 588 LS
|
6078 588 MT 6092 588 LS
|
3103 698 MT 6298 698 LS
|
3103 698 MT 6298 698 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) 3066 841 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) 3066 841 WT TSE RSS
|
3522 732 MT 3536 732 LS
|
3522 732 MT 3536 732 LS
|
3948 732 MT 3962 732 LS
|
3948 732 MT 3962 732 LS
|
4374 732 MT 4388 732 LS
|
4374 732 MT 4388 732 LS
|
4800 732 MT 4814 732 LS
|
4800 732 MT 4814 732 LS
|
5226 732 MT 5240 732 LS
|
5226 732 MT 5240 732 LS
|
5652 732 MT 5666 732 LS
|
5652 732 MT 5666 732 LS
|
6078 732 MT 6092 732 LS
|
6078 732 MT 6092 732 LS
|
3103 761 MT 3103 761 LT 6298 761 LT ST
|
3103 761 MT 3103 761 LT 6298 761 LT ST
|
3103 842 MT 3103 842 LT 6298 842 LT ST
|
3103 842 MT 3103 842 LT 6298 842 LT ST
|
(14610000) 3117 802 WT pop 0 originOffset 37 add RSS
|
(14610000) 3117 802 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) 3066 985 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) 3066 985 WT TSE RSS
|
3522 876 MT 3536 876 LS
|
3522 876 MT 3536 876 LS
|
3948 876 MT 3962 876 LS
|
3948 876 MT 3962 876 LS
|
4374 876 MT 4388 876 LS
|
4374 876 MT 4388 876 LS
|
4800 876 MT 4814 876 LS
|
4800 876 MT 4814 876 LS
|
5226 876 MT 5240 876 LS
|
5226 876 MT 5240 876 LS
|
5652 876 MT 5666 876 LS
|
5652 876 MT 5666 876 LS
|
6078 876 MT 6092 876 LS
|
6078 876 MT 6092 876 LS
|
3103 986 MT 6298 986 LS
|
3103 986 MT 6298 986 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) 3066 1129 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) 3066 1129 WT TSE RSS
|
3522 1020 MT 3536 1020 LS
|
3522 1020 MT 3536 1020 LS
|
3948 1020 MT 3962 1020 LS
|
3948 1020 MT 3962 1020 LS
|
4374 1020 MT 4388 1020 LS
|
4374 1020 MT 4388 1020 LS
|
4800 1020 MT 4814 1020 LS
|
4800 1020 MT 4814 1020 LS
|
5226 1020 MT 5240 1020 LS
|
5226 1020 MT 5240 1020 LS
|
5652 1020 MT 5666 1020 LS
|
5652 1020 MT 5666 1020 LS
|
6078 1020 MT 6092 1020 LS
|
6078 1020 MT 6092 1020 LS
|
3103 1050 MT 6298 1050 LS
|
3103 1050 MT 6298 1050 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) 3066 1273 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) 3066 1273 WT TSE RSS
|
3522 1164 MT 3536 1164 LS
|
3522 1164 MT 3536 1164 LS
|
3948 1164 MT 3962 1164 LS
|
3948 1164 MT 3962 1164 LS
|
4374 1164 MT 4388 1164 LS
|
4374 1164 MT 4388 1164 LS
|
4800 1164 MT 4814 1164 LS
|
4800 1164 MT 4814 1164 LS
|
5226 1164 MT 5240 1164 LS
|
5226 1164 MT 5240 1164 LS
|
5652 1164 MT 5666 1164 LS
|
5652 1164 MT 5666 1164 LS
|
6078 1164 MT 6092 1164 LS
|
6078 1164 MT 6092 1164 LS
|
3103 1193 MT 3103 1193 LT 6298 1193 LT ST
|
3103 1193 MT 3103 1193 LT 6298 1193 LT ST
|
3103 1274 MT 3103 1274 LT 6298 1274 LT ST
|
3103 1274 MT 3103 1274 LT 6298 1274 LT ST
|
(14610000) 3117 1234 WT pop 0 originOffset 37 add RSS
|
(14610000) 3117 1234 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) 3066 1417 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) 3066 1417 WT TSE RSS
|
3522 1308 MT 3536 1308 LS
|
3522 1308 MT 3536 1308 LS
|
3948 1308 MT 3962 1308 LS
|
3948 1308 MT 3962 1308 LS
|
4374 1308 MT 4388 1308 LS
|
4374 1308 MT 4388 1308 LS
|
4800 1308 MT 4814 1308 LS
|
4800 1308 MT 4814 1308 LS
|
5226 1308 MT 5240 1308 LS
|
5226 1308 MT 5240 1308 LS
|
5652 1308 MT 5666 1308 LS
|
5652 1308 MT 5666 1308 LS
|
6078 1308 MT 6092 1308 LS
|
6078 1308 MT 6092 1308 LS
|
3103 1418 MT 6298 1418 LS
|
3103 1418 MT 6298 1418 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) 3066 1561 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) 3066 1561 WT TSE RSS
|
3522 1452 MT 3536 1452 LS
|
3522 1452 MT 3536 1452 LS
|
3948 1452 MT 3962 1452 LS
|
3948 1452 MT 3962 1452 LS
|
4374 1452 MT 4388 1452 LS
|
4374 1452 MT 4388 1452 LS
|
4800 1452 MT 4814 1452 LS
|
4800 1452 MT 4814 1452 LS
|
5226 1452 MT 5240 1452 LS
|
5226 1452 MT 5240 1452 LS
|
5652 1452 MT 5666 1452 LS
|
5652 1452 MT 5666 1452 LS
|
6078 1452 MT 6092 1452 LS
|
6078 1452 MT 6092 1452 LS
|
3103 1481 MT 3103 1481 LT 6298 1481 LT ST
|
3103 1481 MT 3103 1481 LT 6298 1481 LT ST
|
3103 1562 MT 3103 1562 LT 6298 1562 LT ST
|
3103 1562 MT 3103 1562 LT 6298 1562 LT ST
|
(00000000) 3117 1522 WT pop 0 originOffset 37 add RSS
|
(00000000) 3117 1522 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) 3066 1705 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) 3066 1705 WT TSE RSS
|
3522 1596 MT 3536 1596 LS
|
3522 1596 MT 3536 1596 LS
|
3948 1596 MT 3962 1596 LS
|
3948 1596 MT 3962 1596 LS
|
4374 1596 MT 4388 1596 LS
|
4374 1596 MT 4388 1596 LS
|
4800 1596 MT 4814 1596 LS
|
4800 1596 MT 4814 1596 LS
|
5226 1596 MT 5240 1596 LS
|
5226 1596 MT 5240 1596 LS
|
5652 1596 MT 5666 1596 LS
|
5652 1596 MT 5666 1596 LS
|
6078 1596 MT 6092 1596 LS
|
6078 1596 MT 6092 1596 LS
|
3103 1625 MT 3103 1625 LT 6298 1625 LT ST
|
3103 1625 MT 3103 1625 LT 6298 1625 LT ST
|
3103 1706 MT 3103 1706 LT 6298 1706 LT ST
|
3103 1706 MT 3103 1706 LT 6298 1706 LT ST
|
(0) 3117 1666 WT pop 0 originOffset 37 add RSS
|
(0) 3117 1666 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) 3066 1849 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) 3066 1849 WT TSE RSS
|
3522 1740 MT 3536 1740 LS
|
3522 1740 MT 3536 1740 LS
|
3948 1740 MT 3962 1740 LS
|
3948 1740 MT 3962 1740 LS
|
4374 1740 MT 4388 1740 LS
|
4374 1740 MT 4388 1740 LS
|
4800 1740 MT 4814 1740 LS
|
4800 1740 MT 4814 1740 LS
|
5226 1740 MT 5240 1740 LS
|
5226 1740 MT 5240 1740 LS
|
5652 1740 MT 5666 1740 LS
|
5652 1740 MT 5666 1740 LS
|
6078 1740 MT 6092 1740 LS
|
6078 1740 MT 6092 1740 LS
|
3103 1769 MT 3103 1769 LT 6298 1769 LT ST
|
3103 1769 MT 3103 1769 LT 6298 1769 LT ST
|
3103 1850 MT 3103 1850 LT 6298 1850 LT ST
|
3103 1850 MT 3103 1850 LT 6298 1850 LT ST
|
(0) 3117 1810 WT pop 0 originOffset 37 add RSS
|
(0) 3117 1810 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) 3066 1993 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) 3066 1993 WT TSE RSS
|
3522 1884 MT 3536 1884 LS
|
3522 1884 MT 3536 1884 LS
|
3948 1884 MT 3962 1884 LS
|
3948 1884 MT 3962 1884 LS
|
4374 1884 MT 4388 1884 LS
|
4374 1884 MT 4388 1884 LS
|
4800 1884 MT 4814 1884 LS
|
4800 1884 MT 4814 1884 LS
|
5226 1884 MT 5240 1884 LS
|
5226 1884 MT 5240 1884 LS
|
5652 1884 MT 5666 1884 LS
|
5652 1884 MT 5666 1884 LS
|
6078 1884 MT 6092 1884 LS
|
6078 1884 MT 6092 1884 LS
|
3103 1913 MT 3103 1913 LT 6298 1913 LT ST
|
3103 1913 MT 3103 1913 LT 6298 1913 LT ST
|
3103 1994 MT 3103 1994 LT 6298 1994 LT ST
|
3103 1994 MT 3103 1994 LT 6298 1994 LT ST
|
(0) 3117 1954 WT pop 0 originOffset 37 add RSS
|
(0) 3117 1954 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) 3066 2137 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) 3066 2137 WT TSE RSS
|
3522 2028 MT 3536 2028 LS
|
3522 2028 MT 3536 2028 LS
|
3948 2028 MT 3962 2028 LS
|
3948 2028 MT 3962 2028 LS
|
4374 2028 MT 4388 2028 LS
|
4374 2028 MT 4388 2028 LS
|
4800 2028 MT 4814 2028 LS
|
4800 2028 MT 4814 2028 LS
|
5226 2028 MT 5240 2028 LS
|
5226 2028 MT 5240 2028 LS
|
5652 2028 MT 5666 2028 LS
|
5652 2028 MT 5666 2028 LS
|
6078 2028 MT 6092 2028 LS
|
6078 2028 MT 6092 2028 LS
|
3103 2138 MT 6298 2138 LS
|
3103 2138 MT 6298 2138 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) 3066 2281 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) 3066 2281 WT TSE RSS
|
3522 2172 MT 3536 2172 LS
|
3522 2172 MT 3536 2172 LS
|
3948 2172 MT 3962 2172 LS
|
3948 2172 MT 3962 2172 LS
|
4374 2172 MT 4388 2172 LS
|
4374 2172 MT 4388 2172 LS
|
4800 2172 MT 4814 2172 LS
|
4800 2172 MT 4814 2172 LS
|
5226 2172 MT 5240 2172 LS
|
5226 2172 MT 5240 2172 LS
|
5652 2172 MT 5666 2172 LS
|
5652 2172 MT 5666 2172 LS
|
6078 2172 MT 6092 2172 LS
|
6078 2172 MT 6092 2172 LS
|
3103 2201 MT 3103 2201 LT 6298 2201 LT ST
|
3103 2201 MT 3103 2201 LT 6298 2201 LT ST
|
3103 2282 MT 3103 2282 LT 6298 2282 LT ST
|
3103 2282 MT 3103 2282 LT 6298 2282 LT ST
|
(0) 3117 2242 WT pop 0 originOffset 37 add RSS
|
(0) 3117 2242 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) 3066 2425 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) 3066 2425 WT TSE RSS
|
3522 2316 MT 3536 2316 LS
|
3522 2316 MT 3536 2316 LS
|
3948 2316 MT 3962 2316 LS
|
3948 2316 MT 3962 2316 LS
|
4374 2316 MT 4388 2316 LS
|
4374 2316 MT 4388 2316 LS
|
4800 2316 MT 4814 2316 LS
|
4800 2316 MT 4814 2316 LS
|
5226 2316 MT 5240 2316 LS
|
5226 2316 MT 5240 2316 LS
|
5652 2316 MT 5666 2316 LS
|
5652 2316 MT 5666 2316 LS
|
6078 2316 MT 6092 2316 LS
|
6078 2316 MT 6092 2316 LS
|
3103 2345 MT 3103 2345 LT 6298 2345 LT ST
|
3103 2345 MT 3103 2345 LT 6298 2345 LT ST
|
3103 2426 MT 3103 2426 LT 6298 2426 LT ST
|
3103 2426 MT 3103 2426 LT 6298 2426 LT ST
|
(01) 3117 2386 WT pop 0 originOffset 37 add RSS
|
(01) 3117 2386 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) 3066 2569 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) 3066 2569 WT TSE RSS
|
3522 2460 MT 3536 2460 LS
|
3522 2460 MT 3536 2460 LS
|
3948 2460 MT 3962 2460 LS
|
3948 2460 MT 3962 2460 LS
|
4374 2460 MT 4388 2460 LS
|
4374 2460 MT 4388 2460 LS
|
4800 2460 MT 4814 2460 LS
|
4800 2460 MT 4814 2460 LS
|
5226 2460 MT 5240 2460 LS
|
5226 2460 MT 5240 2460 LS
|
5652 2460 MT 5666 2460 LS
|
5652 2460 MT 5666 2460 LS
|
6078 2460 MT 6092 2460 LS
|
6078 2460 MT 6092 2460 LS
|
3103 2489 MT 3103 2489 LT 6298 2489 LT ST
|
3103 2489 MT 3103 2489 LT 6298 2489 LT ST
|
3103 2570 MT 3103 2570 LT 6298 2570 LT ST
|
3103 2570 MT 3103 2570 LT 6298 2570 LT ST
|
(00) 3117 2530 WT pop 0 originOffset 37 add RSS
|
(00) 3117 2530 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) 3066 2713 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) 3066 2713 WT TSE RSS
|
3522 2604 MT 3536 2604 LS
|
3522 2604 MT 3536 2604 LS
|
3948 2604 MT 3962 2604 LS
|
3948 2604 MT 3962 2604 LS
|
4374 2604 MT 4388 2604 LS
|
4374 2604 MT 4388 2604 LS
|
4800 2604 MT 4814 2604 LS
|
4800 2604 MT 4814 2604 LS
|
5226 2604 MT 5240 2604 LS
|
5226 2604 MT 5240 2604 LS
|
5652 2604 MT 5666 2604 LS
|
5652 2604 MT 5666 2604 LS
|
6078 2604 MT 6092 2604 LS
|
6078 2604 MT 6092 2604 LS
|
3103 2633 MT 3103 2633 LT 6298 2633 LT ST
|
3103 2633 MT 3103 2633 LT 6298 2633 LT ST
|
3103 2714 MT 3103 2714 LT 6298 2714 LT ST
|
3103 2714 MT 3103 2714 LT 6298 2714 LT ST
|
(03) 3117 2674 WT pop 0 originOffset 37 add RSS
|
(03) 3117 2674 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) 3066 2857 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) 3066 2857 WT TSE RSS
|
3522 2748 MT 3536 2748 LS
|
3522 2748 MT 3536 2748 LS
|
3948 2748 MT 3962 2748 LS
|
3948 2748 MT 3962 2748 LS
|
4374 2748 MT 4388 2748 LS
|
4374 2748 MT 4388 2748 LS
|
4800 2748 MT 4814 2748 LS
|
4800 2748 MT 4814 2748 LS
|
5226 2748 MT 5240 2748 LS
|
5226 2748 MT 5240 2748 LS
|
5652 2748 MT 5666 2748 LS
|
5652 2748 MT 5666 2748 LS
|
6078 2748 MT 6092 2748 LS
|
6078 2748 MT 6092 2748 LS
|
3103 2858 MT 6298 2858 LS
|
3103 2858 MT 6298 2858 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) 3066 3001 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) 3066 3001 WT TSE RSS
|
3522 2892 MT 3536 2892 LS
|
3522 2892 MT 3536 2892 LS
|
3948 2892 MT 3962 2892 LS
|
3948 2892 MT 3962 2892 LS
|
4374 2892 MT 4388 2892 LS
|
4374 2892 MT 4388 2892 LS
|
4800 2892 MT 4814 2892 LS
|
4800 2892 MT 4814 2892 LS
|
5226 2892 MT 5240 2892 LS
|
5226 2892 MT 5240 2892 LS
|
5652 2892 MT 5666 2892 LS
|
5652 2892 MT 5666 2892 LS
|
6078 2892 MT 6092 2892 LS
|
6078 2892 MT 6092 2892 LS
|
3103 3002 MT 6298 3002 LS
|
3103 3002 MT 6298 3002 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) 3066 3145 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) 3066 3145 WT TSE RSS
|
3522 3036 MT 3536 3036 LS
|
3522 3036 MT 3536 3036 LS
|
3948 3036 MT 3962 3036 LS
|
3948 3036 MT 3962 3036 LS
|
4374 3036 MT 4388 3036 LS
|
4374 3036 MT 4388 3036 LS
|
4800 3036 MT 4814 3036 LS
|
4800 3036 MT 4814 3036 LS
|
5226 3036 MT 5240 3036 LS
|
5226 3036 MT 5240 3036 LS
|
5652 3036 MT 5666 3036 LS
|
5652 3036 MT 5666 3036 LS
|
6078 3036 MT 6092 3036 LS
|
6078 3036 MT 6092 3036 LS
|
3103 3146 MT 6298 3146 LS
|
3103 3146 MT 6298 3146 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) 3066 3289 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) 3066 3289 WT TSE RSS
|
3522 3180 MT 3536 3180 LS
|
3522 3180 MT 3536 3180 LS
|
3948 3180 MT 3962 3180 LS
|
3948 3180 MT 3962 3180 LS
|
4374 3180 MT 4388 3180 LS
|
4374 3180 MT 4388 3180 LS
|
4800 3180 MT 4814 3180 LS
|
4800 3180 MT 4814 3180 LS
|
5226 3180 MT 5240 3180 LS
|
5226 3180 MT 5240 3180 LS
|
5652 3180 MT 5666 3180 LS
|
5652 3180 MT 5666 3180 LS
|
6078 3180 MT 6092 3180 LS
|
6078 3180 MT 6092 3180 LS
|
3103 3209 MT 3103 3209 LT 6298 3209 LT ST
|
3103 3209 MT 3103 3209 LT 6298 3209 LT ST
|
3103 3290 MT 3103 3290 LT 6298 3290 LT ST
|
3103 3290 MT 3103 3290 LT 6298 3290 LT ST
|
(0) 3117 3250 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3250 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) 3066 3433 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) 3066 3433 WT TSE RSS
|
3522 3324 MT 3536 3324 LS
|
3522 3324 MT 3536 3324 LS
|
3948 3324 MT 3962 3324 LS
|
3948 3324 MT 3962 3324 LS
|
4374 3324 MT 4388 3324 LS
|
4374 3324 MT 4388 3324 LS
|
4800 3324 MT 4814 3324 LS
|
4800 3324 MT 4814 3324 LS
|
5226 3324 MT 5240 3324 LS
|
5226 3324 MT 5240 3324 LS
|
5652 3324 MT 5666 3324 LS
|
5652 3324 MT 5666 3324 LS
|
6078 3324 MT 6092 3324 LS
|
6078 3324 MT 6092 3324 LS
|
3103 3434 MT 6298 3434 LS
|
3103 3434 MT 6298 3434 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) 3066 3577 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) 3066 3577 WT TSE RSS
|
3522 3468 MT 3536 3468 LS
|
3522 3468 MT 3536 3468 LS
|
3948 3468 MT 3962 3468 LS
|
3948 3468 MT 3962 3468 LS
|
4374 3468 MT 4388 3468 LS
|
4374 3468 MT 4388 3468 LS
|
4800 3468 MT 4814 3468 LS
|
4800 3468 MT 4814 3468 LS
|
5226 3468 MT 5240 3468 LS
|
5226 3468 MT 5240 3468 LS
|
5652 3468 MT 5666 3468 LS
|
5652 3468 MT 5666 3468 LS
|
6078 3468 MT 6092 3468 LS
|
6078 3468 MT 6092 3468 LS
|
3103 3497 MT 3103 3497 LT 6298 3497 LT ST
|
3103 3497 MT 3103 3497 LT 6298 3497 LT ST
|
3103 3578 MT 3103 3578 LT 6298 3578 LT ST
|
3103 3578 MT 3103 3578 LT 6298 3578 LT ST
|
(0) 3117 3538 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3538 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) 3066 3721 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) 3066 3721 WT TSE RSS
|
3522 3612 MT 3536 3612 LS
|
3522 3612 MT 3536 3612 LS
|
3948 3612 MT 3962 3612 LS
|
3948 3612 MT 3962 3612 LS
|
4374 3612 MT 4388 3612 LS
|
4374 3612 MT 4388 3612 LS
|
4800 3612 MT 4814 3612 LS
|
4800 3612 MT 4814 3612 LS
|
5226 3612 MT 5240 3612 LS
|
5226 3612 MT 5240 3612 LS
|
5652 3612 MT 5666 3612 LS
|
5652 3612 MT 5666 3612 LS
|
6078 3612 MT 6092 3612 LS
|
6078 3612 MT 6092 3612 LS
|
3103 3641 MT 3103 3641 LT 6298 3641 LT ST
|
3103 3641 MT 3103 3641 LT 6298 3641 LT ST
|
3103 3722 MT 3103 3722 LT 6298 3722 LT ST
|
3103 3722 MT 3103 3722 LT 6298 3722 LT ST
|
(0) 3117 3682 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3682 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) 3066 3865 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) 3066 3865 WT TSE RSS
|
3522 3756 MT 3536 3756 LS
|
3522 3756 MT 3536 3756 LS
|
3948 3756 MT 3962 3756 LS
|
3948 3756 MT 3962 3756 LS
|
4374 3756 MT 4388 3756 LS
|
4374 3756 MT 4388 3756 LS
|
4800 3756 MT 4814 3756 LS
|
4800 3756 MT 4814 3756 LS
|
5226 3756 MT 5240 3756 LS
|
5226 3756 MT 5240 3756 LS
|
5652 3756 MT 5666 3756 LS
|
5652 3756 MT 5666 3756 LS
|
6078 3756 MT 6092 3756 LS
|
6078 3756 MT 6092 3756 LS
|
3103 3866 MT 6298 3866 LS
|
3103 3866 MT 6298 3866 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) 3066 4009 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) 3066 4009 WT TSE RSS
|
3522 3900 MT 3536 3900 LS
|
3522 3900 MT 3536 3900 LS
|
3948 3900 MT 3962 3900 LS
|
3948 3900 MT 3962 3900 LS
|
4374 3900 MT 4388 3900 LS
|
4374 3900 MT 4388 3900 LS
|
4800 3900 MT 4814 3900 LS
|
4800 3900 MT 4814 3900 LS
|
5226 3900 MT 5240 3900 LS
|
5226 3900 MT 5240 3900 LS
|
5652 3900 MT 5666 3900 LS
|
5652 3900 MT 5666 3900 LS
|
6078 3900 MT 6092 3900 LS
|
6078 3900 MT 6092 3900 LS
|
3103 3929 MT 3103 3929 LT 6298 3929 LT ST
|
3103 3929 MT 3103 3929 LT 6298 3929 LT ST
|
3103 4010 MT 3103 4010 LT 6298 4010 LT ST
|
3103 4010 MT 3103 4010 LT 6298 4010 LT ST
|
(0) 3117 3970 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3970 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) 3066 4153 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) 3066 4153 WT TSE RSS
|
3522 4044 MT 3536 4044 LS
|
3522 4044 MT 3536 4044 LS
|
3948 4044 MT 3962 4044 LS
|
3948 4044 MT 3962 4044 LS
|
4374 4044 MT 4388 4044 LS
|
4374 4044 MT 4388 4044 LS
|
4800 4044 MT 4814 4044 LS
|
4800 4044 MT 4814 4044 LS
|
5226 4044 MT 5240 4044 LS
|
5226 4044 MT 5240 4044 LS
|
5652 4044 MT 5666 4044 LS
|
5652 4044 MT 5666 4044 LS
|
6078 4044 MT 6092 4044 LS
|
6078 4044 MT 6092 4044 LS
|
3103 4154 MT 6298 4154 LS
|
3103 4154 MT 6298 4154 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) 3066 4297 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) 3066 4297 WT TSE RSS
|
3522 4188 MT 3536 4188 LS
|
3522 4188 MT 3536 4188 LS
|
3948 4188 MT 3962 4188 LS
|
3948 4188 MT 3962 4188 LS
|
4374 4188 MT 4388 4188 LS
|
4374 4188 MT 4388 4188 LS
|
4800 4188 MT 4814 4188 LS
|
4800 4188 MT 4814 4188 LS
|
5226 4188 MT 5240 4188 LS
|
5226 4188 MT 5240 4188 LS
|
5652 4188 MT 5666 4188 LS
|
5652 4188 MT 5666 4188 LS
|
6078 4188 MT 6092 4188 LS
|
6078 4188 MT 6092 4188 LS
|
3103 4258 MT 6298 4258 LS
|
3103 4258 MT 6298 4258 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) 3066 4441 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) 3066 4441 WT TSE RSS
|
3522 4332 MT 3536 4332 LS
|
3522 4332 MT 3536 4332 LS
|
3948 4332 MT 3962 4332 LS
|
3948 4332 MT 3962 4332 LS
|
4374 4332 MT 4388 4332 LS
|
4374 4332 MT 4388 4332 LS
|
4800 4332 MT 4814 4332 LS
|
4800 4332 MT 4814 4332 LS
|
5226 4332 MT 5240 4332 LS
|
5226 4332 MT 5240 4332 LS
|
5652 4332 MT 5666 4332 LS
|
5652 4332 MT 5666 4332 LS
|
6078 4332 MT 6092 4332 LS
|
6078 4332 MT 6092 4332 LS
|
3103 4361 MT 3103 4361 LT 6298 4361 LT ST
|
3103 4361 MT 3103 4361 LT 6298 4361 LT ST
|
3103 4442 MT 3103 4442 LT 6298 4442 LT ST
|
3103 4442 MT 3103 4442 LT 6298 4442 LT ST
|
(00000000) 3117 4402 WT pop 0 originOffset 37 add RSS
|
(00000000) 3117 4402 WT pop 0 originOffset 37 add RSS
|
% draw footer
|
% draw footer
|
(Entity:tb_or1200_cpu Architecture: Date: Sat Aug 14 00:33:37 EDT 2004 Row: 3 Page: 5) 300 4799 WT TSW RSS
|
(Entity:tb_or1200_cpu Architecture: Date: Sat Aug 14 00:33:37 EDT 2004 Row: 3 Page: 5) 300 4799 WT TSW RSS
|
grestore
|
grestore
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showpage
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showpage
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%%Page: 6 6
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%%Page: 6 6
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gsave
|
gsave
|
90 rotate 0.12 dup neg scale
|
90 rotate 0.12 dup neg scale
|
% dump string table
|
% dump string table
|
/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
|
/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
|
/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
|
/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
|
/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
|
/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
|
/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
|
/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
|
/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
|
/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
|
/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
|
/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
|
/ARC {5 -2 roll SX 5 2 roll arc} def
|
/ARC {5 -2 roll SX 5 2 roll arc} def
|
/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3103 def/REdge 5699 def/LabelWidth 3066 def
|
/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3103 def/REdge 5699 def/LabelWidth 3066 def
|
/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
|
/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
|
/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
|
/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/alu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/alu_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_addrofs) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_taken) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_taken) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/clk) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/clk) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/comp_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/comp_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_limm) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_limm) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/du_hwbkpt) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/du_hwbkpt) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_freeze) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_freeze) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_insn) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_insn) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_macrc_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_macrc_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_void) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_void) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/except_illegal) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/except_illegal) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) MLW
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(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) MLW
|
% draw waveform shading
|
% draw waveform shading
|
[] 0 SD
|
[] 0 SD
|
2.995 setlinewidth
|
2.995 setlinewidth
|
0 setlinejoin
|
0 setlinejoin
|
0 setlinecap
|
0 setlinecap
|
0 0 0 CL
|
0 0 0 CL
|
3103 329 MT 3103 329 LT 6298 329 LT ST
|
3103 329 MT 3103 329 LT 6298 329 LT ST
|
3103 410 MT 3103 410 LT 6298 410 LT ST
|
3103 410 MT 3103 410 LT 6298 410 LT ST
|
(1800) 3117 370 WT pop 0 originOffset 37 add RSS
|
(1800) 3117 370 WT pop 0 originOffset 37 add RSS
|
3103 473 MT 3103 473 LT 3309 473 LT 3316 514 LT ST
|
3103 473 MT 3103 473 LT 3309 473 LT 3316 514 LT ST
|
3103 554 MT 3103 554 LT 3309 554 LT 3316 514 LT ST
|
3103 554 MT 3103 554 LT 3309 554 LT 3316 514 LT ST
|
(4) 3117 514 WT pop 0 originOffset 37 add RSS
|
(4) 3117 514 WT pop 0 originOffset 37 add RSS
|
3316 514 MT 3316 514 LT 3323 473 LT 3735 473 LT 3742 514 LT ST
|
3316 514 MT 3316 514 LT 3323 473 LT 3735 473 LT 3742 514 LT ST
|
3316 514 MT 3316 514 LT 3323 554 LT 3735 554 LT 3742 514 LT ST
|
3316 514 MT 3316 514 LT 3323 554 LT 3735 554 LT 3742 514 LT ST
|
(5) 3330 514 WT pop 0 originOffset 37 add RSS
|
(5) 3330 514 WT pop 0 originOffset 37 add RSS
|
3742 514 MT 3742 514 LT 3749 473 LT 4161 473 LT 4168 514 LT ST
|
3742 514 MT 3742 514 LT 3749 473 LT 4161 473 LT 4168 514 LT ST
|
3742 514 MT 3742 514 LT 3749 554 LT 4161 554 LT 4168 514 LT ST
|
3742 514 MT 3742 514 LT 3749 554 LT 4161 554 LT 4168 514 LT ST
|
(6) 3756 514 WT pop 0 originOffset 37 add RSS
|
(6) 3756 514 WT pop 0 originOffset 37 add RSS
|
4168 514 MT 4168 514 LT 4175 473 LT 4587 473 LT 4594 514 LT ST
|
4168 514 MT 4168 514 LT 4175 473 LT 4587 473 LT 4594 514 LT ST
|
4168 514 MT 4168 514 LT 4175 554 LT 4587 554 LT 4594 514 LT ST
|
4168 514 MT 4168 514 LT 4175 554 LT 4587 554 LT 4594 514 LT ST
|
(7) 4182 514 WT pop 0 originOffset 37 add RSS
|
(7) 4182 514 WT pop 0 originOffset 37 add RSS
|
4594 514 MT 4594 514 LT 4601 473 LT 5013 473 LT 5020 514 LT ST
|
4594 514 MT 4594 514 LT 4601 473 LT 5013 473 LT 5020 514 LT ST
|
4594 514 MT 4594 514 LT 4601 554 LT 5013 554 LT 5020 514 LT ST
|
4594 514 MT 4594 514 LT 4601 554 LT 5013 554 LT 5020 514 LT ST
|
(0) 4608 514 WT pop 0 originOffset 37 add RSS
|
(0) 4608 514 WT pop 0 originOffset 37 add RSS
|
5020 514 MT 5020 514 LT 5027 473 LT 5439 473 LT 5446 514 LT ST
|
5020 514 MT 5020 514 LT 5027 473 LT 5439 473 LT 5446 514 LT ST
|
5020 514 MT 5020 514 LT 5027 554 LT 5439 554 LT 5446 514 LT ST
|
5020 514 MT 5020 514 LT 5027 554 LT 5439 554 LT 5446 514 LT ST
|
(1) 5034 514 WT pop 0 originOffset 37 add RSS
|
(1) 5034 514 WT pop 0 originOffset 37 add RSS
|
5446 514 MT 5446 514 LT 5453 473 LT 5865 473 LT 5872 514 LT ST
|
5446 514 MT 5446 514 LT 5453 473 LT 5865 473 LT 5872 514 LT ST
|
5446 514 MT 5446 514 LT 5453 554 LT 5865 554 LT 5872 514 LT ST
|
5446 514 MT 5446 514 LT 5453 554 LT 5865 554 LT 5872 514 LT ST
|
(2) 5460 514 WT pop 0 originOffset 37 add RSS
|
(2) 5460 514 WT pop 0 originOffset 37 add RSS
|
5872 514 MT 5872 514 LT 5879 473 LT 6298 473 LT ST
|
5872 514 MT 5872 514 LT 5879 473 LT 6298 473 LT ST
|
5872 514 MT 5872 514 LT 5879 554 LT 6298 554 LT ST
|
5872 514 MT 5872 514 LT 5879 554 LT 6298 554 LT ST
|
(3) 5886 514 WT pop 0 originOffset 37 add RSS
|
(3) 5886 514 WT pop 0 originOffset 37 add RSS
|
3103 617 MT 3103 617 LT 3309 617 LT 3316 658 LT ST
|
3103 617 MT 3103 617 LT 3309 617 LT 3316 658 LT ST
|
3103 698 MT 3103 698 LT 3309 698 LT 3316 658 LT ST
|
3103 698 MT 3103 698 LT 3309 698 LT 3316 658 LT ST
|
(3) 3117 658 WT pop 0 originOffset 37 add RSS
|
(3) 3117 658 WT pop 0 originOffset 37 add RSS
|
3316 658 MT 3316 658 LT 3323 617 LT 3735 617 LT 3742 658 LT ST
|
3316 658 MT 3316 658 LT 3323 617 LT 3735 617 LT 3742 658 LT ST
|
3316 658 MT 3316 658 LT 3323 698 LT 3735 698 LT 3742 658 LT ST
|
3316 658 MT 3316 658 LT 3323 698 LT 3735 698 LT 3742 658 LT ST
|
(4) 3330 658 WT pop 0 originOffset 37 add RSS
|
(4) 3330 658 WT pop 0 originOffset 37 add RSS
|
3742 658 MT 3742 658 LT 3749 617 LT 4161 617 LT 4168 658 LT ST
|
3742 658 MT 3742 658 LT 3749 617 LT 4161 617 LT 4168 658 LT ST
|
3742 658 MT 3742 658 LT 3749 698 LT 4161 698 LT 4168 658 LT ST
|
3742 658 MT 3742 658 LT 3749 698 LT 4161 698 LT 4168 658 LT ST
|
(5) 3756 658 WT pop 0 originOffset 37 add RSS
|
(5) 3756 658 WT pop 0 originOffset 37 add RSS
|
4168 658 MT 4168 658 LT 4175 617 LT 4587 617 LT 4594 658 LT ST
|
4168 658 MT 4168 658 LT 4175 617 LT 4587 617 LT 4594 658 LT ST
|
4168 658 MT 4168 658 LT 4175 698 LT 4587 698 LT 4594 658 LT ST
|
4168 658 MT 4168 658 LT 4175 698 LT 4587 698 LT 4594 658 LT ST
|
(6) 4182 658 WT pop 0 originOffset 37 add RSS
|
(6) 4182 658 WT pop 0 originOffset 37 add RSS
|
4594 658 MT 4594 658 LT 4601 617 LT 5013 617 LT 5020 658 LT ST
|
4594 658 MT 4594 658 LT 4601 617 LT 5013 617 LT 5020 658 LT ST
|
4594 658 MT 4594 658 LT 4601 698 LT 5013 698 LT 5020 658 LT ST
|
4594 658 MT 4594 658 LT 4601 698 LT 5013 698 LT 5020 658 LT ST
|
(7) 4608 658 WT pop 0 originOffset 37 add RSS
|
(7) 4608 658 WT pop 0 originOffset 37 add RSS
|
5020 658 MT 5020 658 LT 5027 617 LT 5439 617 LT 5446 658 LT ST
|
5020 658 MT 5020 658 LT 5027 617 LT 5439 617 LT 5446 658 LT ST
|
5020 658 MT 5020 658 LT 5027 698 LT 5439 698 LT 5446 658 LT ST
|
5020 658 MT 5020 658 LT 5027 698 LT 5439 698 LT 5446 658 LT ST
|
(0) 5034 658 WT pop 0 originOffset 37 add RSS
|
(0) 5034 658 WT pop 0 originOffset 37 add RSS
|
5446 658 MT 5446 658 LT 5453 617 LT 5865 617 LT 5872 658 LT ST
|
5446 658 MT 5446 658 LT 5453 617 LT 5865 617 LT 5872 658 LT ST
|
5446 658 MT 5446 658 LT 5453 698 LT 5865 698 LT 5872 658 LT ST
|
5446 658 MT 5446 658 LT 5453 698 LT 5865 698 LT 5872 658 LT ST
|
(1) 5460 658 WT pop 0 originOffset 37 add RSS
|
(1) 5460 658 WT pop 0 originOffset 37 add RSS
|
5872 658 MT 5872 658 LT 5879 617 LT 6298 617 LT ST
|
5872 658 MT 5872 658 LT 5879 617 LT 6298 617 LT ST
|
5872 658 MT 5872 658 LT 5879 698 LT 6298 698 LT ST
|
5872 658 MT 5872 658 LT 5879 698 LT 6298 698 LT ST
|
(2) 5886 658 WT pop 0 originOffset 37 add RSS
|
(2) 5886 658 WT pop 0 originOffset 37 add RSS
|
3103 842 MT 6298 842 LS
|
3103 842 MT 6298 842 LS
|
3103 905 MT 3103 905 LT 6298 905 LT ST
|
3103 905 MT 3103 905 LT 6298 905 LT ST
|
3103 986 MT 3103 986 LT 6298 986 LT ST
|
3103 986 MT 3103 986 LT 6298 986 LT ST
|
(14610000) 3117 946 WT pop 0 originOffset 37 add RSS
|
(14610000) 3117 946 WT pop 0 originOffset 37 add RSS
|
3103 1049 MT 3103 1049 LT 6298 1049 LT ST
|
3103 1049 MT 3103 1049 LT 6298 1049 LT ST
|
3103 1130 MT 3103 1130 LT 6298 1130 LT ST
|
3103 1130 MT 3103 1130 LT 6298 1130 LT ST
|
(03) 3117 1090 WT pop 0 originOffset 37 add RSS
|
(03) 3117 1090 WT pop 0 originOffset 37 add RSS
|
3103 1274 MT 6298 1274 LS
|
3103 1274 MT 6298 1274 LS
|
% draw timeline
|
% draw timeline
|
3146 4533 MT 3146 4570 LS
|
3146 4533 MT 3146 4570 LS
|
3188 4533 MT 3188 4570 LS
|
3188 4533 MT 3188 4570 LS
|
3231 4533 MT 3231 4570 LS
|
3231 4533 MT 3231 4570 LS
|
3273 4533 MT 3273 4570 LS
|
3273 4533 MT 3273 4570 LS
|
3316 4533 MT 3316 4570 LS
|
3316 4533 MT 3316 4570 LS
|
3359 4533 MT 3359 4570 LS
|
3359 4533 MT 3359 4570 LS
|
3401 4533 MT 3401 4570 LS
|
3401 4533 MT 3401 4570 LS
|
3444 4533 MT 3444 4570 LS
|
3444 4533 MT 3444 4570 LS
|
3486 4533 MT 3486 4570 LS
|
3486 4533 MT 3486 4570 LS
|
3572 4533 MT 3572 4570 LS
|
3572 4533 MT 3572 4570 LS
|
3614 4533 MT 3614 4570 LS
|
3614 4533 MT 3614 4570 LS
|
3657 4533 MT 3657 4570 LS
|
3657 4533 MT 3657 4570 LS
|
3699 4533 MT 3699 4570 LS
|
3699 4533 MT 3699 4570 LS
|
3742 4533 MT 3742 4570 LS
|
3742 4533 MT 3742 4570 LS
|
3785 4533 MT 3785 4570 LS
|
3785 4533 MT 3785 4570 LS
|
3827 4533 MT 3827 4570 LS
|
3827 4533 MT 3827 4570 LS
|
3870 4533 MT 3870 4570 LS
|
3870 4533 MT 3870 4570 LS
|
3912 4533 MT 3912 4570 LS
|
3912 4533 MT 3912 4570 LS
|
3529 4506 MT 3529 4570 LS
|
3529 4506 MT 3529 4570 LS
|
(160) 3529 4649 WT TS RSS
|
(160) 3529 4649 WT TS RSS
|
3998 4533 MT 3998 4570 LS
|
3998 4533 MT 3998 4570 LS
|
4040 4533 MT 4040 4570 LS
|
4040 4533 MT 4040 4570 LS
|
4083 4533 MT 4083 4570 LS
|
4083 4533 MT 4083 4570 LS
|
4125 4533 MT 4125 4570 LS
|
4125 4533 MT 4125 4570 LS
|
4168 4533 MT 4168 4570 LS
|
4168 4533 MT 4168 4570 LS
|
4211 4533 MT 4211 4570 LS
|
4211 4533 MT 4211 4570 LS
|
4253 4533 MT 4253 4570 LS
|
4253 4533 MT 4253 4570 LS
|
4296 4533 MT 4296 4570 LS
|
4296 4533 MT 4296 4570 LS
|
4338 4533 MT 4338 4570 LS
|
4338 4533 MT 4338 4570 LS
|
3955 4506 MT 3955 4570 LS
|
3955 4506 MT 3955 4570 LS
|
4424 4533 MT 4424 4570 LS
|
4424 4533 MT 4424 4570 LS
|
4466 4533 MT 4466 4570 LS
|
4466 4533 MT 4466 4570 LS
|
4509 4533 MT 4509 4570 LS
|
4509 4533 MT 4509 4570 LS
|
4551 4533 MT 4551 4570 LS
|
4551 4533 MT 4551 4570 LS
|
4594 4533 MT 4594 4570 LS
|
4594 4533 MT 4594 4570 LS
|
4637 4533 MT 4637 4570 LS
|
4637 4533 MT 4637 4570 LS
|
4679 4533 MT 4679 4570 LS
|
4679 4533 MT 4679 4570 LS
|
4722 4533 MT 4722 4570 LS
|
4722 4533 MT 4722 4570 LS
|
4764 4533 MT 4764 4570 LS
|
4764 4533 MT 4764 4570 LS
|
4381 4506 MT 4381 4570 LS
|
4381 4506 MT 4381 4570 LS
|
(180) 4381 4649 WT TS RSS
|
(180) 4381 4649 WT TS RSS
|
4850 4533 MT 4850 4570 LS
|
4850 4533 MT 4850 4570 LS
|
4892 4533 MT 4892 4570 LS
|
4892 4533 MT 4892 4570 LS
|
4935 4533 MT 4935 4570 LS
|
4935 4533 MT 4935 4570 LS
|
4977 4533 MT 4977 4570 LS
|
4977 4533 MT 4977 4570 LS
|
5020 4533 MT 5020 4570 LS
|
5020 4533 MT 5020 4570 LS
|
5063 4533 MT 5063 4570 LS
|
5063 4533 MT 5063 4570 LS
|
5105 4533 MT 5105 4570 LS
|
5105 4533 MT 5105 4570 LS
|
5148 4533 MT 5148 4570 LS
|
5148 4533 MT 5148 4570 LS
|
5190 4533 MT 5190 4570 LS
|
5190 4533 MT 5190 4570 LS
|
4807 4506 MT 4807 4570 LS
|
4807 4506 MT 4807 4570 LS
|
5276 4533 MT 5276 4570 LS
|
5276 4533 MT 5276 4570 LS
|
5318 4533 MT 5318 4570 LS
|
5318 4533 MT 5318 4570 LS
|
5361 4533 MT 5361 4570 LS
|
5361 4533 MT 5361 4570 LS
|
5403 4533 MT 5403 4570 LS
|
5403 4533 MT 5403 4570 LS
|
5446 4533 MT 5446 4570 LS
|
5446 4533 MT 5446 4570 LS
|
5489 4533 MT 5489 4570 LS
|
5489 4533 MT 5489 4570 LS
|
5531 4533 MT 5531 4570 LS
|
5531 4533 MT 5531 4570 LS
|
5574 4533 MT 5574 4570 LS
|
5574 4533 MT 5574 4570 LS
|
5616 4533 MT 5616 4570 LS
|
5616 4533 MT 5616 4570 LS
|
5233 4506 MT 5233 4570 LS
|
5233 4506 MT 5233 4570 LS
|
(200) 5233 4649 WT TS RSS
|
(200) 5233 4649 WT TS RSS
|
5702 4533 MT 5702 4570 LS
|
5702 4533 MT 5702 4570 LS
|
5744 4533 MT 5744 4570 LS
|
5744 4533 MT 5744 4570 LS
|
5787 4533 MT 5787 4570 LS
|
5787 4533 MT 5787 4570 LS
|
5829 4533 MT 5829 4570 LS
|
5829 4533 MT 5829 4570 LS
|
5872 4533 MT 5872 4570 LS
|
5872 4533 MT 5872 4570 LS
|
5915 4533 MT 5915 4570 LS
|
5915 4533 MT 5915 4570 LS
|
5957 4533 MT 5957 4570 LS
|
5957 4533 MT 5957 4570 LS
|
6000 4533 MT 6000 4570 LS
|
6000 4533 MT 6000 4570 LS
|
6042 4533 MT 6042 4570 LS
|
6042 4533 MT 6042 4570 LS
|
5659 4506 MT 5659 4570 LS
|
5659 4506 MT 5659 4570 LS
|
6128 4533 MT 6128 4570 LS
|
6128 4533 MT 6128 4570 LS
|
6170 4533 MT 6170 4570 LS
|
6170 4533 MT 6170 4570 LS
|
6213 4533 MT 6213 4570 LS
|
6213 4533 MT 6213 4570 LS
|
6255 4533 MT 6255 4570 LS
|
6255 4533 MT 6255 4570 LS
|
6298 4533 MT 6298 4570 LS
|
6298 4533 MT 6298 4570 LS
|
6341 4533 MT 6341 4570 LS
|
6341 4533 MT 6341 4570 LS
|
6383 4533 MT 6383 4570 LS
|
6383 4533 MT 6383 4570 LS
|
6426 4533 MT 6426 4570 LS
|
6426 4533 MT 6426 4570 LS
|
6468 4533 MT 6468 4570 LS
|
6468 4533 MT 6468 4570 LS
|
6085 4506 MT 6085 4570 LS
|
6085 4506 MT 6085 4570 LS
|
(220) 6085 4649 WT TS RSS
|
(220) 6085 4649 WT TS RSS
|
% draw grid
|
% draw grid
|
3529 300 MT 3529 4506 LS
|
3529 300 MT 3529 4506 LS
|
3955 300 MT 3955 4506 LS
|
3955 300 MT 3955 4506 LS
|
4381 300 MT 4381 4506 LS
|
4381 300 MT 4381 4506 LS
|
4807 300 MT 4807 4506 LS
|
4807 300 MT 4807 4506 LS
|
5233 300 MT 5233 4506 LS
|
5233 300 MT 5233 4506 LS
|
5659 300 MT 5659 4506 LS
|
5659 300 MT 5659 4506 LS
|
6085 300 MT 6085 4506 LS
|
6085 300 MT 6085 4506 LS
|
% draw waveforms
|
% draw waveforms
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) 3066 409 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) 3066 409 WT TSE RSS
|
3522 300 MT 3536 300 LS
|
3522 300 MT 3536 300 LS
|
3948 300 MT 3962 300 LS
|
3948 300 MT 3962 300 LS
|
4374 300 MT 4388 300 LS
|
4374 300 MT 4388 300 LS
|
4800 300 MT 4814 300 LS
|
4800 300 MT 4814 300 LS
|
5226 300 MT 5240 300 LS
|
5226 300 MT 5240 300 LS
|
5652 300 MT 5666 300 LS
|
5652 300 MT 5666 300 LS
|
6078 300 MT 6092 300 LS
|
6078 300 MT 6092 300 LS
|
3103 329 MT 3103 329 LT 6298 329 LT ST
|
3103 329 MT 3103 329 LT 6298 329 LT ST
|
3103 410 MT 3103 410 LT 6298 410 LT ST
|
3103 410 MT 3103 410 LT 6298 410 LT ST
|
(1800) 3117 370 WT pop 0 originOffset 37 add RSS
|
(1800) 3117 370 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) 3066 553 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) 3066 553 WT TSE RSS
|
3522 444 MT 3536 444 LS
|
3522 444 MT 3536 444 LS
|
3948 444 MT 3962 444 LS
|
3948 444 MT 3962 444 LS
|
4374 444 MT 4388 444 LS
|
4374 444 MT 4388 444 LS
|
4800 444 MT 4814 444 LS
|
4800 444 MT 4814 444 LS
|
5226 444 MT 5240 444 LS
|
5226 444 MT 5240 444 LS
|
5652 444 MT 5666 444 LS
|
5652 444 MT 5666 444 LS
|
6078 444 MT 6092 444 LS
|
6078 444 MT 6092 444 LS
|
3103 473 MT 3103 473 LT 3309 473 LT 3316 514 LT ST
|
3103 473 MT 3103 473 LT 3309 473 LT 3316 514 LT ST
|
3103 554 MT 3103 554 LT 3309 554 LT 3316 514 LT ST
|
3103 554 MT 3103 554 LT 3309 554 LT 3316 514 LT ST
|
(4) 3117 514 WT pop 0 originOffset 37 add RSS
|
(4) 3117 514 WT pop 0 originOffset 37 add RSS
|
3316 514 MT 3316 514 LT 3323 473 LT 3735 473 LT 3742 514 LT ST
|
3316 514 MT 3316 514 LT 3323 473 LT 3735 473 LT 3742 514 LT ST
|
3316 514 MT 3316 514 LT 3323 554 LT 3735 554 LT 3742 514 LT ST
|
3316 514 MT 3316 514 LT 3323 554 LT 3735 554 LT 3742 514 LT ST
|
(5) 3330 514 WT pop 0 originOffset 37 add RSS
|
(5) 3330 514 WT pop 0 originOffset 37 add RSS
|
3742 514 MT 3742 514 LT 3749 473 LT 4161 473 LT 4168 514 LT ST
|
3742 514 MT 3742 514 LT 3749 473 LT 4161 473 LT 4168 514 LT ST
|
3742 514 MT 3742 514 LT 3749 554 LT 4161 554 LT 4168 514 LT ST
|
3742 514 MT 3742 514 LT 3749 554 LT 4161 554 LT 4168 514 LT ST
|
(6) 3756 514 WT pop 0 originOffset 37 add RSS
|
(6) 3756 514 WT pop 0 originOffset 37 add RSS
|
4168 514 MT 4168 514 LT 4175 473 LT 4587 473 LT 4594 514 LT ST
|
4168 514 MT 4168 514 LT 4175 473 LT 4587 473 LT 4594 514 LT ST
|
4168 514 MT 4168 514 LT 4175 554 LT 4587 554 LT 4594 514 LT ST
|
4168 514 MT 4168 514 LT 4175 554 LT 4587 554 LT 4594 514 LT ST
|
(7) 4182 514 WT pop 0 originOffset 37 add RSS
|
(7) 4182 514 WT pop 0 originOffset 37 add RSS
|
4594 514 MT 4594 514 LT 4601 473 LT 5013 473 LT 5020 514 LT ST
|
4594 514 MT 4594 514 LT 4601 473 LT 5013 473 LT 5020 514 LT ST
|
4594 514 MT 4594 514 LT 4601 554 LT 5013 554 LT 5020 514 LT ST
|
4594 514 MT 4594 514 LT 4601 554 LT 5013 554 LT 5020 514 LT ST
|
(0) 4608 514 WT pop 0 originOffset 37 add RSS
|
(0) 4608 514 WT pop 0 originOffset 37 add RSS
|
5020 514 MT 5020 514 LT 5027 473 LT 5439 473 LT 5446 514 LT ST
|
5020 514 MT 5020 514 LT 5027 473 LT 5439 473 LT 5446 514 LT ST
|
5020 514 MT 5020 514 LT 5027 554 LT 5439 554 LT 5446 514 LT ST
|
5020 514 MT 5020 514 LT 5027 554 LT 5439 554 LT 5446 514 LT ST
|
(1) 5034 514 WT pop 0 originOffset 37 add RSS
|
(1) 5034 514 WT pop 0 originOffset 37 add RSS
|
5446 514 MT 5446 514 LT 5453 473 LT 5865 473 LT 5872 514 LT ST
|
5446 514 MT 5446 514 LT 5453 473 LT 5865 473 LT 5872 514 LT ST
|
5446 514 MT 5446 514 LT 5453 554 LT 5865 554 LT 5872 514 LT ST
|
5446 514 MT 5446 514 LT 5453 554 LT 5865 554 LT 5872 514 LT ST
|
(2) 5460 514 WT pop 0 originOffset 37 add RSS
|
(2) 5460 514 WT pop 0 originOffset 37 add RSS
|
5872 514 MT 5872 514 LT 5879 473 LT 6298 473 LT ST
|
5872 514 MT 5872 514 LT 5879 473 LT 6298 473 LT ST
|
5872 514 MT 5872 514 LT 5879 554 LT 6298 554 LT ST
|
5872 514 MT 5872 514 LT 5879 554 LT 6298 554 LT ST
|
(3) 5886 514 WT pop 0 originOffset 37 add RSS
|
(3) 5886 514 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) 3066 697 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) 3066 697 WT TSE RSS
|
3522 588 MT 3536 588 LS
|
3522 588 MT 3536 588 LS
|
3948 588 MT 3962 588 LS
|
3948 588 MT 3962 588 LS
|
4374 588 MT 4388 588 LS
|
4374 588 MT 4388 588 LS
|
4800 588 MT 4814 588 LS
|
4800 588 MT 4814 588 LS
|
5226 588 MT 5240 588 LS
|
5226 588 MT 5240 588 LS
|
5652 588 MT 5666 588 LS
|
5652 588 MT 5666 588 LS
|
6078 588 MT 6092 588 LS
|
6078 588 MT 6092 588 LS
|
3103 617 MT 3103 617 LT 3309 617 LT 3316 658 LT ST
|
3103 617 MT 3103 617 LT 3309 617 LT 3316 658 LT ST
|
3103 698 MT 3103 698 LT 3309 698 LT 3316 658 LT ST
|
3103 698 MT 3103 698 LT 3309 698 LT 3316 658 LT ST
|
(3) 3117 658 WT pop 0 originOffset 37 add RSS
|
(3) 3117 658 WT pop 0 originOffset 37 add RSS
|
3316 658 MT 3316 658 LT 3323 617 LT 3735 617 LT 3742 658 LT ST
|
3316 658 MT 3316 658 LT 3323 617 LT 3735 617 LT 3742 658 LT ST
|
3316 658 MT 3316 658 LT 3323 698 LT 3735 698 LT 3742 658 LT ST
|
3316 658 MT 3316 658 LT 3323 698 LT 3735 698 LT 3742 658 LT ST
|
(4) 3330 658 WT pop 0 originOffset 37 add RSS
|
(4) 3330 658 WT pop 0 originOffset 37 add RSS
|
3742 658 MT 3742 658 LT 3749 617 LT 4161 617 LT 4168 658 LT ST
|
3742 658 MT 3742 658 LT 3749 617 LT 4161 617 LT 4168 658 LT ST
|
3742 658 MT 3742 658 LT 3749 698 LT 4161 698 LT 4168 658 LT ST
|
3742 658 MT 3742 658 LT 3749 698 LT 4161 698 LT 4168 658 LT ST
|
(5) 3756 658 WT pop 0 originOffset 37 add RSS
|
(5) 3756 658 WT pop 0 originOffset 37 add RSS
|
4168 658 MT 4168 658 LT 4175 617 LT 4587 617 LT 4594 658 LT ST
|
4168 658 MT 4168 658 LT 4175 617 LT 4587 617 LT 4594 658 LT ST
|
4168 658 MT 4168 658 LT 4175 698 LT 4587 698 LT 4594 658 LT ST
|
4168 658 MT 4168 658 LT 4175 698 LT 4587 698 LT 4594 658 LT ST
|
(6) 4182 658 WT pop 0 originOffset 37 add RSS
|
(6) 4182 658 WT pop 0 originOffset 37 add RSS
|
4594 658 MT 4594 658 LT 4601 617 LT 5013 617 LT 5020 658 LT ST
|
4594 658 MT 4594 658 LT 4601 617 LT 5013 617 LT 5020 658 LT ST
|
4594 658 MT 4594 658 LT 4601 698 LT 5013 698 LT 5020 658 LT ST
|
4594 658 MT 4594 658 LT 4601 698 LT 5013 698 LT 5020 658 LT ST
|
(7) 4608 658 WT pop 0 originOffset 37 add RSS
|
(7) 4608 658 WT pop 0 originOffset 37 add RSS
|
5020 658 MT 5020 658 LT 5027 617 LT 5439 617 LT 5446 658 LT ST
|
5020 658 MT 5020 658 LT 5027 617 LT 5439 617 LT 5446 658 LT ST
|
5020 658 MT 5020 658 LT 5027 698 LT 5439 698 LT 5446 658 LT ST
|
5020 658 MT 5020 658 LT 5027 698 LT 5439 698 LT 5446 658 LT ST
|
(0) 5034 658 WT pop 0 originOffset 37 add RSS
|
(0) 5034 658 WT pop 0 originOffset 37 add RSS
|
5446 658 MT 5446 658 LT 5453 617 LT 5865 617 LT 5872 658 LT ST
|
5446 658 MT 5446 658 LT 5453 617 LT 5865 617 LT 5872 658 LT ST
|
5446 658 MT 5446 658 LT 5453 698 LT 5865 698 LT 5872 658 LT ST
|
5446 658 MT 5446 658 LT 5453 698 LT 5865 698 LT 5872 658 LT ST
|
(1) 5460 658 WT pop 0 originOffset 37 add RSS
|
(1) 5460 658 WT pop 0 originOffset 37 add RSS
|
5872 658 MT 5872 658 LT 5879 617 LT 6298 617 LT ST
|
5872 658 MT 5872 658 LT 5879 617 LT 6298 617 LT ST
|
5872 658 MT 5872 658 LT 5879 698 LT 6298 698 LT ST
|
5872 658 MT 5872 658 LT 5879 698 LT 6298 698 LT ST
|
(2) 5886 658 WT pop 0 originOffset 37 add RSS
|
(2) 5886 658 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) 3066 841 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) 3066 841 WT TSE RSS
|
3522 732 MT 3536 732 LS
|
3522 732 MT 3536 732 LS
|
3948 732 MT 3962 732 LS
|
3948 732 MT 3962 732 LS
|
4374 732 MT 4388 732 LS
|
4374 732 MT 4388 732 LS
|
4800 732 MT 4814 732 LS
|
4800 732 MT 4814 732 LS
|
5226 732 MT 5240 732 LS
|
5226 732 MT 5240 732 LS
|
5652 732 MT 5666 732 LS
|
5652 732 MT 5666 732 LS
|
6078 732 MT 6092 732 LS
|
6078 732 MT 6092 732 LS
|
3103 842 MT 6298 842 LS
|
3103 842 MT 6298 842 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) 3066 985 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) 3066 985 WT TSE RSS
|
3522 876 MT 3536 876 LS
|
3522 876 MT 3536 876 LS
|
3948 876 MT 3962 876 LS
|
3948 876 MT 3962 876 LS
|
4374 876 MT 4388 876 LS
|
4374 876 MT 4388 876 LS
|
4800 876 MT 4814 876 LS
|
4800 876 MT 4814 876 LS
|
5226 876 MT 5240 876 LS
|
5226 876 MT 5240 876 LS
|
5652 876 MT 5666 876 LS
|
5652 876 MT 5666 876 LS
|
6078 876 MT 6092 876 LS
|
6078 876 MT 6092 876 LS
|
3103 905 MT 3103 905 LT 6298 905 LT ST
|
3103 905 MT 3103 905 LT 6298 905 LT ST
|
3103 986 MT 3103 986 LT 6298 986 LT ST
|
3103 986 MT 3103 986 LT 6298 986 LT ST
|
(14610000) 3117 946 WT pop 0 originOffset 37 add RSS
|
(14610000) 3117 946 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) 3066 1129 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) 3066 1129 WT TSE RSS
|
3522 1020 MT 3536 1020 LS
|
3522 1020 MT 3536 1020 LS
|
3948 1020 MT 3962 1020 LS
|
3948 1020 MT 3962 1020 LS
|
4374 1020 MT 4388 1020 LS
|
4374 1020 MT 4388 1020 LS
|
4800 1020 MT 4814 1020 LS
|
4800 1020 MT 4814 1020 LS
|
5226 1020 MT 5240 1020 LS
|
5226 1020 MT 5240 1020 LS
|
5652 1020 MT 5666 1020 LS
|
5652 1020 MT 5666 1020 LS
|
6078 1020 MT 6092 1020 LS
|
6078 1020 MT 6092 1020 LS
|
3103 1049 MT 3103 1049 LT 6298 1049 LT ST
|
3103 1049 MT 3103 1049 LT 6298 1049 LT ST
|
3103 1130 MT 3103 1130 LT 6298 1130 LT ST
|
3103 1130 MT 3103 1130 LT 6298 1130 LT ST
|
(03) 3117 1090 WT pop 0 originOffset 37 add RSS
|
(03) 3117 1090 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) 3066 1273 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) 3066 1273 WT TSE RSS
|
3522 1164 MT 3536 1164 LS
|
3522 1164 MT 3536 1164 LS
|
3948 1164 MT 3962 1164 LS
|
3948 1164 MT 3962 1164 LS
|
4374 1164 MT 4388 1164 LS
|
4374 1164 MT 4388 1164 LS
|
4800 1164 MT 4814 1164 LS
|
4800 1164 MT 4814 1164 LS
|
5226 1164 MT 5240 1164 LS
|
5226 1164 MT 5240 1164 LS
|
5652 1164 MT 5666 1164 LS
|
5652 1164 MT 5666 1164 LS
|
6078 1164 MT 6092 1164 LS
|
6078 1164 MT 6092 1164 LS
|
3103 1274 MT 6298 1274 LS
|
3103 1274 MT 6298 1274 LS
|
% draw footer
|
% draw footer
|
(Entity:tb_or1200_cpu Architecture: Date: Sat Aug 14 00:33:37 EDT 2004 Row: 3 Page: 6) 300 4799 WT TSW RSS
|
(Entity:tb_or1200_cpu Architecture: Date: Sat Aug 14 00:33:37 EDT 2004 Row: 3 Page: 6) 300 4799 WT TSW RSS
|
grestore
|
grestore
|
showpage
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showpage
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%%Page: 7 7
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%%Page: 7 7
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gsave
|
gsave
|
90 rotate 0.12 dup neg scale
|
90 rotate 0.12 dup neg scale
|
% dump string table
|
% dump string table
|
/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
|
/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
|
/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
|
/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
|
/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
|
/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
|
/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
|
/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
|
/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
|
/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
|
/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
|
/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
|
/ARC {5 -2 roll SX 5 2 roll arc} def
|
/ARC {5 -2 roll SX 5 2 roll arc} def
|
/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3103 def/REdge 5699 def/LabelWidth 3066 def
|
/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3103 def/REdge 5699 def/LabelWidth 3066 def
|
/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
|
/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
|
/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
|
/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/alu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/alu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_taken) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_taken) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/clk) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/clk) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/comp_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/comp_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_limm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_limm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/du_hwbkpt) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/du_hwbkpt) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/except_illegal) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/except_illegal) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) MLW
|
% draw waveform shading
|
% draw waveform shading
|
[] 0 SD
|
[] 0 SD
|
2.995 setlinewidth
|
2.995 setlinewidth
|
0 setlinejoin
|
0 setlinejoin
|
0 setlinecap
|
0 setlinecap
|
0 0 0 CL
|
0 0 0 CL
|
3103 370 MT 6298 370 LS
|
3103 370 MT 6298 370 LS
|
3103 554 MT 6298 554 LS
|
3103 554 MT 6298 554 LS
|
3103 698 MT 6298 698 LS
|
3103 698 MT 6298 698 LS
|
3103 761 MT 3103 761 LT 6298 761 LT ST
|
3103 761 MT 3103 761 LT 6298 761 LT ST
|
3103 842 MT 3103 842 LT 6298 842 LT ST
|
3103 842 MT 3103 842 LT 6298 842 LT ST
|
(14610000) 3117 802 WT pop 0 originOffset 37 add RSS
|
(14610000) 3117 802 WT pop 0 originOffset 37 add RSS
|
3103 986 MT 6298 986 LS
|
3103 986 MT 6298 986 LS
|
3103 1050 MT 6298 1050 LS
|
3103 1050 MT 6298 1050 LS
|
3103 1193 MT 3103 1193 LT 6298 1193 LT ST
|
3103 1193 MT 3103 1193 LT 6298 1193 LT ST
|
3103 1274 MT 3103 1274 LT 6298 1274 LT ST
|
3103 1274 MT 3103 1274 LT 6298 1274 LT ST
|
(14610000) 3117 1234 WT pop 0 originOffset 37 add RSS
|
(14610000) 3117 1234 WT pop 0 originOffset 37 add RSS
|
3103 1418 MT 6298 1418 LS
|
3103 1418 MT 6298 1418 LS
|
3103 1481 MT 3103 1481 LT 6298 1481 LT ST
|
3103 1481 MT 3103 1481 LT 6298 1481 LT ST
|
3103 1562 MT 3103 1562 LT 6298 1562 LT ST
|
3103 1562 MT 3103 1562 LT 6298 1562 LT ST
|
(00000000) 3117 1522 WT pop 0 originOffset 37 add RSS
|
(00000000) 3117 1522 WT pop 0 originOffset 37 add RSS
|
3103 1625 MT 3103 1625 LT 6298 1625 LT ST
|
3103 1625 MT 3103 1625 LT 6298 1625 LT ST
|
3103 1706 MT 3103 1706 LT 6298 1706 LT ST
|
3103 1706 MT 3103 1706 LT 6298 1706 LT ST
|
(0) 3117 1666 WT pop 0 originOffset 37 add RSS
|
(0) 3117 1666 WT pop 0 originOffset 37 add RSS
|
3103 1769 MT 3103 1769 LT 6298 1769 LT ST
|
3103 1769 MT 3103 1769 LT 6298 1769 LT ST
|
3103 1850 MT 3103 1850 LT 6298 1850 LT ST
|
3103 1850 MT 3103 1850 LT 6298 1850 LT ST
|
(0) 3117 1810 WT pop 0 originOffset 37 add RSS
|
(0) 3117 1810 WT pop 0 originOffset 37 add RSS
|
3103 1913 MT 3103 1913 LT 6298 1913 LT ST
|
3103 1913 MT 3103 1913 LT 6298 1913 LT ST
|
3103 1994 MT 3103 1994 LT 6298 1994 LT ST
|
3103 1994 MT 3103 1994 LT 6298 1994 LT ST
|
(0) 3117 1954 WT pop 0 originOffset 37 add RSS
|
(0) 3117 1954 WT pop 0 originOffset 37 add RSS
|
3103 2138 MT 6298 2138 LS
|
3103 2138 MT 6298 2138 LS
|
3103 2201 MT 3103 2201 LT 6298 2201 LT ST
|
3103 2201 MT 3103 2201 LT 6298 2201 LT ST
|
3103 2282 MT 3103 2282 LT 6298 2282 LT ST
|
3103 2282 MT 3103 2282 LT 6298 2282 LT ST
|
(0) 3117 2242 WT pop 0 originOffset 37 add RSS
|
(0) 3117 2242 WT pop 0 originOffset 37 add RSS
|
3103 2345 MT 3103 2345 LT 6298 2345 LT ST
|
3103 2345 MT 3103 2345 LT 6298 2345 LT ST
|
3103 2426 MT 3103 2426 LT 6298 2426 LT ST
|
3103 2426 MT 3103 2426 LT 6298 2426 LT ST
|
(01) 3117 2386 WT pop 0 originOffset 37 add RSS
|
(01) 3117 2386 WT pop 0 originOffset 37 add RSS
|
3103 2489 MT 3103 2489 LT 6298 2489 LT ST
|
3103 2489 MT 3103 2489 LT 6298 2489 LT ST
|
3103 2570 MT 3103 2570 LT 6298 2570 LT ST
|
3103 2570 MT 3103 2570 LT 6298 2570 LT ST
|
(00) 3117 2530 WT pop 0 originOffset 37 add RSS
|
(00) 3117 2530 WT pop 0 originOffset 37 add RSS
|
3103 2633 MT 3103 2633 LT 6298 2633 LT ST
|
3103 2633 MT 3103 2633 LT 6298 2633 LT ST
|
3103 2714 MT 3103 2714 LT 6298 2714 LT ST
|
3103 2714 MT 3103 2714 LT 6298 2714 LT ST
|
(03) 3117 2674 WT pop 0 originOffset 37 add RSS
|
(03) 3117 2674 WT pop 0 originOffset 37 add RSS
|
3103 2858 MT 6298 2858 LS
|
3103 2858 MT 6298 2858 LS
|
3103 3002 MT 6298 3002 LS
|
3103 3002 MT 6298 3002 LS
|
3103 3146 MT 6298 3146 LS
|
3103 3146 MT 6298 3146 LS
|
3103 3209 MT 3103 3209 LT 6298 3209 LT ST
|
3103 3209 MT 3103 3209 LT 6298 3209 LT ST
|
3103 3290 MT 3103 3290 LT 6298 3290 LT ST
|
3103 3290 MT 3103 3290 LT 6298 3290 LT ST
|
(0) 3117 3250 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3250 WT pop 0 originOffset 37 add RSS
|
3103 3434 MT 6298 3434 LS
|
3103 3434 MT 6298 3434 LS
|
3103 3497 MT 3103 3497 LT 6298 3497 LT ST
|
3103 3497 MT 3103 3497 LT 6298 3497 LT ST
|
3103 3578 MT 3103 3578 LT 6298 3578 LT ST
|
3103 3578 MT 3103 3578 LT 6298 3578 LT ST
|
(0) 3117 3538 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3538 WT pop 0 originOffset 37 add RSS
|
3103 3641 MT 3103 3641 LT 6298 3641 LT ST
|
3103 3641 MT 3103 3641 LT 6298 3641 LT ST
|
3103 3722 MT 3103 3722 LT 6298 3722 LT ST
|
3103 3722 MT 3103 3722 LT 6298 3722 LT ST
|
(0) 3117 3682 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3682 WT pop 0 originOffset 37 add RSS
|
3103 3866 MT 6298 3866 LS
|
3103 3866 MT 6298 3866 LS
|
3103 3929 MT 3103 3929 LT 6298 3929 LT ST
|
3103 3929 MT 3103 3929 LT 6298 3929 LT ST
|
3103 4010 MT 3103 4010 LT 6298 4010 LT ST
|
3103 4010 MT 3103 4010 LT 6298 4010 LT ST
|
(0) 3117 3970 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3970 WT pop 0 originOffset 37 add RSS
|
3103 4154 MT 6298 4154 LS
|
3103 4154 MT 6298 4154 LS
|
3103 4258 MT 6298 4258 LS
|
3103 4258 MT 6298 4258 LS
|
3103 4361 MT 3103 4361 LT 6298 4361 LT ST
|
3103 4361 MT 3103 4361 LT 6298 4361 LT ST
|
3103 4442 MT 3103 4442 LT 6298 4442 LT ST
|
3103 4442 MT 3103 4442 LT 6298 4442 LT ST
|
(00000000) 3117 4402 WT pop 0 originOffset 37 add RSS
|
(00000000) 3117 4402 WT pop 0 originOffset 37 add RSS
|
% draw timeline
|
% draw timeline
|
3145 4533 MT 3145 4570 LS
|
3145 4533 MT 3145 4570 LS
|
3187 4533 MT 3187 4570 LS
|
3187 4533 MT 3187 4570 LS
|
3230 4533 MT 3230 4570 LS
|
3230 4533 MT 3230 4570 LS
|
3272 4533 MT 3272 4570 LS
|
3272 4533 MT 3272 4570 LS
|
3359 4533 MT 3359 4570 LS
|
3359 4533 MT 3359 4570 LS
|
3401 4533 MT 3401 4570 LS
|
3401 4533 MT 3401 4570 LS
|
3444 4533 MT 3444 4570 LS
|
3444 4533 MT 3444 4570 LS
|
3486 4533 MT 3486 4570 LS
|
3486 4533 MT 3486 4570 LS
|
3529 4533 MT 3529 4570 LS
|
3529 4533 MT 3529 4570 LS
|
3572 4533 MT 3572 4570 LS
|
3572 4533 MT 3572 4570 LS
|
3614 4533 MT 3614 4570 LS
|
3614 4533 MT 3614 4570 LS
|
3657 4533 MT 3657 4570 LS
|
3657 4533 MT 3657 4570 LS
|
3699 4533 MT 3699 4570 LS
|
3699 4533 MT 3699 4570 LS
|
3316 4506 MT 3316 4570 LS
|
3316 4506 MT 3316 4570 LS
|
3785 4533 MT 3785 4570 LS
|
3785 4533 MT 3785 4570 LS
|
3827 4533 MT 3827 4570 LS
|
3827 4533 MT 3827 4570 LS
|
3870 4533 MT 3870 4570 LS
|
3870 4533 MT 3870 4570 LS
|
3912 4533 MT 3912 4570 LS
|
3912 4533 MT 3912 4570 LS
|
3955 4533 MT 3955 4570 LS
|
3955 4533 MT 3955 4570 LS
|
3998 4533 MT 3998 4570 LS
|
3998 4533 MT 3998 4570 LS
|
4040 4533 MT 4040 4570 LS
|
4040 4533 MT 4040 4570 LS
|
4083 4533 MT 4083 4570 LS
|
4083 4533 MT 4083 4570 LS
|
4125 4533 MT 4125 4570 LS
|
4125 4533 MT 4125 4570 LS
|
3742 4506 MT 3742 4570 LS
|
3742 4506 MT 3742 4570 LS
|
(240) 3742 4649 WT TS RSS
|
(240) 3742 4649 WT TS RSS
|
4211 4533 MT 4211 4570 LS
|
4211 4533 MT 4211 4570 LS
|
4253 4533 MT 4253 4570 LS
|
4253 4533 MT 4253 4570 LS
|
4296 4533 MT 4296 4570 LS
|
4296 4533 MT 4296 4570 LS
|
4338 4533 MT 4338 4570 LS
|
4338 4533 MT 4338 4570 LS
|
4381 4533 MT 4381 4570 LS
|
4381 4533 MT 4381 4570 LS
|
4424 4533 MT 4424 4570 LS
|
4424 4533 MT 4424 4570 LS
|
4466 4533 MT 4466 4570 LS
|
4466 4533 MT 4466 4570 LS
|
4509 4533 MT 4509 4570 LS
|
4509 4533 MT 4509 4570 LS
|
4551 4533 MT 4551 4570 LS
|
4551 4533 MT 4551 4570 LS
|
4168 4506 MT 4168 4570 LS
|
4168 4506 MT 4168 4570 LS
|
4637 4533 MT 4637 4570 LS
|
4637 4533 MT 4637 4570 LS
|
4679 4533 MT 4679 4570 LS
|
4679 4533 MT 4679 4570 LS
|
4722 4533 MT 4722 4570 LS
|
4722 4533 MT 4722 4570 LS
|
4764 4533 MT 4764 4570 LS
|
4764 4533 MT 4764 4570 LS
|
4807 4533 MT 4807 4570 LS
|
4807 4533 MT 4807 4570 LS
|
4850 4533 MT 4850 4570 LS
|
4850 4533 MT 4850 4570 LS
|
4892 4533 MT 4892 4570 LS
|
4892 4533 MT 4892 4570 LS
|
4935 4533 MT 4935 4570 LS
|
4935 4533 MT 4935 4570 LS
|
4977 4533 MT 4977 4570 LS
|
4977 4533 MT 4977 4570 LS
|
4594 4506 MT 4594 4570 LS
|
4594 4506 MT 4594 4570 LS
|
(260) 4594 4649 WT TS RSS
|
(260) 4594 4649 WT TS RSS
|
5063 4533 MT 5063 4570 LS
|
5063 4533 MT 5063 4570 LS
|
5105 4533 MT 5105 4570 LS
|
5105 4533 MT 5105 4570 LS
|
5148 4533 MT 5148 4570 LS
|
5148 4533 MT 5148 4570 LS
|
5190 4533 MT 5190 4570 LS
|
5190 4533 MT 5190 4570 LS
|
5233 4533 MT 5233 4570 LS
|
5233 4533 MT 5233 4570 LS
|
5276 4533 MT 5276 4570 LS
|
5276 4533 MT 5276 4570 LS
|
5318 4533 MT 5318 4570 LS
|
5318 4533 MT 5318 4570 LS
|
5361 4533 MT 5361 4570 LS
|
5361 4533 MT 5361 4570 LS
|
5403 4533 MT 5403 4570 LS
|
5403 4533 MT 5403 4570 LS
|
5020 4506 MT 5020 4570 LS
|
5020 4506 MT 5020 4570 LS
|
5489 4533 MT 5489 4570 LS
|
5489 4533 MT 5489 4570 LS
|
5531 4533 MT 5531 4570 LS
|
5531 4533 MT 5531 4570 LS
|
5574 4533 MT 5574 4570 LS
|
5574 4533 MT 5574 4570 LS
|
5616 4533 MT 5616 4570 LS
|
5616 4533 MT 5616 4570 LS
|
5659 4533 MT 5659 4570 LS
|
5659 4533 MT 5659 4570 LS
|
5702 4533 MT 5702 4570 LS
|
5702 4533 MT 5702 4570 LS
|
5744 4533 MT 5744 4570 LS
|
5744 4533 MT 5744 4570 LS
|
5787 4533 MT 5787 4570 LS
|
5787 4533 MT 5787 4570 LS
|
5829 4533 MT 5829 4570 LS
|
5829 4533 MT 5829 4570 LS
|
5446 4506 MT 5446 4570 LS
|
5446 4506 MT 5446 4570 LS
|
(280) 5446 4649 WT TS RSS
|
(280) 5446 4649 WT TS RSS
|
5915 4533 MT 5915 4570 LS
|
5915 4533 MT 5915 4570 LS
|
5957 4533 MT 5957 4570 LS
|
5957 4533 MT 5957 4570 LS
|
6000 4533 MT 6000 4570 LS
|
6000 4533 MT 6000 4570 LS
|
6042 4533 MT 6042 4570 LS
|
6042 4533 MT 6042 4570 LS
|
6085 4533 MT 6085 4570 LS
|
6085 4533 MT 6085 4570 LS
|
6128 4533 MT 6128 4570 LS
|
6128 4533 MT 6128 4570 LS
|
6170 4533 MT 6170 4570 LS
|
6170 4533 MT 6170 4570 LS
|
6213 4533 MT 6213 4570 LS
|
6213 4533 MT 6213 4570 LS
|
6255 4533 MT 6255 4570 LS
|
6255 4533 MT 6255 4570 LS
|
5872 4506 MT 5872 4570 LS
|
5872 4506 MT 5872 4570 LS
|
6341 4533 MT 6341 4570 LS
|
6341 4533 MT 6341 4570 LS
|
6383 4533 MT 6383 4570 LS
|
6383 4533 MT 6383 4570 LS
|
6426 4533 MT 6426 4570 LS
|
6426 4533 MT 6426 4570 LS
|
6468 4533 MT 6468 4570 LS
|
6468 4533 MT 6468 4570 LS
|
6511 4533 MT 6511 4570 LS
|
6511 4533 MT 6511 4570 LS
|
6554 4533 MT 6554 4570 LS
|
6554 4533 MT 6554 4570 LS
|
6596 4533 MT 6596 4570 LS
|
6596 4533 MT 6596 4570 LS
|
6639 4533 MT 6639 4570 LS
|
6639 4533 MT 6639 4570 LS
|
6681 4533 MT 6681 4570 LS
|
6681 4533 MT 6681 4570 LS
|
6298 4506 MT 6298 4570 LS
|
6298 4506 MT 6298 4570 LS
|
(300) 6298 4649 WT TS RSS
|
(300) 6298 4649 WT TS RSS
|
% draw grid
|
% draw grid
|
3316 300 MT 3316 4506 LS
|
3316 300 MT 3316 4506 LS
|
3742 300 MT 3742 4506 LS
|
3742 300 MT 3742 4506 LS
|
4168 300 MT 4168 4506 LS
|
4168 300 MT 4168 4506 LS
|
4594 300 MT 4594 4506 LS
|
4594 300 MT 4594 4506 LS
|
5020 300 MT 5020 4506 LS
|
5020 300 MT 5020 4506 LS
|
5446 300 MT 5446 4506 LS
|
5446 300 MT 5446 4506 LS
|
5872 300 MT 5872 4506 LS
|
5872 300 MT 5872 4506 LS
|
6298 300 MT 6298 4506 LS
|
6298 300 MT 6298 4506 LS
|
% draw waveforms
|
% draw waveforms
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) 3066 409 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) 3066 409 WT TSE RSS
|
3309 300 MT 3323 300 LS
|
3309 300 MT 3323 300 LS
|
3735 300 MT 3749 300 LS
|
3735 300 MT 3749 300 LS
|
4161 300 MT 4175 300 LS
|
4161 300 MT 4175 300 LS
|
4587 300 MT 4601 300 LS
|
4587 300 MT 4601 300 LS
|
5013 300 MT 5027 300 LS
|
5013 300 MT 5027 300 LS
|
5439 300 MT 5453 300 LS
|
5439 300 MT 5453 300 LS
|
5865 300 MT 5879 300 LS
|
5865 300 MT 5879 300 LS
|
6291 300 MT 6305 300 LS
|
6291 300 MT 6305 300 LS
|
3103 370 MT 6298 370 LS
|
3103 370 MT 6298 370 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) 3066 553 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) 3066 553 WT TSE RSS
|
3309 444 MT 3323 444 LS
|
3309 444 MT 3323 444 LS
|
3735 444 MT 3749 444 LS
|
3735 444 MT 3749 444 LS
|
4161 444 MT 4175 444 LS
|
4161 444 MT 4175 444 LS
|
4587 444 MT 4601 444 LS
|
4587 444 MT 4601 444 LS
|
5013 444 MT 5027 444 LS
|
5013 444 MT 5027 444 LS
|
5439 444 MT 5453 444 LS
|
5439 444 MT 5453 444 LS
|
5865 444 MT 5879 444 LS
|
5865 444 MT 5879 444 LS
|
6291 444 MT 6305 444 LS
|
6291 444 MT 6305 444 LS
|
3103 554 MT 6298 554 LS
|
3103 554 MT 6298 554 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) 3066 697 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) 3066 697 WT TSE RSS
|
3309 588 MT 3323 588 LS
|
3309 588 MT 3323 588 LS
|
3735 588 MT 3749 588 LS
|
3735 588 MT 3749 588 LS
|
4161 588 MT 4175 588 LS
|
4161 588 MT 4175 588 LS
|
4587 588 MT 4601 588 LS
|
4587 588 MT 4601 588 LS
|
5013 588 MT 5027 588 LS
|
5013 588 MT 5027 588 LS
|
5439 588 MT 5453 588 LS
|
5439 588 MT 5453 588 LS
|
5865 588 MT 5879 588 LS
|
5865 588 MT 5879 588 LS
|
6291 588 MT 6305 588 LS
|
6291 588 MT 6305 588 LS
|
3103 698 MT 6298 698 LS
|
3103 698 MT 6298 698 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) 3066 841 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) 3066 841 WT TSE RSS
|
3309 732 MT 3323 732 LS
|
3309 732 MT 3323 732 LS
|
3735 732 MT 3749 732 LS
|
3735 732 MT 3749 732 LS
|
4161 732 MT 4175 732 LS
|
4161 732 MT 4175 732 LS
|
4587 732 MT 4601 732 LS
|
4587 732 MT 4601 732 LS
|
5013 732 MT 5027 732 LS
|
5013 732 MT 5027 732 LS
|
5439 732 MT 5453 732 LS
|
5439 732 MT 5453 732 LS
|
5865 732 MT 5879 732 LS
|
5865 732 MT 5879 732 LS
|
6291 732 MT 6305 732 LS
|
6291 732 MT 6305 732 LS
|
3103 761 MT 3103 761 LT 6298 761 LT ST
|
3103 761 MT 3103 761 LT 6298 761 LT ST
|
3103 842 MT 3103 842 LT 6298 842 LT ST
|
3103 842 MT 3103 842 LT 6298 842 LT ST
|
(14610000) 3117 802 WT pop 0 originOffset 37 add RSS
|
(14610000) 3117 802 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) 3066 985 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) 3066 985 WT TSE RSS
|
3309 876 MT 3323 876 LS
|
3309 876 MT 3323 876 LS
|
3735 876 MT 3749 876 LS
|
3735 876 MT 3749 876 LS
|
4161 876 MT 4175 876 LS
|
4161 876 MT 4175 876 LS
|
4587 876 MT 4601 876 LS
|
4587 876 MT 4601 876 LS
|
5013 876 MT 5027 876 LS
|
5013 876 MT 5027 876 LS
|
5439 876 MT 5453 876 LS
|
5439 876 MT 5453 876 LS
|
5865 876 MT 5879 876 LS
|
5865 876 MT 5879 876 LS
|
6291 876 MT 6305 876 LS
|
6291 876 MT 6305 876 LS
|
3103 986 MT 6298 986 LS
|
3103 986 MT 6298 986 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) 3066 1129 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) 3066 1129 WT TSE RSS
|
3309 1020 MT 3323 1020 LS
|
3309 1020 MT 3323 1020 LS
|
3735 1020 MT 3749 1020 LS
|
3735 1020 MT 3749 1020 LS
|
4161 1020 MT 4175 1020 LS
|
4161 1020 MT 4175 1020 LS
|
4587 1020 MT 4601 1020 LS
|
4587 1020 MT 4601 1020 LS
|
5013 1020 MT 5027 1020 LS
|
5013 1020 MT 5027 1020 LS
|
5439 1020 MT 5453 1020 LS
|
5439 1020 MT 5453 1020 LS
|
5865 1020 MT 5879 1020 LS
|
5865 1020 MT 5879 1020 LS
|
6291 1020 MT 6305 1020 LS
|
6291 1020 MT 6305 1020 LS
|
3103 1050 MT 6298 1050 LS
|
3103 1050 MT 6298 1050 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) 3066 1273 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) 3066 1273 WT TSE RSS
|
3309 1164 MT 3323 1164 LS
|
3309 1164 MT 3323 1164 LS
|
3735 1164 MT 3749 1164 LS
|
3735 1164 MT 3749 1164 LS
|
4161 1164 MT 4175 1164 LS
|
4161 1164 MT 4175 1164 LS
|
4587 1164 MT 4601 1164 LS
|
4587 1164 MT 4601 1164 LS
|
5013 1164 MT 5027 1164 LS
|
5013 1164 MT 5027 1164 LS
|
5439 1164 MT 5453 1164 LS
|
5439 1164 MT 5453 1164 LS
|
5865 1164 MT 5879 1164 LS
|
5865 1164 MT 5879 1164 LS
|
6291 1164 MT 6305 1164 LS
|
6291 1164 MT 6305 1164 LS
|
3103 1193 MT 3103 1193 LT 6298 1193 LT ST
|
3103 1193 MT 3103 1193 LT 6298 1193 LT ST
|
3103 1274 MT 3103 1274 LT 6298 1274 LT ST
|
3103 1274 MT 3103 1274 LT 6298 1274 LT ST
|
(14610000) 3117 1234 WT pop 0 originOffset 37 add RSS
|
(14610000) 3117 1234 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) 3066 1417 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) 3066 1417 WT TSE RSS
|
3309 1308 MT 3323 1308 LS
|
3309 1308 MT 3323 1308 LS
|
3735 1308 MT 3749 1308 LS
|
3735 1308 MT 3749 1308 LS
|
4161 1308 MT 4175 1308 LS
|
4161 1308 MT 4175 1308 LS
|
4587 1308 MT 4601 1308 LS
|
4587 1308 MT 4601 1308 LS
|
5013 1308 MT 5027 1308 LS
|
5013 1308 MT 5027 1308 LS
|
5439 1308 MT 5453 1308 LS
|
5439 1308 MT 5453 1308 LS
|
5865 1308 MT 5879 1308 LS
|
5865 1308 MT 5879 1308 LS
|
6291 1308 MT 6305 1308 LS
|
6291 1308 MT 6305 1308 LS
|
3103 1418 MT 6298 1418 LS
|
3103 1418 MT 6298 1418 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) 3066 1561 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) 3066 1561 WT TSE RSS
|
3309 1452 MT 3323 1452 LS
|
3309 1452 MT 3323 1452 LS
|
3735 1452 MT 3749 1452 LS
|
3735 1452 MT 3749 1452 LS
|
4161 1452 MT 4175 1452 LS
|
4161 1452 MT 4175 1452 LS
|
4587 1452 MT 4601 1452 LS
|
4587 1452 MT 4601 1452 LS
|
5013 1452 MT 5027 1452 LS
|
5013 1452 MT 5027 1452 LS
|
5439 1452 MT 5453 1452 LS
|
5439 1452 MT 5453 1452 LS
|
5865 1452 MT 5879 1452 LS
|
5865 1452 MT 5879 1452 LS
|
6291 1452 MT 6305 1452 LS
|
6291 1452 MT 6305 1452 LS
|
3103 1481 MT 3103 1481 LT 6298 1481 LT ST
|
3103 1481 MT 3103 1481 LT 6298 1481 LT ST
|
3103 1562 MT 3103 1562 LT 6298 1562 LT ST
|
3103 1562 MT 3103 1562 LT 6298 1562 LT ST
|
(00000000) 3117 1522 WT pop 0 originOffset 37 add RSS
|
(00000000) 3117 1522 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) 3066 1705 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) 3066 1705 WT TSE RSS
|
3309 1596 MT 3323 1596 LS
|
3309 1596 MT 3323 1596 LS
|
3735 1596 MT 3749 1596 LS
|
3735 1596 MT 3749 1596 LS
|
4161 1596 MT 4175 1596 LS
|
4161 1596 MT 4175 1596 LS
|
4587 1596 MT 4601 1596 LS
|
4587 1596 MT 4601 1596 LS
|
5013 1596 MT 5027 1596 LS
|
5013 1596 MT 5027 1596 LS
|
5439 1596 MT 5453 1596 LS
|
5439 1596 MT 5453 1596 LS
|
5865 1596 MT 5879 1596 LS
|
5865 1596 MT 5879 1596 LS
|
6291 1596 MT 6305 1596 LS
|
6291 1596 MT 6305 1596 LS
|
3103 1625 MT 3103 1625 LT 6298 1625 LT ST
|
3103 1625 MT 3103 1625 LT 6298 1625 LT ST
|
3103 1706 MT 3103 1706 LT 6298 1706 LT ST
|
3103 1706 MT 3103 1706 LT 6298 1706 LT ST
|
(0) 3117 1666 WT pop 0 originOffset 37 add RSS
|
(0) 3117 1666 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) 3066 1849 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) 3066 1849 WT TSE RSS
|
3309 1740 MT 3323 1740 LS
|
3309 1740 MT 3323 1740 LS
|
3735 1740 MT 3749 1740 LS
|
3735 1740 MT 3749 1740 LS
|
4161 1740 MT 4175 1740 LS
|
4161 1740 MT 4175 1740 LS
|
4587 1740 MT 4601 1740 LS
|
4587 1740 MT 4601 1740 LS
|
5013 1740 MT 5027 1740 LS
|
5013 1740 MT 5027 1740 LS
|
5439 1740 MT 5453 1740 LS
|
5439 1740 MT 5453 1740 LS
|
5865 1740 MT 5879 1740 LS
|
5865 1740 MT 5879 1740 LS
|
6291 1740 MT 6305 1740 LS
|
6291 1740 MT 6305 1740 LS
|
3103 1769 MT 3103 1769 LT 6298 1769 LT ST
|
3103 1769 MT 3103 1769 LT 6298 1769 LT ST
|
3103 1850 MT 3103 1850 LT 6298 1850 LT ST
|
3103 1850 MT 3103 1850 LT 6298 1850 LT ST
|
(0) 3117 1810 WT pop 0 originOffset 37 add RSS
|
(0) 3117 1810 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) 3066 1993 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) 3066 1993 WT TSE RSS
|
3309 1884 MT 3323 1884 LS
|
3309 1884 MT 3323 1884 LS
|
3735 1884 MT 3749 1884 LS
|
3735 1884 MT 3749 1884 LS
|
4161 1884 MT 4175 1884 LS
|
4161 1884 MT 4175 1884 LS
|
4587 1884 MT 4601 1884 LS
|
4587 1884 MT 4601 1884 LS
|
5013 1884 MT 5027 1884 LS
|
5013 1884 MT 5027 1884 LS
|
5439 1884 MT 5453 1884 LS
|
5439 1884 MT 5453 1884 LS
|
5865 1884 MT 5879 1884 LS
|
5865 1884 MT 5879 1884 LS
|
6291 1884 MT 6305 1884 LS
|
6291 1884 MT 6305 1884 LS
|
3103 1913 MT 3103 1913 LT 6298 1913 LT ST
|
3103 1913 MT 3103 1913 LT 6298 1913 LT ST
|
3103 1994 MT 3103 1994 LT 6298 1994 LT ST
|
3103 1994 MT 3103 1994 LT 6298 1994 LT ST
|
(0) 3117 1954 WT pop 0 originOffset 37 add RSS
|
(0) 3117 1954 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) 3066 2137 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) 3066 2137 WT TSE RSS
|
3309 2028 MT 3323 2028 LS
|
3309 2028 MT 3323 2028 LS
|
3735 2028 MT 3749 2028 LS
|
3735 2028 MT 3749 2028 LS
|
4161 2028 MT 4175 2028 LS
|
4161 2028 MT 4175 2028 LS
|
4587 2028 MT 4601 2028 LS
|
4587 2028 MT 4601 2028 LS
|
5013 2028 MT 5027 2028 LS
|
5013 2028 MT 5027 2028 LS
|
5439 2028 MT 5453 2028 LS
|
5439 2028 MT 5453 2028 LS
|
5865 2028 MT 5879 2028 LS
|
5865 2028 MT 5879 2028 LS
|
6291 2028 MT 6305 2028 LS
|
6291 2028 MT 6305 2028 LS
|
3103 2138 MT 6298 2138 LS
|
3103 2138 MT 6298 2138 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) 3066 2281 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) 3066 2281 WT TSE RSS
|
3309 2172 MT 3323 2172 LS
|
3309 2172 MT 3323 2172 LS
|
3735 2172 MT 3749 2172 LS
|
3735 2172 MT 3749 2172 LS
|
4161 2172 MT 4175 2172 LS
|
4161 2172 MT 4175 2172 LS
|
4587 2172 MT 4601 2172 LS
|
4587 2172 MT 4601 2172 LS
|
5013 2172 MT 5027 2172 LS
|
5013 2172 MT 5027 2172 LS
|
5439 2172 MT 5453 2172 LS
|
5439 2172 MT 5453 2172 LS
|
5865 2172 MT 5879 2172 LS
|
5865 2172 MT 5879 2172 LS
|
6291 2172 MT 6305 2172 LS
|
6291 2172 MT 6305 2172 LS
|
3103 2201 MT 3103 2201 LT 6298 2201 LT ST
|
3103 2201 MT 3103 2201 LT 6298 2201 LT ST
|
3103 2282 MT 3103 2282 LT 6298 2282 LT ST
|
3103 2282 MT 3103 2282 LT 6298 2282 LT ST
|
(0) 3117 2242 WT pop 0 originOffset 37 add RSS
|
(0) 3117 2242 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) 3066 2425 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) 3066 2425 WT TSE RSS
|
3309 2316 MT 3323 2316 LS
|
3309 2316 MT 3323 2316 LS
|
3735 2316 MT 3749 2316 LS
|
3735 2316 MT 3749 2316 LS
|
4161 2316 MT 4175 2316 LS
|
4161 2316 MT 4175 2316 LS
|
4587 2316 MT 4601 2316 LS
|
4587 2316 MT 4601 2316 LS
|
5013 2316 MT 5027 2316 LS
|
5013 2316 MT 5027 2316 LS
|
5439 2316 MT 5453 2316 LS
|
5439 2316 MT 5453 2316 LS
|
5865 2316 MT 5879 2316 LS
|
5865 2316 MT 5879 2316 LS
|
6291 2316 MT 6305 2316 LS
|
6291 2316 MT 6305 2316 LS
|
3103 2345 MT 3103 2345 LT 6298 2345 LT ST
|
3103 2345 MT 3103 2345 LT 6298 2345 LT ST
|
3103 2426 MT 3103 2426 LT 6298 2426 LT ST
|
3103 2426 MT 3103 2426 LT 6298 2426 LT ST
|
(01) 3117 2386 WT pop 0 originOffset 37 add RSS
|
(01) 3117 2386 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) 3066 2569 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) 3066 2569 WT TSE RSS
|
3309 2460 MT 3323 2460 LS
|
3309 2460 MT 3323 2460 LS
|
3735 2460 MT 3749 2460 LS
|
3735 2460 MT 3749 2460 LS
|
4161 2460 MT 4175 2460 LS
|
4161 2460 MT 4175 2460 LS
|
4587 2460 MT 4601 2460 LS
|
4587 2460 MT 4601 2460 LS
|
5013 2460 MT 5027 2460 LS
|
5013 2460 MT 5027 2460 LS
|
5439 2460 MT 5453 2460 LS
|
5439 2460 MT 5453 2460 LS
|
5865 2460 MT 5879 2460 LS
|
5865 2460 MT 5879 2460 LS
|
6291 2460 MT 6305 2460 LS
|
6291 2460 MT 6305 2460 LS
|
3103 2489 MT 3103 2489 LT 6298 2489 LT ST
|
3103 2489 MT 3103 2489 LT 6298 2489 LT ST
|
3103 2570 MT 3103 2570 LT 6298 2570 LT ST
|
3103 2570 MT 3103 2570 LT 6298 2570 LT ST
|
(00) 3117 2530 WT pop 0 originOffset 37 add RSS
|
(00) 3117 2530 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) 3066 2713 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) 3066 2713 WT TSE RSS
|
3309 2604 MT 3323 2604 LS
|
3309 2604 MT 3323 2604 LS
|
3735 2604 MT 3749 2604 LS
|
3735 2604 MT 3749 2604 LS
|
4161 2604 MT 4175 2604 LS
|
4161 2604 MT 4175 2604 LS
|
4587 2604 MT 4601 2604 LS
|
4587 2604 MT 4601 2604 LS
|
5013 2604 MT 5027 2604 LS
|
5013 2604 MT 5027 2604 LS
|
5439 2604 MT 5453 2604 LS
|
5439 2604 MT 5453 2604 LS
|
5865 2604 MT 5879 2604 LS
|
5865 2604 MT 5879 2604 LS
|
6291 2604 MT 6305 2604 LS
|
6291 2604 MT 6305 2604 LS
|
3103 2633 MT 3103 2633 LT 6298 2633 LT ST
|
3103 2633 MT 3103 2633 LT 6298 2633 LT ST
|
3103 2714 MT 3103 2714 LT 6298 2714 LT ST
|
3103 2714 MT 3103 2714 LT 6298 2714 LT ST
|
(03) 3117 2674 WT pop 0 originOffset 37 add RSS
|
(03) 3117 2674 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) 3066 2857 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) 3066 2857 WT TSE RSS
|
3309 2748 MT 3323 2748 LS
|
3309 2748 MT 3323 2748 LS
|
3735 2748 MT 3749 2748 LS
|
3735 2748 MT 3749 2748 LS
|
4161 2748 MT 4175 2748 LS
|
4161 2748 MT 4175 2748 LS
|
4587 2748 MT 4601 2748 LS
|
4587 2748 MT 4601 2748 LS
|
5013 2748 MT 5027 2748 LS
|
5013 2748 MT 5027 2748 LS
|
5439 2748 MT 5453 2748 LS
|
5439 2748 MT 5453 2748 LS
|
5865 2748 MT 5879 2748 LS
|
5865 2748 MT 5879 2748 LS
|
6291 2748 MT 6305 2748 LS
|
6291 2748 MT 6305 2748 LS
|
3103 2858 MT 6298 2858 LS
|
3103 2858 MT 6298 2858 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) 3066 3001 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) 3066 3001 WT TSE RSS
|
3309 2892 MT 3323 2892 LS
|
3309 2892 MT 3323 2892 LS
|
3735 2892 MT 3749 2892 LS
|
3735 2892 MT 3749 2892 LS
|
4161 2892 MT 4175 2892 LS
|
4161 2892 MT 4175 2892 LS
|
4587 2892 MT 4601 2892 LS
|
4587 2892 MT 4601 2892 LS
|
5013 2892 MT 5027 2892 LS
|
5013 2892 MT 5027 2892 LS
|
5439 2892 MT 5453 2892 LS
|
5439 2892 MT 5453 2892 LS
|
5865 2892 MT 5879 2892 LS
|
5865 2892 MT 5879 2892 LS
|
6291 2892 MT 6305 2892 LS
|
6291 2892 MT 6305 2892 LS
|
3103 3002 MT 6298 3002 LS
|
3103 3002 MT 6298 3002 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) 3066 3145 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) 3066 3145 WT TSE RSS
|
3309 3036 MT 3323 3036 LS
|
3309 3036 MT 3323 3036 LS
|
3735 3036 MT 3749 3036 LS
|
3735 3036 MT 3749 3036 LS
|
4161 3036 MT 4175 3036 LS
|
4161 3036 MT 4175 3036 LS
|
4587 3036 MT 4601 3036 LS
|
4587 3036 MT 4601 3036 LS
|
5013 3036 MT 5027 3036 LS
|
5013 3036 MT 5027 3036 LS
|
5439 3036 MT 5453 3036 LS
|
5439 3036 MT 5453 3036 LS
|
5865 3036 MT 5879 3036 LS
|
5865 3036 MT 5879 3036 LS
|
6291 3036 MT 6305 3036 LS
|
6291 3036 MT 6305 3036 LS
|
3103 3146 MT 6298 3146 LS
|
3103 3146 MT 6298 3146 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) 3066 3289 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) 3066 3289 WT TSE RSS
|
3309 3180 MT 3323 3180 LS
|
3309 3180 MT 3323 3180 LS
|
3735 3180 MT 3749 3180 LS
|
3735 3180 MT 3749 3180 LS
|
4161 3180 MT 4175 3180 LS
|
4161 3180 MT 4175 3180 LS
|
4587 3180 MT 4601 3180 LS
|
4587 3180 MT 4601 3180 LS
|
5013 3180 MT 5027 3180 LS
|
5013 3180 MT 5027 3180 LS
|
5439 3180 MT 5453 3180 LS
|
5439 3180 MT 5453 3180 LS
|
5865 3180 MT 5879 3180 LS
|
5865 3180 MT 5879 3180 LS
|
6291 3180 MT 6305 3180 LS
|
6291 3180 MT 6305 3180 LS
|
3103 3209 MT 3103 3209 LT 6298 3209 LT ST
|
3103 3209 MT 3103 3209 LT 6298 3209 LT ST
|
3103 3290 MT 3103 3290 LT 6298 3290 LT ST
|
3103 3290 MT 3103 3290 LT 6298 3290 LT ST
|
(0) 3117 3250 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3250 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) 3066 3433 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) 3066 3433 WT TSE RSS
|
3309 3324 MT 3323 3324 LS
|
3309 3324 MT 3323 3324 LS
|
3735 3324 MT 3749 3324 LS
|
3735 3324 MT 3749 3324 LS
|
4161 3324 MT 4175 3324 LS
|
4161 3324 MT 4175 3324 LS
|
4587 3324 MT 4601 3324 LS
|
4587 3324 MT 4601 3324 LS
|
5013 3324 MT 5027 3324 LS
|
5013 3324 MT 5027 3324 LS
|
5439 3324 MT 5453 3324 LS
|
5439 3324 MT 5453 3324 LS
|
5865 3324 MT 5879 3324 LS
|
5865 3324 MT 5879 3324 LS
|
6291 3324 MT 6305 3324 LS
|
6291 3324 MT 6305 3324 LS
|
3103 3434 MT 6298 3434 LS
|
3103 3434 MT 6298 3434 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) 3066 3577 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) 3066 3577 WT TSE RSS
|
3309 3468 MT 3323 3468 LS
|
3309 3468 MT 3323 3468 LS
|
3735 3468 MT 3749 3468 LS
|
3735 3468 MT 3749 3468 LS
|
4161 3468 MT 4175 3468 LS
|
4161 3468 MT 4175 3468 LS
|
4587 3468 MT 4601 3468 LS
|
4587 3468 MT 4601 3468 LS
|
5013 3468 MT 5027 3468 LS
|
5013 3468 MT 5027 3468 LS
|
5439 3468 MT 5453 3468 LS
|
5439 3468 MT 5453 3468 LS
|
5865 3468 MT 5879 3468 LS
|
5865 3468 MT 5879 3468 LS
|
6291 3468 MT 6305 3468 LS
|
6291 3468 MT 6305 3468 LS
|
3103 3497 MT 3103 3497 LT 6298 3497 LT ST
|
3103 3497 MT 3103 3497 LT 6298 3497 LT ST
|
3103 3578 MT 3103 3578 LT 6298 3578 LT ST
|
3103 3578 MT 3103 3578 LT 6298 3578 LT ST
|
(0) 3117 3538 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3538 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) 3066 3721 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) 3066 3721 WT TSE RSS
|
3309 3612 MT 3323 3612 LS
|
3309 3612 MT 3323 3612 LS
|
3735 3612 MT 3749 3612 LS
|
3735 3612 MT 3749 3612 LS
|
4161 3612 MT 4175 3612 LS
|
4161 3612 MT 4175 3612 LS
|
4587 3612 MT 4601 3612 LS
|
4587 3612 MT 4601 3612 LS
|
5013 3612 MT 5027 3612 LS
|
5013 3612 MT 5027 3612 LS
|
5439 3612 MT 5453 3612 LS
|
5439 3612 MT 5453 3612 LS
|
5865 3612 MT 5879 3612 LS
|
5865 3612 MT 5879 3612 LS
|
6291 3612 MT 6305 3612 LS
|
6291 3612 MT 6305 3612 LS
|
3103 3641 MT 3103 3641 LT 6298 3641 LT ST
|
3103 3641 MT 3103 3641 LT 6298 3641 LT ST
|
3103 3722 MT 3103 3722 LT 6298 3722 LT ST
|
3103 3722 MT 3103 3722 LT 6298 3722 LT ST
|
(0) 3117 3682 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3682 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) 3066 3865 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) 3066 3865 WT TSE RSS
|
3309 3756 MT 3323 3756 LS
|
3309 3756 MT 3323 3756 LS
|
3735 3756 MT 3749 3756 LS
|
3735 3756 MT 3749 3756 LS
|
4161 3756 MT 4175 3756 LS
|
4161 3756 MT 4175 3756 LS
|
4587 3756 MT 4601 3756 LS
|
4587 3756 MT 4601 3756 LS
|
5013 3756 MT 5027 3756 LS
|
5013 3756 MT 5027 3756 LS
|
5439 3756 MT 5453 3756 LS
|
5439 3756 MT 5453 3756 LS
|
5865 3756 MT 5879 3756 LS
|
5865 3756 MT 5879 3756 LS
|
6291 3756 MT 6305 3756 LS
|
6291 3756 MT 6305 3756 LS
|
3103 3866 MT 6298 3866 LS
|
3103 3866 MT 6298 3866 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) 3066 4009 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) 3066 4009 WT TSE RSS
|
3309 3900 MT 3323 3900 LS
|
3309 3900 MT 3323 3900 LS
|
3735 3900 MT 3749 3900 LS
|
3735 3900 MT 3749 3900 LS
|
4161 3900 MT 4175 3900 LS
|
4161 3900 MT 4175 3900 LS
|
4587 3900 MT 4601 3900 LS
|
4587 3900 MT 4601 3900 LS
|
5013 3900 MT 5027 3900 LS
|
5013 3900 MT 5027 3900 LS
|
5439 3900 MT 5453 3900 LS
|
5439 3900 MT 5453 3900 LS
|
5865 3900 MT 5879 3900 LS
|
5865 3900 MT 5879 3900 LS
|
6291 3900 MT 6305 3900 LS
|
6291 3900 MT 6305 3900 LS
|
3103 3929 MT 3103 3929 LT 6298 3929 LT ST
|
3103 3929 MT 3103 3929 LT 6298 3929 LT ST
|
3103 4010 MT 3103 4010 LT 6298 4010 LT ST
|
3103 4010 MT 3103 4010 LT 6298 4010 LT ST
|
(0) 3117 3970 WT pop 0 originOffset 37 add RSS
|
(0) 3117 3970 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) 3066 4153 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) 3066 4153 WT TSE RSS
|
3309 4044 MT 3323 4044 LS
|
3309 4044 MT 3323 4044 LS
|
3735 4044 MT 3749 4044 LS
|
3735 4044 MT 3749 4044 LS
|
4161 4044 MT 4175 4044 LS
|
4161 4044 MT 4175 4044 LS
|
4587 4044 MT 4601 4044 LS
|
4587 4044 MT 4601 4044 LS
|
5013 4044 MT 5027 4044 LS
|
5013 4044 MT 5027 4044 LS
|
5439 4044 MT 5453 4044 LS
|
5439 4044 MT 5453 4044 LS
|
5865 4044 MT 5879 4044 LS
|
5865 4044 MT 5879 4044 LS
|
6291 4044 MT 6305 4044 LS
|
6291 4044 MT 6305 4044 LS
|
3103 4154 MT 6298 4154 LS
|
3103 4154 MT 6298 4154 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) 3066 4297 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) 3066 4297 WT TSE RSS
|
3309 4188 MT 3323 4188 LS
|
3309 4188 MT 3323 4188 LS
|
3735 4188 MT 3749 4188 LS
|
3735 4188 MT 3749 4188 LS
|
4161 4188 MT 4175 4188 LS
|
4161 4188 MT 4175 4188 LS
|
4587 4188 MT 4601 4188 LS
|
4587 4188 MT 4601 4188 LS
|
5013 4188 MT 5027 4188 LS
|
5013 4188 MT 5027 4188 LS
|
5439 4188 MT 5453 4188 LS
|
5439 4188 MT 5453 4188 LS
|
5865 4188 MT 5879 4188 LS
|
5865 4188 MT 5879 4188 LS
|
6291 4188 MT 6305 4188 LS
|
6291 4188 MT 6305 4188 LS
|
3103 4258 MT 6298 4258 LS
|
3103 4258 MT 6298 4258 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) 3066 4441 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) 3066 4441 WT TSE RSS
|
3309 4332 MT 3323 4332 LS
|
3309 4332 MT 3323 4332 LS
|
3735 4332 MT 3749 4332 LS
|
3735 4332 MT 3749 4332 LS
|
4161 4332 MT 4175 4332 LS
|
4161 4332 MT 4175 4332 LS
|
4587 4332 MT 4601 4332 LS
|
4587 4332 MT 4601 4332 LS
|
5013 4332 MT 5027 4332 LS
|
5013 4332 MT 5027 4332 LS
|
5439 4332 MT 5453 4332 LS
|
5439 4332 MT 5453 4332 LS
|
5865 4332 MT 5879 4332 LS
|
5865 4332 MT 5879 4332 LS
|
6291 4332 MT 6305 4332 LS
|
6291 4332 MT 6305 4332 LS
|
3103 4361 MT 3103 4361 LT 6298 4361 LT ST
|
3103 4361 MT 3103 4361 LT 6298 4361 LT ST
|
3103 4442 MT 3103 4442 LT 6298 4442 LT ST
|
3103 4442 MT 3103 4442 LT 6298 4442 LT ST
|
(00000000) 3117 4402 WT pop 0 originOffset 37 add RSS
|
(00000000) 3117 4402 WT pop 0 originOffset 37 add RSS
|
% draw footer
|
% draw footer
|
(Entity:tb_or1200_cpu Architecture: Date: Sat Aug 14 00:33:37 EDT 2004 Row: 4 Page: 7) 300 4799 WT TSW RSS
|
(Entity:tb_or1200_cpu Architecture: Date: Sat Aug 14 00:33:37 EDT 2004 Row: 4 Page: 7) 300 4799 WT TSW RSS
|
grestore
|
grestore
|
showpage
|
showpage
|
%%Page: 8 8
|
%%Page: 8 8
|
gsave
|
gsave
|
90 rotate 0.12 dup neg scale
|
90 rotate 0.12 dup neg scale
|
% dump string table
|
% dump string table
|
/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
|
/NP {newpath} def/SD {setdash} def/CL {setrgbcolor} def/GR {setgray} def
|
/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
|
/SX {exch LEdge sub XScale mul MaxLabelWidth add LMargin add LEdge LabelWidth sub add exch} def/CSX {exch dup LabelWidth gt {exch SX} {exch} ifelse} def
|
/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
|
/MT {SX moveto} def/LS {SX lineto stroke} def/LT {SX lineto} def/LFS {SX lineto fill stroke} def/RSS {rmoveto show stroke} def/ST {stroke} def/WT {CSX moveto dup stringwidth pop} def/TSW {pop 0 originOffset} def
|
/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
|
/TSE {MaxLabelWidth LabelWidth sub LMargin add 0 rmoveto neg originOffset} def/TS {-2 div originOffset CSX} def
|
/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
|
/MLW {stringwidth pop dup MaxLabelWidth gt {/MaxLabelWidth exch def}{pop} ifelse XS} def
|
/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
|
/XS {/XScale LabelWidth LMargin sub MaxLabelWidth LEdge LabelWidth sub add sub REdge LEdge sub div 1 add def} def
|
/ARC {5 -2 roll SX 5 2 roll arc} def
|
/ARC {5 -2 roll SX 5 2 roll arc} def
|
/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3103 def/REdge 5699 def/LabelWidth 3066 def
|
/XScale 1 def/MaxLabelWidth 0 def/LMargin 300 def/LEdge 3103 def/REdge 5699 def/LabelWidth 3066 def
|
/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
|
/Helvetica findfont [74 0 0 -74 0 0] makefont setfont
|
/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
|
/originOffset currentfont /FontBBox get 1 get currentfont /FontMatrix get 3 get mul neg def
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/alu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/alu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_taken) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/branch_taken) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/clk) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/clk) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/comp_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/comp_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_limm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_limm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/cust5_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/du_hwbkpt) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/du_hwbkpt) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/ex_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/except_illegal) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/except_illegal) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/flushpipe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/force_dslot_fetch) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_macrc_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/id_void) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/if_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/imm_signextend) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_addrofs) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/lsu_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/mac_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/multicycle) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/no_more_dslot) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/pre_branch_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addra) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrb) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_addrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rda) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rf_rdb) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfe) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rfwb_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/rst) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_a) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_b) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sel_imm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/shrot_op) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_syscall) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/sig_trap) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/simm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) MLW
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) MLW
|
% draw waveform shading
|
% draw waveform shading
|
[] 0 SD
|
[] 0 SD
|
2.995 setlinewidth
|
2.995 setlinewidth
|
0 setlinejoin
|
0 setlinejoin
|
0 setlinecap
|
0 setlinecap
|
0 0 0 CL
|
0 0 0 CL
|
3103 329 MT 3103 329 LT 6298 329 LT ST
|
3103 329 MT 3103 329 LT 6298 329 LT ST
|
3103 410 MT 3103 410 LT 6298 410 LT ST
|
3103 410 MT 3103 410 LT 6298 410 LT ST
|
(1800) 3117 370 WT pop 0 originOffset 37 add RSS
|
(1800) 3117 370 WT pop 0 originOffset 37 add RSS
|
3103 473 MT 3103 473 LT 3522 473 LT 3529 514 LT ST
|
3103 473 MT 3103 473 LT 3522 473 LT 3529 514 LT ST
|
3103 554 MT 3103 554 LT 3522 554 LT 3529 514 LT ST
|
3103 554 MT 3103 554 LT 3522 554 LT 3529 514 LT ST
|
(4) 3117 514 WT pop 0 originOffset 37 add RSS
|
(4) 3117 514 WT pop 0 originOffset 37 add RSS
|
3529 514 MT 3529 514 LT 3536 473 LT 3948 473 LT 3955 514 LT ST
|
3529 514 MT 3529 514 LT 3536 473 LT 3948 473 LT 3955 514 LT ST
|
3529 514 MT 3529 514 LT 3536 554 LT 3948 554 LT 3955 514 LT ST
|
3529 514 MT 3529 514 LT 3536 554 LT 3948 554 LT 3955 514 LT ST
|
(5) 3543 514 WT pop 0 originOffset 37 add RSS
|
(5) 3543 514 WT pop 0 originOffset 37 add RSS
|
3955 514 MT 3955 514 LT 3962 473 LT 4374 473 LT 4381 514 LT ST
|
3955 514 MT 3955 514 LT 3962 473 LT 4374 473 LT 4381 514 LT ST
|
3955 514 MT 3955 514 LT 3962 554 LT 4374 554 LT 4381 514 LT ST
|
3955 514 MT 3955 514 LT 3962 554 LT 4374 554 LT 4381 514 LT ST
|
(6) 3969 514 WT pop 0 originOffset 37 add RSS
|
(6) 3969 514 WT pop 0 originOffset 37 add RSS
|
4381 514 MT 4381 514 LT 4388 473 LT 4800 473 LT 4807 514 LT ST
|
4381 514 MT 4381 514 LT 4388 473 LT 4800 473 LT 4807 514 LT ST
|
4381 514 MT 4381 514 LT 4388 554 LT 4800 554 LT 4807 514 LT ST
|
4381 514 MT 4381 514 LT 4388 554 LT 4800 554 LT 4807 514 LT ST
|
(7) 4395 514 WT pop 0 originOffset 37 add RSS
|
(7) 4395 514 WT pop 0 originOffset 37 add RSS
|
4807 514 MT 4807 514 LT 4814 473 LT 5226 473 LT 5233 514 LT ST
|
4807 514 MT 4807 514 LT 4814 473 LT 5226 473 LT 5233 514 LT ST
|
4807 514 MT 4807 514 LT 4814 554 LT 5226 554 LT 5233 514 LT ST
|
4807 514 MT 4807 514 LT 4814 554 LT 5226 554 LT 5233 514 LT ST
|
(0) 4821 514 WT pop 0 originOffset 37 add RSS
|
(0) 4821 514 WT pop 0 originOffset 37 add RSS
|
5233 514 MT 5233 514 LT 5240 473 LT 5652 473 LT 5659 514 LT ST
|
5233 514 MT 5233 514 LT 5240 473 LT 5652 473 LT 5659 514 LT ST
|
5233 514 MT 5233 514 LT 5240 554 LT 5652 554 LT 5659 514 LT ST
|
5233 514 MT 5233 514 LT 5240 554 LT 5652 554 LT 5659 514 LT ST
|
(1) 5247 514 WT pop 0 originOffset 37 add RSS
|
(1) 5247 514 WT pop 0 originOffset 37 add RSS
|
5659 514 MT 5659 514 LT 5666 473 LT 6078 473 LT 6085 514 LT ST
|
5659 514 MT 5659 514 LT 5666 473 LT 6078 473 LT 6085 514 LT ST
|
5659 514 MT 5659 514 LT 5666 554 LT 6078 554 LT 6085 514 LT ST
|
5659 514 MT 5659 514 LT 5666 554 LT 6078 554 LT 6085 514 LT ST
|
(2) 5673 514 WT pop 0 originOffset 37 add RSS
|
(2) 5673 514 WT pop 0 originOffset 37 add RSS
|
6085 514 MT 6085 514 LT 6092 473 LT 6298 473 LT ST
|
6085 514 MT 6085 514 LT 6092 473 LT 6298 473 LT ST
|
6085 514 MT 6085 514 LT 6092 554 LT 6298 554 LT ST
|
6085 514 MT 6085 514 LT 6092 554 LT 6298 554 LT ST
|
(3) 6099 514 WT pop 0 originOffset 37 add RSS
|
(3) 6099 514 WT pop 0 originOffset 37 add RSS
|
3103 617 MT 3103 617 LT 3522 617 LT 3529 658 LT ST
|
3103 617 MT 3103 617 LT 3522 617 LT 3529 658 LT ST
|
3103 698 MT 3103 698 LT 3522 698 LT 3529 658 LT ST
|
3103 698 MT 3103 698 LT 3522 698 LT 3529 658 LT ST
|
(3) 3117 658 WT pop 0 originOffset 37 add RSS
|
(3) 3117 658 WT pop 0 originOffset 37 add RSS
|
3529 658 MT 3529 658 LT 3536 617 LT 3948 617 LT 3955 658 LT ST
|
3529 658 MT 3529 658 LT 3536 617 LT 3948 617 LT 3955 658 LT ST
|
3529 658 MT 3529 658 LT 3536 698 LT 3948 698 LT 3955 658 LT ST
|
3529 658 MT 3529 658 LT 3536 698 LT 3948 698 LT 3955 658 LT ST
|
(4) 3543 658 WT pop 0 originOffset 37 add RSS
|
(4) 3543 658 WT pop 0 originOffset 37 add RSS
|
3955 658 MT 3955 658 LT 3962 617 LT 4374 617 LT 4381 658 LT ST
|
3955 658 MT 3955 658 LT 3962 617 LT 4374 617 LT 4381 658 LT ST
|
3955 658 MT 3955 658 LT 3962 698 LT 4374 698 LT 4381 658 LT ST
|
3955 658 MT 3955 658 LT 3962 698 LT 4374 698 LT 4381 658 LT ST
|
(5) 3969 658 WT pop 0 originOffset 37 add RSS
|
(5) 3969 658 WT pop 0 originOffset 37 add RSS
|
4381 658 MT 4381 658 LT 4388 617 LT 4800 617 LT 4807 658 LT ST
|
4381 658 MT 4381 658 LT 4388 617 LT 4800 617 LT 4807 658 LT ST
|
4381 658 MT 4381 658 LT 4388 698 LT 4800 698 LT 4807 658 LT ST
|
4381 658 MT 4381 658 LT 4388 698 LT 4800 698 LT 4807 658 LT ST
|
(6) 4395 658 WT pop 0 originOffset 37 add RSS
|
(6) 4395 658 WT pop 0 originOffset 37 add RSS
|
4807 658 MT 4807 658 LT 4814 617 LT 5226 617 LT 5233 658 LT ST
|
4807 658 MT 4807 658 LT 4814 617 LT 5226 617 LT 5233 658 LT ST
|
4807 658 MT 4807 658 LT 4814 698 LT 5226 698 LT 5233 658 LT ST
|
4807 658 MT 4807 658 LT 4814 698 LT 5226 698 LT 5233 658 LT ST
|
(7) 4821 658 WT pop 0 originOffset 37 add RSS
|
(7) 4821 658 WT pop 0 originOffset 37 add RSS
|
5233 658 MT 5233 658 LT 5240 617 LT 5652 617 LT 5659 658 LT ST
|
5233 658 MT 5233 658 LT 5240 617 LT 5652 617 LT 5659 658 LT ST
|
5233 658 MT 5233 658 LT 5240 698 LT 5652 698 LT 5659 658 LT ST
|
5233 658 MT 5233 658 LT 5240 698 LT 5652 698 LT 5659 658 LT ST
|
(0) 5247 658 WT pop 0 originOffset 37 add RSS
|
(0) 5247 658 WT pop 0 originOffset 37 add RSS
|
5659 658 MT 5659 658 LT 5666 617 LT 6078 617 LT 6085 658 LT ST
|
5659 658 MT 5659 658 LT 5666 617 LT 6078 617 LT 6085 658 LT ST
|
5659 658 MT 5659 658 LT 5666 698 LT 6078 698 LT 6085 658 LT ST
|
5659 658 MT 5659 658 LT 5666 698 LT 6078 698 LT 6085 658 LT ST
|
(1) 5673 658 WT pop 0 originOffset 37 add RSS
|
(1) 5673 658 WT pop 0 originOffset 37 add RSS
|
6085 658 MT 6085 658 LT 6092 617 LT 6298 617 LT ST
|
6085 658 MT 6085 658 LT 6092 617 LT 6298 617 LT ST
|
6085 658 MT 6085 658 LT 6092 698 LT 6298 698 LT ST
|
6085 658 MT 6085 658 LT 6092 698 LT 6298 698 LT ST
|
(2) 6099 658 WT pop 0 originOffset 37 add RSS
|
(2) 6099 658 WT pop 0 originOffset 37 add RSS
|
3103 842 MT 6298 842 LS
|
3103 842 MT 6298 842 LS
|
3103 905 MT 3103 905 LT 6298 905 LT ST
|
3103 905 MT 3103 905 LT 6298 905 LT ST
|
3103 986 MT 3103 986 LT 6298 986 LT ST
|
3103 986 MT 3103 986 LT 6298 986 LT ST
|
(14610000) 3117 946 WT pop 0 originOffset 37 add RSS
|
(14610000) 3117 946 WT pop 0 originOffset 37 add RSS
|
3103 1049 MT 3103 1049 LT 6298 1049 LT ST
|
3103 1049 MT 3103 1049 LT 6298 1049 LT ST
|
3103 1130 MT 3103 1130 LT 6298 1130 LT ST
|
3103 1130 MT 3103 1130 LT 6298 1130 LT ST
|
(03) 3117 1090 WT pop 0 originOffset 37 add RSS
|
(03) 3117 1090 WT pop 0 originOffset 37 add RSS
|
3103 1274 MT 6298 1274 LS
|
3103 1274 MT 6298 1274 LS
|
% draw timeline
|
% draw timeline
|
3145 4533 MT 3145 4570 LS
|
3145 4533 MT 3145 4570 LS
|
3187 4533 MT 3187 4570 LS
|
3187 4533 MT 3187 4570 LS
|
3230 4533 MT 3230 4570 LS
|
3230 4533 MT 3230 4570 LS
|
3272 4533 MT 3272 4570 LS
|
3272 4533 MT 3272 4570 LS
|
3359 4533 MT 3359 4570 LS
|
3359 4533 MT 3359 4570 LS
|
3401 4533 MT 3401 4570 LS
|
3401 4533 MT 3401 4570 LS
|
3444 4533 MT 3444 4570 LS
|
3444 4533 MT 3444 4570 LS
|
3486 4533 MT 3486 4570 LS
|
3486 4533 MT 3486 4570 LS
|
3529 4533 MT 3529 4570 LS
|
3529 4533 MT 3529 4570 LS
|
3572 4533 MT 3572 4570 LS
|
3572 4533 MT 3572 4570 LS
|
3614 4533 MT 3614 4570 LS
|
3614 4533 MT 3614 4570 LS
|
3657 4533 MT 3657 4570 LS
|
3657 4533 MT 3657 4570 LS
|
3699 4533 MT 3699 4570 LS
|
3699 4533 MT 3699 4570 LS
|
3316 4506 MT 3316 4570 LS
|
3316 4506 MT 3316 4570 LS
|
3785 4533 MT 3785 4570 LS
|
3785 4533 MT 3785 4570 LS
|
3827 4533 MT 3827 4570 LS
|
3827 4533 MT 3827 4570 LS
|
3870 4533 MT 3870 4570 LS
|
3870 4533 MT 3870 4570 LS
|
3912 4533 MT 3912 4570 LS
|
3912 4533 MT 3912 4570 LS
|
3955 4533 MT 3955 4570 LS
|
3955 4533 MT 3955 4570 LS
|
3998 4533 MT 3998 4570 LS
|
3998 4533 MT 3998 4570 LS
|
4040 4533 MT 4040 4570 LS
|
4040 4533 MT 4040 4570 LS
|
4083 4533 MT 4083 4570 LS
|
4083 4533 MT 4083 4570 LS
|
4125 4533 MT 4125 4570 LS
|
4125 4533 MT 4125 4570 LS
|
3742 4506 MT 3742 4570 LS
|
3742 4506 MT 3742 4570 LS
|
(240) 3742 4649 WT TS RSS
|
(240) 3742 4649 WT TS RSS
|
4211 4533 MT 4211 4570 LS
|
4211 4533 MT 4211 4570 LS
|
4253 4533 MT 4253 4570 LS
|
4253 4533 MT 4253 4570 LS
|
4296 4533 MT 4296 4570 LS
|
4296 4533 MT 4296 4570 LS
|
4338 4533 MT 4338 4570 LS
|
4338 4533 MT 4338 4570 LS
|
4381 4533 MT 4381 4570 LS
|
4381 4533 MT 4381 4570 LS
|
4424 4533 MT 4424 4570 LS
|
4424 4533 MT 4424 4570 LS
|
4466 4533 MT 4466 4570 LS
|
4466 4533 MT 4466 4570 LS
|
4509 4533 MT 4509 4570 LS
|
4509 4533 MT 4509 4570 LS
|
4551 4533 MT 4551 4570 LS
|
4551 4533 MT 4551 4570 LS
|
4168 4506 MT 4168 4570 LS
|
4168 4506 MT 4168 4570 LS
|
4637 4533 MT 4637 4570 LS
|
4637 4533 MT 4637 4570 LS
|
4679 4533 MT 4679 4570 LS
|
4679 4533 MT 4679 4570 LS
|
4722 4533 MT 4722 4570 LS
|
4722 4533 MT 4722 4570 LS
|
4764 4533 MT 4764 4570 LS
|
4764 4533 MT 4764 4570 LS
|
4807 4533 MT 4807 4570 LS
|
4807 4533 MT 4807 4570 LS
|
4850 4533 MT 4850 4570 LS
|
4850 4533 MT 4850 4570 LS
|
4892 4533 MT 4892 4570 LS
|
4892 4533 MT 4892 4570 LS
|
4935 4533 MT 4935 4570 LS
|
4935 4533 MT 4935 4570 LS
|
4977 4533 MT 4977 4570 LS
|
4977 4533 MT 4977 4570 LS
|
4594 4506 MT 4594 4570 LS
|
4594 4506 MT 4594 4570 LS
|
(260) 4594 4649 WT TS RSS
|
(260) 4594 4649 WT TS RSS
|
5063 4533 MT 5063 4570 LS
|
5063 4533 MT 5063 4570 LS
|
5105 4533 MT 5105 4570 LS
|
5105 4533 MT 5105 4570 LS
|
5148 4533 MT 5148 4570 LS
|
5148 4533 MT 5148 4570 LS
|
5190 4533 MT 5190 4570 LS
|
5190 4533 MT 5190 4570 LS
|
5233 4533 MT 5233 4570 LS
|
5233 4533 MT 5233 4570 LS
|
5276 4533 MT 5276 4570 LS
|
5276 4533 MT 5276 4570 LS
|
5318 4533 MT 5318 4570 LS
|
5318 4533 MT 5318 4570 LS
|
5361 4533 MT 5361 4570 LS
|
5361 4533 MT 5361 4570 LS
|
5403 4533 MT 5403 4570 LS
|
5403 4533 MT 5403 4570 LS
|
5020 4506 MT 5020 4570 LS
|
5020 4506 MT 5020 4570 LS
|
5489 4533 MT 5489 4570 LS
|
5489 4533 MT 5489 4570 LS
|
5531 4533 MT 5531 4570 LS
|
5531 4533 MT 5531 4570 LS
|
5574 4533 MT 5574 4570 LS
|
5574 4533 MT 5574 4570 LS
|
5616 4533 MT 5616 4570 LS
|
5616 4533 MT 5616 4570 LS
|
5659 4533 MT 5659 4570 LS
|
5659 4533 MT 5659 4570 LS
|
5702 4533 MT 5702 4570 LS
|
5702 4533 MT 5702 4570 LS
|
5744 4533 MT 5744 4570 LS
|
5744 4533 MT 5744 4570 LS
|
5787 4533 MT 5787 4570 LS
|
5787 4533 MT 5787 4570 LS
|
5829 4533 MT 5829 4570 LS
|
5829 4533 MT 5829 4570 LS
|
5446 4506 MT 5446 4570 LS
|
5446 4506 MT 5446 4570 LS
|
(280) 5446 4649 WT TS RSS
|
(280) 5446 4649 WT TS RSS
|
5915 4533 MT 5915 4570 LS
|
5915 4533 MT 5915 4570 LS
|
5957 4533 MT 5957 4570 LS
|
5957 4533 MT 5957 4570 LS
|
6000 4533 MT 6000 4570 LS
|
6000 4533 MT 6000 4570 LS
|
6042 4533 MT 6042 4570 LS
|
6042 4533 MT 6042 4570 LS
|
6085 4533 MT 6085 4570 LS
|
6085 4533 MT 6085 4570 LS
|
6128 4533 MT 6128 4570 LS
|
6128 4533 MT 6128 4570 LS
|
6170 4533 MT 6170 4570 LS
|
6170 4533 MT 6170 4570 LS
|
6213 4533 MT 6213 4570 LS
|
6213 4533 MT 6213 4570 LS
|
6255 4533 MT 6255 4570 LS
|
6255 4533 MT 6255 4570 LS
|
5872 4506 MT 5872 4570 LS
|
5872 4506 MT 5872 4570 LS
|
6341 4533 MT 6341 4570 LS
|
6341 4533 MT 6341 4570 LS
|
6383 4533 MT 6383 4570 LS
|
6383 4533 MT 6383 4570 LS
|
6426 4533 MT 6426 4570 LS
|
6426 4533 MT 6426 4570 LS
|
6468 4533 MT 6468 4570 LS
|
6468 4533 MT 6468 4570 LS
|
6511 4533 MT 6511 4570 LS
|
6511 4533 MT 6511 4570 LS
|
6554 4533 MT 6554 4570 LS
|
6554 4533 MT 6554 4570 LS
|
6596 4533 MT 6596 4570 LS
|
6596 4533 MT 6596 4570 LS
|
6639 4533 MT 6639 4570 LS
|
6639 4533 MT 6639 4570 LS
|
6681 4533 MT 6681 4570 LS
|
6681 4533 MT 6681 4570 LS
|
6298 4506 MT 6298 4570 LS
|
6298 4506 MT 6298 4570 LS
|
(300) 6298 4649 WT TS RSS
|
(300) 6298 4649 WT TS RSS
|
% draw grid
|
% draw grid
|
3316 300 MT 3316 4506 LS
|
3316 300 MT 3316 4506 LS
|
3742 300 MT 3742 4506 LS
|
3742 300 MT 3742 4506 LS
|
4168 300 MT 4168 4506 LS
|
4168 300 MT 4168 4506 LS
|
4594 300 MT 4594 4506 LS
|
4594 300 MT 4594 4506 LS
|
5020 300 MT 5020 4506 LS
|
5020 300 MT 5020 4506 LS
|
5446 300 MT 5446 4506 LS
|
5446 300 MT 5446 4506 LS
|
5872 300 MT 5872 4506 LS
|
5872 300 MT 5872 4506 LS
|
6298 300 MT 6298 4506 LS
|
6298 300 MT 6298 4506 LS
|
% draw waveforms
|
% draw waveforms
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) 3066 409 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/spr_addrimm) 3066 409 WT TSE RSS
|
3309 300 MT 3323 300 LS
|
3309 300 MT 3323 300 LS
|
3735 300 MT 3749 300 LS
|
3735 300 MT 3749 300 LS
|
4161 300 MT 4175 300 LS
|
4161 300 MT 4175 300 LS
|
4587 300 MT 4601 300 LS
|
4587 300 MT 4601 300 LS
|
5013 300 MT 5027 300 LS
|
5013 300 MT 5027 300 LS
|
5439 300 MT 5453 300 LS
|
5439 300 MT 5453 300 LS
|
5865 300 MT 5879 300 LS
|
5865 300 MT 5879 300 LS
|
6291 300 MT 6305 300 LS
|
6291 300 MT 6305 300 LS
|
3103 329 MT 3103 329 LT 6298 329 LT ST
|
3103 329 MT 3103 329 LT 6298 329 LT ST
|
3103 410 MT 3103 410 LT 6298 410 LT ST
|
3103 410 MT 3103 410 LT 6298 410 LT ST
|
(1800) 3117 370 WT pop 0 originOffset 37 add RSS
|
(1800) 3117 370 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) 3066 553 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_in) 3066 553 WT TSE RSS
|
3309 444 MT 3323 444 LS
|
3309 444 MT 3323 444 LS
|
3735 444 MT 3749 444 LS
|
3735 444 MT 3749 444 LS
|
4161 444 MT 4175 444 LS
|
4161 444 MT 4175 444 LS
|
4587 444 MT 4601 444 LS
|
4587 444 MT 4601 444 LS
|
5013 444 MT 5027 444 LS
|
5013 444 MT 5027 444 LS
|
5439 444 MT 5453 444 LS
|
5439 444 MT 5453 444 LS
|
5865 444 MT 5879 444 LS
|
5865 444 MT 5879 444 LS
|
6291 444 MT 6305 444 LS
|
6291 444 MT 6305 444 LS
|
3103 473 MT 3103 473 LT 3522 473 LT 3529 514 LT ST
|
3103 473 MT 3103 473 LT 3522 473 LT 3529 514 LT ST
|
3103 554 MT 3103 554 LT 3522 554 LT 3529 514 LT ST
|
3103 554 MT 3103 554 LT 3522 554 LT 3529 514 LT ST
|
(4) 3117 514 WT pop 0 originOffset 37 add RSS
|
(4) 3117 514 WT pop 0 originOffset 37 add RSS
|
3529 514 MT 3529 514 LT 3536 473 LT 3948 473 LT 3955 514 LT ST
|
3529 514 MT 3529 514 LT 3536 473 LT 3948 473 LT 3955 514 LT ST
|
3529 514 MT 3529 514 LT 3536 554 LT 3948 554 LT 3955 514 LT ST
|
3529 514 MT 3529 514 LT 3536 554 LT 3948 554 LT 3955 514 LT ST
|
(5) 3543 514 WT pop 0 originOffset 37 add RSS
|
(5) 3543 514 WT pop 0 originOffset 37 add RSS
|
3955 514 MT 3955 514 LT 3962 473 LT 4374 473 LT 4381 514 LT ST
|
3955 514 MT 3955 514 LT 3962 473 LT 4374 473 LT 4381 514 LT ST
|
3955 514 MT 3955 514 LT 3962 554 LT 4374 554 LT 4381 514 LT ST
|
3955 514 MT 3955 514 LT 3962 554 LT 4374 554 LT 4381 514 LT ST
|
(6) 3969 514 WT pop 0 originOffset 37 add RSS
|
(6) 3969 514 WT pop 0 originOffset 37 add RSS
|
4381 514 MT 4381 514 LT 4388 473 LT 4800 473 LT 4807 514 LT ST
|
4381 514 MT 4381 514 LT 4388 473 LT 4800 473 LT 4807 514 LT ST
|
4381 514 MT 4381 514 LT 4388 554 LT 4800 554 LT 4807 514 LT ST
|
4381 514 MT 4381 514 LT 4388 554 LT 4800 554 LT 4807 514 LT ST
|
(7) 4395 514 WT pop 0 originOffset 37 add RSS
|
(7) 4395 514 WT pop 0 originOffset 37 add RSS
|
4807 514 MT 4807 514 LT 4814 473 LT 5226 473 LT 5233 514 LT ST
|
4807 514 MT 4807 514 LT 4814 473 LT 5226 473 LT 5233 514 LT ST
|
4807 514 MT 4807 514 LT 4814 554 LT 5226 554 LT 5233 514 LT ST
|
4807 514 MT 4807 514 LT 4814 554 LT 5226 554 LT 5233 514 LT ST
|
(0) 4821 514 WT pop 0 originOffset 37 add RSS
|
(0) 4821 514 WT pop 0 originOffset 37 add RSS
|
5233 514 MT 5233 514 LT 5240 473 LT 5652 473 LT 5659 514 LT ST
|
5233 514 MT 5233 514 LT 5240 473 LT 5652 473 LT 5659 514 LT ST
|
5233 514 MT 5233 514 LT 5240 554 LT 5652 554 LT 5659 514 LT ST
|
5233 514 MT 5233 514 LT 5240 554 LT 5652 554 LT 5659 514 LT ST
|
(1) 5247 514 WT pop 0 originOffset 37 add RSS
|
(1) 5247 514 WT pop 0 originOffset 37 add RSS
|
5659 514 MT 5659 514 LT 5666 473 LT 6078 473 LT 6085 514 LT ST
|
5659 514 MT 5659 514 LT 5666 473 LT 6078 473 LT 6085 514 LT ST
|
5659 514 MT 5659 514 LT 5666 554 LT 6078 554 LT 6085 514 LT ST
|
5659 514 MT 5659 514 LT 5666 554 LT 6078 554 LT 6085 514 LT ST
|
(2) 5673 514 WT pop 0 originOffset 37 add RSS
|
(2) 5673 514 WT pop 0 originOffset 37 add RSS
|
6085 514 MT 6085 514 LT 6092 473 LT 6298 473 LT ST
|
6085 514 MT 6085 514 LT 6092 473 LT 6298 473 LT ST
|
6085 514 MT 6085 514 LT 6092 554 LT 6298 554 LT ST
|
6085 514 MT 6085 514 LT 6092 554 LT 6298 554 LT ST
|
(3) 6099 514 WT pop 0 originOffset 37 add RSS
|
(3) 6099 514 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) 3066 697 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/thread_out) 3066 697 WT TSE RSS
|
3309 588 MT 3323 588 LS
|
3309 588 MT 3323 588 LS
|
3735 588 MT 3749 588 LS
|
3735 588 MT 3749 588 LS
|
4161 588 MT 4175 588 LS
|
4161 588 MT 4175 588 LS
|
4587 588 MT 4601 588 LS
|
4587 588 MT 4601 588 LS
|
5013 588 MT 5027 588 LS
|
5013 588 MT 5027 588 LS
|
5439 588 MT 5453 588 LS
|
5439 588 MT 5453 588 LS
|
5865 588 MT 5879 588 LS
|
5865 588 MT 5879 588 LS
|
6291 588 MT 6305 588 LS
|
6291 588 MT 6305 588 LS
|
3103 617 MT 3103 617 LT 3522 617 LT 3529 658 LT ST
|
3103 617 MT 3103 617 LT 3522 617 LT 3529 658 LT ST
|
3103 698 MT 3103 698 LT 3522 698 LT 3529 658 LT ST
|
3103 698 MT 3103 698 LT 3522 698 LT 3529 658 LT ST
|
(3) 3117 658 WT pop 0 originOffset 37 add RSS
|
(3) 3117 658 WT pop 0 originOffset 37 add RSS
|
3529 658 MT 3529 658 LT 3536 617 LT 3948 617 LT 3955 658 LT ST
|
3529 658 MT 3529 658 LT 3536 617 LT 3948 617 LT 3955 658 LT ST
|
3529 658 MT 3529 658 LT 3536 698 LT 3948 698 LT 3955 658 LT ST
|
3529 658 MT 3529 658 LT 3536 698 LT 3948 698 LT 3955 658 LT ST
|
(4) 3543 658 WT pop 0 originOffset 37 add RSS
|
(4) 3543 658 WT pop 0 originOffset 37 add RSS
|
3955 658 MT 3955 658 LT 3962 617 LT 4374 617 LT 4381 658 LT ST
|
3955 658 MT 3955 658 LT 3962 617 LT 4374 617 LT 4381 658 LT ST
|
3955 658 MT 3955 658 LT 3962 698 LT 4374 698 LT 4381 658 LT ST
|
3955 658 MT 3955 658 LT 3962 698 LT 4374 698 LT 4381 658 LT ST
|
(5) 3969 658 WT pop 0 originOffset 37 add RSS
|
(5) 3969 658 WT pop 0 originOffset 37 add RSS
|
4381 658 MT 4381 658 LT 4388 617 LT 4800 617 LT 4807 658 LT ST
|
4381 658 MT 4381 658 LT 4388 617 LT 4800 617 LT 4807 658 LT ST
|
4381 658 MT 4381 658 LT 4388 698 LT 4800 698 LT 4807 658 LT ST
|
4381 658 MT 4381 658 LT 4388 698 LT 4800 698 LT 4807 658 LT ST
|
(6) 4395 658 WT pop 0 originOffset 37 add RSS
|
(6) 4395 658 WT pop 0 originOffset 37 add RSS
|
4807 658 MT 4807 658 LT 4814 617 LT 5226 617 LT 5233 658 LT ST
|
4807 658 MT 4807 658 LT 4814 617 LT 5226 617 LT 5233 658 LT ST
|
4807 658 MT 4807 658 LT 4814 698 LT 5226 698 LT 5233 658 LT ST
|
4807 658 MT 4807 658 LT 4814 698 LT 5226 698 LT 5233 658 LT ST
|
(7) 4821 658 WT pop 0 originOffset 37 add RSS
|
(7) 4821 658 WT pop 0 originOffset 37 add RSS
|
5233 658 MT 5233 658 LT 5240 617 LT 5652 617 LT 5659 658 LT ST
|
5233 658 MT 5233 658 LT 5240 617 LT 5652 617 LT 5659 658 LT ST
|
5233 658 MT 5233 658 LT 5240 698 LT 5652 698 LT 5659 658 LT ST
|
5233 658 MT 5233 658 LT 5240 698 LT 5652 698 LT 5659 658 LT ST
|
(0) 5247 658 WT pop 0 originOffset 37 add RSS
|
(0) 5247 658 WT pop 0 originOffset 37 add RSS
|
5659 658 MT 5659 658 LT 5666 617 LT 6078 617 LT 6085 658 LT ST
|
5659 658 MT 5659 658 LT 5666 617 LT 6078 617 LT 6085 658 LT ST
|
5659 658 MT 5659 658 LT 5666 698 LT 6078 698 LT 6085 658 LT ST
|
5659 658 MT 5659 658 LT 5666 698 LT 6078 698 LT 6085 658 LT ST
|
(1) 5673 658 WT pop 0 originOffset 37 add RSS
|
(1) 5673 658 WT pop 0 originOffset 37 add RSS
|
6085 658 MT 6085 658 LT 6092 617 LT 6298 617 LT ST
|
6085 658 MT 6085 658 LT 6092 617 LT 6298 617 LT ST
|
6085 658 MT 6085 658 LT 6092 698 LT 6298 698 LT ST
|
6085 658 MT 6085 658 LT 6092 698 LT 6298 698 LT ST
|
(2) 6099 658 WT pop 0 originOffset 37 add RSS
|
(2) 6099 658 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) 3066 841 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_freeze) 3066 841 WT TSE RSS
|
3309 732 MT 3323 732 LS
|
3309 732 MT 3323 732 LS
|
3735 732 MT 3749 732 LS
|
3735 732 MT 3749 732 LS
|
4161 732 MT 4175 732 LS
|
4161 732 MT 4175 732 LS
|
4587 732 MT 4601 732 LS
|
4587 732 MT 4601 732 LS
|
5013 732 MT 5027 732 LS
|
5013 732 MT 5027 732 LS
|
5439 732 MT 5453 732 LS
|
5439 732 MT 5453 732 LS
|
5865 732 MT 5879 732 LS
|
5865 732 MT 5879 732 LS
|
6291 732 MT 6305 732 LS
|
6291 732 MT 6305 732 LS
|
3103 842 MT 6298 842 LS
|
3103 842 MT 6298 842 LS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) 3066 985 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_insn) 3066 985 WT TSE RSS
|
3309 876 MT 3323 876 LS
|
3309 876 MT 3323 876 LS
|
3735 876 MT 3749 876 LS
|
3735 876 MT 3749 876 LS
|
4161 876 MT 4175 876 LS
|
4161 876 MT 4175 876 LS
|
4587 876 MT 4601 876 LS
|
4587 876 MT 4601 876 LS
|
5013 876 MT 5027 876 LS
|
5013 876 MT 5027 876 LS
|
5439 876 MT 5453 876 LS
|
5439 876 MT 5453 876 LS
|
5865 876 MT 5879 876 LS
|
5865 876 MT 5879 876 LS
|
6291 876 MT 6305 876 LS
|
6291 876 MT 6305 876 LS
|
3103 905 MT 3103 905 LT 6298 905 LT ST
|
3103 905 MT 3103 905 LT 6298 905 LT ST
|
3103 986 MT 3103 986 LT 6298 986 LT ST
|
3103 986 MT 3103 986 LT 6298 986 LT ST
|
(14610000) 3117 946 WT pop 0 originOffset 37 add RSS
|
(14610000) 3117 946 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) 3066 1129 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wb_rfaddrw) 3066 1129 WT TSE RSS
|
3309 1020 MT 3323 1020 LS
|
3309 1020 MT 3323 1020 LS
|
3735 1020 MT 3749 1020 LS
|
3735 1020 MT 3749 1020 LS
|
4161 1020 MT 4175 1020 LS
|
4161 1020 MT 4175 1020 LS
|
4587 1020 MT 4601 1020 LS
|
4587 1020 MT 4601 1020 LS
|
5013 1020 MT 5027 1020 LS
|
5013 1020 MT 5027 1020 LS
|
5439 1020 MT 5453 1020 LS
|
5439 1020 MT 5453 1020 LS
|
5865 1020 MT 5879 1020 LS
|
5865 1020 MT 5879 1020 LS
|
6291 1020 MT 6305 1020 LS
|
6291 1020 MT 6305 1020 LS
|
3103 1049 MT 3103 1049 LT 6298 1049 LT ST
|
3103 1049 MT 3103 1049 LT 6298 1049 LT ST
|
3103 1130 MT 3103 1130 LT 6298 1130 LT ST
|
3103 1130 MT 3103 1130 LT 6298 1130 LT ST
|
(03) 3117 1090 WT pop 0 originOffset 37 add RSS
|
(03) 3117 1090 WT pop 0 originOffset 37 add RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) 3066 1273 WT TSE RSS
|
(/tb_or1200_cpu/or1200_cpu/or1200_ctrl2/wbforw_valid) 3066 1273 WT TSE RSS
|
3309 1164 MT 3323 1164 LS
|
3309 1164 MT 3323 1164 LS
|
3735 1164 MT 3749 1164 LS
|
3735 1164 MT 3749 1164 LS
|
4161 1164 MT 4175 1164 LS
|
4161 1164 MT 4175 1164 LS
|
4587 1164 MT 4601 1164 LS
|
4587 1164 MT 4601 1164 LS
|
5013 1164 MT 5027 1164 LS
|
5013 1164 MT 5027 1164 LS
|
5439 1164 MT 5453 1164 LS
|
5439 1164 MT 5453 1164 LS
|
5865 1164 MT 5879 1164 LS
|
5865 1164 MT 5879 1164 LS
|
6291 1164 MT 6305 1164 LS
|
6291 1164 MT 6305 1164 LS
|
3103 1274 MT 6298 1274 LS
|
3103 1274 MT 6298 1274 LS
|
% draw footer
|
% draw footer
|
(Entity:tb_or1200_cpu Architecture: Date: Sat Aug 14 00:33:37 EDT 2004 Row: 4 Page: 8) 300 4799 WT TSW RSS
|
(Entity:tb_or1200_cpu Architecture: Date: Sat Aug 14 00:33:37 EDT 2004 Row: 4 Page: 8) 300 4799 WT TSW RSS
|
grestore
|
grestore
|
showpage
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showpage
|
%%EOF
|
%%EOF
|
|
|
