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\addcontentsline{toc}{section}{References}
\addcontentsline{toc}{section}{References}
\begin{thebibliography}{9}
\begin{thebibliography}{9}
 
 
%Introduction
%Introduction
\bibitem{Wikipedia_protocol}
\bibitem{Wikipedia_protocol}
        Wikipedia,
        Wikipedia,
        \textit{"Communication protocol"}
        \textit{"Communication protocol"}
        [On-line] Available:
        [On-line] Available:
        \url{https://en.wikipedia.org/wiki/Communication_protocol} [Apr. 03, 2018]
        \url{https://en.wikipedia.org/wiki/Communication_protocol} [Apr. 03, 2018]
 
 
\bibitem{CERN}
\bibitem{CERN}
        CERN official website,
        CERN official website,
        \textit{"Acceleration science"}
        \textit{"Acceleration science"}
        [On-line] Available:
        [On-line] Available:
        \url{http://cern.ch} [Apr. 03, 2018]
        \url{http://cern.ch} [Apr. 03, 2018]
 
 
%Structure of communication protocols
%Structure of communication protocols
\bibitem{OSImodel}
\bibitem{OSImodel}
        Tech-faq,
        Tech-faq,
        \textit{"The OSI Model - What It Is; Why It Matters; Why It Doesn't Matter."}
        \textit{"The OSI Model - What It Is; Why It Matters; Why It Doesn't Matter."}
        [On-line] Available:
        [On-line] Available:
        \url{http://www.tech-faq.com/osi-model.html} [Mar. 27, 2018]
        \url{http://www.tech-faq.com/osi-model.html} [Mar. 27, 2018]
 
 
\bibitem{EthernetPHY}
\bibitem{EthernetPHY}
        Truechip,
        Truechip,
        \textit{"Exploring Forward Error Correction Trends in Ethernet"}
        \textit{"Exploring Forward Error Correction Trends in Ethernet"}
        [On-line] Available:
        [On-line] Available:
        \url{http://www.truechip.net/articles-details/exploring-forward-error-correction-trends-in-ethernet/1909580257} [Mar. 28, 2018]
        \url{http://www.truechip.net/articles-details/exploring-forward-error-correction-trends-in-ethernet/1909580257} [Mar. 28, 2018]
 
 
\bibitem{OSI_IP/TCP/UDP}
\bibitem{OSI_IP/TCP/UDP}
        Amar Shekar,
        Amar Shekar,
        \textit{"OSI Model And 7 Layers Of OSI Model Explained"}
        \textit{"OSI Model And 7 Layers Of OSI Model Explained"}
        [On-line] Available:
        [On-line] Available:
        \url{https://fossbytes.com/osi-model-7-layers-osi-model-explained/7} [Apr. 19, 2018]
        \url{https://fossbytes.com/osi-model-7-layers-osi-model-explained/7} [Apr. 19, 2018]
 
 
\bibitem{Framing}
\bibitem{Framing}
        Eli Bendersky,
        Eli Bendersky,
        \textit{"Framing in serial communications"}
        \textit{"Framing in serial communications"}
        [on-line]. Available:\\
        [on-line]. Available:\\
        \url{https://eli.thegreenplace.net/2009/08/12/framing-in-serial-communications/} [Feb. 14, 2018]
        \url{https://eli.thegreenplace.net/2009/08/12/framing-in-serial-communications/} [Feb. 14, 2018]
 
 
\bibitem{InterlakenProtocol}
\bibitem{InterlakenProtocol}
        Cortina Systems Inc. and Cisco Systems Inc.
        Cortina Systems Inc. and Cisco Systems Inc.
        \textit{"Interlaken     Protocol Definition"}
        \textit{"Interlaken     Protocol Definition"}
        [On-line] Available:
        [On-line] Available:
        \url{http://www.interlakenalliance.com/Interlaken_Protocol_Definition_v1.2.pdf} [Feb. 09, 2018]
        \url{http://www.interlakenalliance.com/Interlaken_Protocol_Definition_v1.2.pdf} [Feb. 09, 2018]
 
 
\bibitem{SerialLiteIII_MainPage}
\bibitem{SerialLiteIII_MainPage}
        Altera,
        Altera,
        \textit{"Intel® FPGA SerialLite III Streaming IP"}
        \textit{"Intel® FPGA SerialLite III Streaming IP"}
        [on-line] Available:
        [on-line] Available:
        \url{https://www.altera.com/products/intellectual-property/ip/interface-protocols/m-alt-seriallite3.html} [Mar. 29, 2018]
        \url{https://www.altera.com/products/intellectual-property/ip/interface-protocols/m-alt-seriallite3.html} [Mar. 29, 2018]
 
 
\bibitem{CRCLB}
\bibitem{CRCLB}
        Lammert Bies,
        Lammert Bies,
        \textit{"Introduction to CRC calculation"}
        \textit{"Introduction to CRC calculation"}
        [On-line] Available:
        [On-line] Available:
        \url{https://www.lammertbies.nl/comm/info/crc-calculation.html} [Feb. 08, 2018]
        \url{https://www.lammertbies.nl/comm/info/crc-calculation.html} [Feb. 08, 2018]
 
 
\bibitem{CRC1}
\bibitem{CRC1}
        Joleen Charles,
        Joleen Charles,
        \textit{"Cyclic Redundancy Check CRC Chapter 4"}
        \textit{"Cyclic Redundancy Check CRC Chapter 4"}
        [On-line] Available:
        [On-line] Available:
        \url{http://slideplayer.com/slide/8190698/} [Feb. 14, 2018]
        \url{http://slideplayer.com/slide/8190698/} [Feb. 14, 2018]
 
 
\bibitem{turbocode}
\bibitem{turbocode}
        Dr. Sylvie Kerouédan, Dr. Claude Berrou,
        Dr. Sylvie Kerouédan, Dr. Claude Berrou,
        \textit{"Turbo code"}
        \textit{"Turbo code"}
        [On-line] Available:
        [On-line] Available:
        \url{http://www.scholarpedia.org/article/Turbo_code} [Feb. 14, 2018]
        \url{http://www.scholarpedia.org/article/Turbo_code} [Feb. 14, 2018]
 
 
\bibitem{Gearbox}
\bibitem{Gearbox}
        Louis E. Frenzel,
        Louis E. Frenzel,
        \textit{"Gearbox operations"}
        \textit{"Gearbox operations"}
        [On-line] Available:
        [On-line] Available:
        \url{https://books.google.nl/books?id=wnGDBAAAQBAJ}  P.26 [Feb. 12, 2018]
        \url{https://books.google.nl/books?id=wnGDBAAAQBAJ}  P.26 [Feb. 12, 2018]
 
 
%Requirements
%Requirements
\bibitem{FlowControl}
\bibitem{FlowControl}
        TutorialsPoint,
        TutorialsPoint,
        \textit{"Flow Control"}
        \textit{"Flow Control"}
        [On-line] Available:
        [On-line] Available:
        \url{https://www.tutorialspoint.com/data_communication_computer_network/data_link_control_and_protocols.htm} [Mar. 29, 2018]
        \url{https://www.tutorialspoint.com/data_communication_computer_network/data_link_control_and_protocols.htm} [Mar. 29, 2018]
 
 
\bibitem{Bonding_Image}
\bibitem{Bonding_Image}
        Sunsik Roh,
        Sunsik Roh,
        \textit{"Design of Out-of-Band Protocols to Transmit UHDTV Contents in the CATV Network"}
        \textit{"Design of Out-of-Band Protocols to Transmit UHDTV Contents in the CATV Network"}
        [On-line] Available:
        [On-line] Available:
        \url{http://file.scirp.org/Html/3-9701557_19481.htm} [Feb. 14, 2018]
        \url{http://file.scirp.org/Html/3-9701557_19481.htm} [Feb. 14, 2018]
 
 
\bibitem{Bonding_Altera}
\bibitem{Bonding_Altera}
        Altera,
        Altera,
        \textit{"Using FPGA-Based Channel Bonding for HDTV Over DSL"}
        \textit{"Using FPGA-Based Channel Bonding for HDTV Over DSL"}
        [On-line] Available:
        [On-line] Available:
        \url{https://www.altera.co.jp/content/dam/altera-www/global/en_US/pdfs/literature/wp/wp-01053-using-fpga-based-channel-bonding-for-hdtv-over-dsl.pdf} [Mar. 21, 2018]
        \url{https://www.altera.co.jp/content/dam/altera-www/global/en_US/pdfs/literature/wp/wp-01053-using-fpga-based-channel-bonding-for-hdtv-over-dsl.pdf} [Mar. 21, 2018]
 
 
%Encoding references
%Encoding references
\bibitem{8b10b}
\bibitem{8b10b}
        Knowledge Transfer,
        Knowledge Transfer,
        \textit{"8b/10b encoding"}
        \textit{"8b/10b encoding"}
        [On-line] Available:
        [On-line] Available:
        \url{www.knowledgetransfer.net/dictionary/Storage/en/8b10b_encoding.htm} [Feb. 15, 2018]
        \url{www.knowledgetransfer.net/dictionary/Storage/en/8b10b_encoding.htm} [Feb. 15, 2018]
 
 
\bibitem{scrambler}
\bibitem{scrambler}
        M. Moussavi. (5 dec. 2011)
        M. Moussavi. (5 dec. 2011)
        \textit{"Data Communication and Networking: A Practical Approach"}
        \textit{"Data Communication and Networking: A Practical Approach"}
        [on-line]. Available: \url{https://books.google.nl/books?id=gX8KAAAAQBAJ}. [Feb. 07, 2018]
        [on-line]. Available: \url{https://books.google.nl/books?id=gX8KAAAAQBAJ}. [Feb. 07, 2018]
        Cengage Learning, 5 dec. 2011
        Cengage Learning, 5 dec. 2011
 
 
\bibitem{NIcoding}
\bibitem{NIcoding}
        National Instruments.
        National Instruments.
        \textit{"High-Speed Serial Explained"}
        \textit{"High-Speed Serial Explained"}
        [On-line] Available: \url{ftp://ftp.ni.com/evaluation/HighSpeedSerial_WP_Final.pdf} [Feb. 07, 2018]
        [On-line] Available: \url{ftp://ftp.ni.com/evaluation/HighSpeedSerial_WP_Final.pdf} [Feb. 07, 2018]
 
 
\bibitem{6466header}
\bibitem{6466header}
        Marek Hajduczenia,
        Marek Hajduczenia,
        \textit{"64b/66b line code"}
        \textit{"64b/66b line code"}
        [On-line] Available:
        [On-line] Available:
        \url{http://www.ieee802.org/3/bn/public/mar13/hajduczenia_3bn_04_0313.pdf} [Feb. 16, 2018]
        \url{http://www.ieee802.org/3/bn/public/mar13/hajduczenia_3bn_04_0313.pdf} [Feb. 16, 2018]
 
 
\bibitem{PCIE}
\bibitem{PCIE}
  Intel.
  Intel.
  \textit{PHY Interface for the PCI Express, SATA, USB 3.1, DisplayPort and Converged IO Architectures}
  \textit{PHY Interface for the PCI Express, SATA, USB 3.1, DisplayPort and Converged IO Architectures}
  [On-line] Available: \url{https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/phy-interface-pci-express-sata-usb30-architectures-3.1.pdf} P.124 [Feb. 07, 2018]
  [On-line] Available: \url{https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/phy-interface-pci-express-sata-usb30-architectures-3.1.pdf} P.124 [Feb. 07, 2018]
 
 
\bibitem{USB3.1}
\bibitem{USB3.1}
  Synopsys.
  Synopsys.
  \textit{"USB 3.1: Physical, Link, and Protocol Layer Changes"}
  \textit{"USB 3.1: Physical, Link, and Protocol Layer Changes"}
  [On-line] Available: \url{https://www.synopsys.com/designware-ip/technical-bulletin/protocol-layer-changes.html} [Feb. 07, 2018]
  [On-line] Available: \url{https://www.synopsys.com/designware-ip/technical-bulletin/protocol-layer-changes.html} [Feb. 07, 2018]
 
 
\bibitem{256b/257b}
\bibitem{256b/257b}
        Roy Cideciyan (IBM),
        Roy Cideciyan (IBM),
        \textit{"256b/257b Transcoding for 100 Gb/s Backplane and Copper Cable"}
        \textit{"256b/257b Transcoding for 100 Gb/s Backplane and Copper Cable"}
        [On-line] Available:
        [On-line] Available:
        \url{http://www.ieee802.org/3/100GNGOPTX/public/mar12/interim/cideciyan_01_0312_NG100GOPTX.pdf} [Feb. 16, 2018]
        \url{http://www.ieee802.org/3/100GNGOPTX/public/mar12/interim/cideciyan_01_0312_NG100GOPTX.pdf} [Feb. 16, 2018]
 
 
\bibitem{FibreChannel_Encoding}
\bibitem{FibreChannel_Encoding}
        Craig W. Carlson, QLogic Corporation,
        Craig W. Carlson, QLogic Corporation,
        \textit{"Gen 6 FibreChannel     What You Need to Know "}
        \textit{"Gen 6 FibreChannel     What You Need to Know "}
        [On-line] Available:
        [On-line] Available:
        \url{http://www.snia.org/sites/default/orig/DSI2014/presentations/StorPlumb/CraigCarlson_Gen_6_Fibre_Channel_v02.pdf} (Slide 14) [Mar. 29, 2018]
        \url{http://www.snia.org/sites/default/orig/DSI2014/presentations/StorPlumb/CraigCarlson_Gen_6_Fibre_Channel_v02.pdf} (Slide 14) [Mar. 29, 2018]
 
 
%Vendor dependant protocols
%Vendor dependant protocols
\bibitem{Aurora_64B66B_MainPage}
\bibitem{Aurora_64B66B_MainPage}
        Xilinx.
        Xilinx.
        \textit{"Aurora 64B/66B"}
        \textit{"Aurora 64B/66B"}
        [on-line] Available:
        [on-line] Available:
        \url{https://www.xilinx.com/products/intellectual-property/aurora64b66b.html} [Feb. 13, 2018]
        \url{https://www.xilinx.com/products/intellectual-property/aurora64b66b.html} [Feb. 13, 2018]
 
 
\bibitem{Aurora_8B10B_MainPage}
\bibitem{Aurora_8B10B_MainPage}
        Xilinx.
        Xilinx.
        \textit{"Aurora 8B/10B"}
        \textit{"Aurora 8B/10B"}
        [on-line] Available:
        [on-line] Available:
        \url{https://www.xilinx.com/products/intellectual-property/aurora8b10b.html} [Mar. 29, 2018]
        \url{https://www.xilinx.com/products/intellectual-property/aurora8b10b.html} [Mar. 29, 2018]
 
 
\bibitem{Aurora_64B66B_IpCore}
\bibitem{Aurora_64B66B_IpCore}
        Xilinx,
        Xilinx,
        \textit{"Aurora 64B/66B v11.2 LogiCORE IP Product Guide"}
        \textit{"Aurora 64B/66B v11.2 LogiCORE IP Product Guide"}
        [on-line] Available:
        [on-line] Available:
        \url{https://www.xilinx.com/support/documentation/ip_documentation/aurora_64b66b/v11_2/pg074-aurora-64b66b.pdf} [Feb. 13, 2018]
        \url{https://www.xilinx.com/support/documentation/ip_documentation/aurora_64b66b/v11_2/pg074-aurora-64b66b.pdf} [Feb. 13, 2018]
 
 
\bibitem{SerialLiteIII_IpCore}
\bibitem{SerialLiteIII_IpCore}
        Altera,
        Altera,
        \textit{"Intel FPGA SerialLite III Streaming IP Core User Guide"}
        \textit{"Intel FPGA SerialLite III Streaming IP Core User Guide"}
        [on-line] Available:
        [on-line] Available:
        \url{https://www.altera.com/documentation/jbz1470383208039.html} [Feb. 16, 2018]
        \url{https://www.altera.com/documentation/jbz1470383208039.html} [Feb. 16, 2018]
 
 
\bibitem{LiteFast_IpCore}
\bibitem{LiteFast_IpCore}
        MicroSemi,
        MicroSemi,
        \textit{"UG0701 User Guide LiteFast IP"}
        \textit{"UG0701 User Guide LiteFast IP"}
        [on-line] Available:
        [on-line] Available:
        \url{https://www.microsemi.com/document-portal/doc_view/135971-ug0701-litefast-ip-user-guide} [Apr. 23, 2018]
        \url{https://www.microsemi.com/document-portal/doc_view/135971-ug0701-litefast-ip-user-guide} [Apr. 23, 2018]
%Standards references
%Standards references
        \bibitem{SPI4.2}
        \bibitem{SPI4.2}
        eInfochips Ltd.
        eInfochips Ltd.
        \textit{"System Packet Interface (SPI) 4.2 IP Core"}
        \textit{"System Packet Interface (SPI) 4.2 IP Core"}
        [On-line] Available:
        [On-line] Available:
        \url{https://www.design-reuse.com/articles/18135/system-packet-interface-spi-4-2-ip-core.html} [Feb. 21, 2018]
        \url{https://www.design-reuse.com/articles/18135/system-packet-interface-spi-4-2-ip-core.html} [Feb. 21, 2018]
 
 
 
 
 
 
\bibitem{InterlakenRS}
\bibitem{InterlakenRS}
        Cortina Systems Inc. and Cisco Systems Inc.
        Cortina Systems Inc. and Cisco Systems Inc.
        \textit{"Interlaken     Reed-Solomon Forward Error Correction Extension Protocol Definition"}
        \textit{"Interlaken     Reed-Solomon Forward Error Correction Extension Protocol Definition"}
        [On-line] Available:
        [On-line] Available:
        \url{http://www.interlakenalliance.com/extension_v1.pdf}, Dec. 2016, [Feb. 09, 2018]
        \url{http://www.interlakenalliance.com/extension_v1.pdf}, Dec. 2016, [Feb. 09, 2018]
 
 
\bibitem{XilinxInterlaken}
\bibitem{XilinxInterlaken}
        Xilinx.
        Xilinx.
        \textit{"Integrated Interlaken 150G v2.0 LogiCORE IP Product Guide"}
        \textit{"Integrated Interlaken 150G v2.0 LogiCORE IP Product Guide"}
        [On-line] Available:
        [On-line] Available:
        \url{https://www.xilinx.com/support/documentation/ip_documentation/interlaken/v2_0/pg169-interlaken.pdf} [Feb. 09, 2018]
        \url{https://www.xilinx.com/support/documentation/ip_documentation/interlaken/v2_0/pg169-interlaken.pdf} [Feb. 09, 2018]
 
 
\bibitem{AlteraInterlaken}
\bibitem{AlteraInterlaken}
        Altera.
        Altera.
        \textit{"Interlaken IP Core (2nd Generation) User Guide"}
        \textit{"Interlaken IP Core (2nd Generation) User Guide"}
        [On-line] Available:
        [On-line] Available:
        \url{https://www.altera.com/documentation/dsu1465510510715.html} [Feb. 09, 2018]
        \url{https://www.altera.com/documentation/dsu1465510510715.html} [Feb. 09, 2018]
 
 
\bibitem{SATA_Specifications}
\bibitem{SATA_Specifications}
        Serial ATA International Organization,
        Serial ATA International Organization,
        \textit{"Serial ATA International Organization: Serial ATA Revision 3.0 "}
        \textit{"Serial ATA International Organization: Serial ATA Revision 3.0 "}
        [On-line] Available:
        [On-line] Available:
        \url{http://www.lttconn.com/res/lttconn/pdres/201005/20100521170123066.pdf} [Apr. 09, 2018]
        \url{http://www.lttconn.com/res/lttconn/pdres/201005/20100521170123066.pdf} [Apr. 09, 2018]
 
 
\bibitem{SATATech}
\bibitem{SATATech}
        Donovan (Don) Anderson
        Donovan (Don) Anderson
        \textit{"SATA Storage Technology"}
        \textit{"SATA Storage Technology"}
        [On-line] Available:
        [On-line] Available:
        \url{https://www.mindshare.com/files/ebooks/SATA%20Storage%20Technology.pdf} [Feb. 09, 2018]
        \url{https://www.mindshare.com/files/ebooks/SATA%20Storage%20Technology.pdf} [Feb. 09, 2018]
 
 
\bibitem{SATA_E}
\bibitem{SATA_E}
        Serial ATA International Organization.
        Serial ATA International Organization.
        \textit{SATA Express Specification from SATA-IO in Ratification}
        \textit{SATA Express Specification from SATA-IO in Ratification}
        [On-line] Available:
        [On-line] Available:
        \url{https://sata-io.org/sites/default/files/documents/SATA%20Express%20In%20Ratification_Final_Website.pdf} [Feb. 12, 2018]
        \url{https://sata-io.org/sites/default/files/documents/SATA%20Express%20In%20Ratification_Final_Website.pdf} [Feb. 12, 2018]
 
 
\bibitem{SATA_E2}
\bibitem{SATA_E2}
        Dave Landsman, Sandisk
        Dave Landsman, Sandisk
        \textit{AHCI and NVMe as Interfaces for SATA Express™ Devices - Overview}
        \textit{AHCI and NVMe as Interfaces for SATA Express™ Devices - Overview}
        [On-line] Available:
        [On-line] Available:
        \url{https://sata-io.org/sites/default/files/images/NVMe_and_AHCI_as_SATA_Express_Interface_Options_Overview_final.pdf} [Feb. 12, 2018]
        \url{https://sata-io.org/sites/default/files/images/NVMe_and_AHCI_as_SATA_Express_Interface_Options_Overview_final.pdf} [Feb. 12, 2018]
 
 
\bibitem{CPRI_Specification}
\bibitem{CPRI_Specification}
         Ericsson AB, Huawei Technologies Co. Ltd, NEC Corporation, Alcatel Lucent, and Nokia Networks.
         Ericsson AB, Huawei Technologies Co. Ltd, NEC Corporation, Alcatel Lucent, and Nokia Networks.
        \textit{"CPRI Specification V7.0"}
        \textit{"CPRI Specification V7.0"}
        [On-line] Available:
        [On-line] Available:
        \url{http://www.cpri.info/downloads/CPRI_v_7_0_2015-10-09.pdf} [Feb. 21, 2018]
        \url{http://www.cpri.info/downloads/CPRI_v_7_0_2015-10-09.pdf} [Feb. 21, 2018]
 
 
\bibitem{HyperTransport_Specifications}
\bibitem{HyperTransport_Specifications}
         HyperTransport Technology Consortium.
         HyperTransport Technology Consortium.
         \textit{"HyperTransport™ I/O Link Specification Revision 3.10c"}
         \textit{"HyperTransport™ I/O Link Specification Revision 3.10c"}
         [On-line] Available:
         [On-line] Available:
         \url{https://docs.wixstatic.com/ugd/071cb6_53b2dc066f2d4408b5c9368dc447e2f5.pdf} [Feb. 21, 2018]
         \url{https://docs.wixstatic.com/ugd/071cb6_53b2dc066f2d4408b5c9368dc447e2f5.pdf} [Feb. 21, 2018]
 
 
\bibitem{HTpic}
\bibitem{HTpic}
        HT consortium.
        HT consortium.
        \textit{"HyperTransport Link Specifications"}
        \textit{"HyperTransport Link Specifications"}
        [On-line] Available:
        [On-line] Available:
        \url{https://www.hypertransport.org/ht-link-specifications} [Feb. 08, 2018]
        \url{https://www.hypertransport.org/ht-link-specifications} [Feb. 08, 2018]
 
 
\bibitem{HTIP}
\bibitem{HTIP}
        David Slogsnat, Alexander Giese, Mondrian Nüssle, Ulrich Brüning.
        David Slogsnat, Alexander Giese, Mondrian Nüssle, Ulrich Brüning.
        \textit{"An open-source HyperTransport IP-Core"}
        \textit{"An open-source HyperTransport IP-Core"}
        [On-line] Available:
        [On-line] Available:
        \url{https://docs.wixstatic.com/ugd/071cb6_1d4e8365b49f4d9f8eab9b1e611ea60e.pdf} [Feb. 08, 2018]
        \url{https://docs.wixstatic.com/ugd/071cb6_1d4e8365b49f4d9f8eab9b1e611ea60e.pdf} [Feb. 08, 2018]
 
 
\bibitem{HT3IP}
\bibitem{HT3IP}
        Heiner Litz, Holger Froening, Ulrich Bruening,
        Heiner Litz, Holger Froening, Ulrich Bruening,
        \textit{"A HyperTransport 3 Physical Layer Interface for FPGAs"}
        \textit{"A HyperTransport 3 Physical Layer Interface for FPGAs"}
        [On-line] Available:
        [On-line] Available:
        \url{https://people.ucsc.edu/~hlitz/papers/ht3phy.pdf} [Feb. 08, 2018]
        \url{https://people.ucsc.edu/~hlitz/papers/ht3phy.pdf} [Feb. 08, 2018]
 
 
\bibitem{FC}
\bibitem{FC}
        Fibre Channel Industry Association (FCIA),
        Fibre Channel Industry Association (FCIA),
        \textit{"State of the Fibre Channel Industry"}
        \textit{"State of the Fibre Channel Industry"}
        [On-line] Available:
        [On-line] Available:
        \url{http://fibrechannel.org/wp-content/uploads/2015/10/FCIA_Sol_Guide_2010_Final_v2.pdf} [Feb. 12, 2018]
        \url{http://fibrechannel.org/wp-content/uploads/2015/10/FCIA_Sol_Guide_2010_Final_v2.pdf} [Feb. 12, 2018]
 
 
\bibitem{FC64}
\bibitem{FC64}
        Adrian Butter,
        Adrian Butter,
        \textit{"64GFC PCS/FEC Architecture Proposal for FC-FS-5"}
        \textit{"64GFC PCS/FEC Architecture Proposal for FC-FS-5"}
        [On-line] Available:
        [On-line] Available:
        \url{https://standards.incits.org/apps/group_public/download.php/82006/T11-2016-314v5.pdf} [Feb. 12, 2018]
        \url{https://standards.incits.org/apps/group_public/download.php/82006/T11-2016-314v5.pdf} [Feb. 12, 2018]
 
 
\bibitem{FC_Xilinx}
\bibitem{FC_Xilinx}
        Xilinx,
        Xilinx,
        \textit{"LogiCORE™ IP Fibre Channel User Guide v3.5"}
        \textit{"LogiCORE™ IP Fibre Channel User Guide v3.5"}
        [On-line] \\ Available:
        [On-line] \\ Available:
        \url{https://www.xilinx.com/support/documentation/ip_documentation/fibre_channel_ug136.pdf} [Feb. 12, 2018]
        \url{https://www.xilinx.com/support/documentation/ip_documentation/fibre_channel_ug136.pdf} [Feb. 12, 2018]
 
 
\bibitem{FC_Xilinx32G}
\bibitem{FC_Xilinx32G}
        Xilinx,
        Xilinx,
        \textit{"32G Fibre Channel (32GFC) RS-FEC v1.0"}
        \textit{"32G Fibre Channel (32GFC) RS-FEC v1.0"}
        [On-line] Available:
        [On-line] Available:
        \url{https://www.xilinx.com/support/documentation/ip_documentation/fc32_rs_fec/v1_0/pb048-fibre-channel-32gfc-rs-fec.pdf} [Feb. 12, 2018]
        \url{https://www.xilinx.com/support/documentation/ip_documentation/fc32_rs_fec/v1_0/pb048-fibre-channel-32gfc-rs-fec.pdf} [Feb. 12, 2018]
 
 
\bibitem{XAUI_10gea}
\bibitem{XAUI_10gea}
        10 Gigabit Ethernet Alliance (10gea),
        10 Gigabit Ethernet Alliance (10gea),
        \textit{"XAUI interface"}
        \textit{"XAUI interface"}
        [On-line] Available:
        [On-line] Available:
        \url{https://www.10gea.org/whitepapers/xaui-interface/} [Feb. 12, 2018]
        \url{https://www.10gea.org/whitepapers/xaui-interface/} [Feb. 12, 2018]
 
 
\bibitem{XAUI_AT}
\bibitem{XAUI_AT}
        Agilent Technologies,
        Agilent Technologies,
        \textit{"10 Gigabit Ethernet and the XAUI interface"}
        \textit{"10 Gigabit Ethernet and the XAUI interface"}
        [On-line] Available:
        [On-line] Available:
        \url{http://literature.cdn.keysight.com/litweb/pdf/5988-5509EN.pdf} [Feb. 12, 2018]
        \url{http://literature.cdn.keysight.com/litweb/pdf/5988-5509EN.pdf} [Feb. 12, 2018]
 
 
\bibitem{HiGig}
\bibitem{HiGig}
        Altera/IntelFPGA,
        Altera/IntelFPGA,
        \textit{"HiGig / HiGig+ / HiGig 2"}
        \textit{"HiGig / HiGig+ / HiGig 2"}
        [On-line] Available:
        [On-line] Available:
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        \url{https://www.altera.com/solutions/technology/transceiver/protocols/pro-higig.html} [Feb. 16, 2018]
 
 
%The Interlaken Protocol
%The Interlaken Protocol
\bibitem{InterlakenAlliance}
\bibitem{InterlakenAlliance}
        Interlaken Alliance,
        Interlaken Alliance,
        \textit{"Interlaken Alliance"}
        \textit{"Interlaken Alliance"}
        [On-line] Available:
        [On-line] Available:
        \url{http://interlakenalliance.com/} [Mar. 29, 2018]
        \url{http://interlakenalliance.com/} [Mar. 29, 2018]
 
 
\bibitem{InterlakenRecommendations}
\bibitem{InterlakenRecommendations}
        Interlaken Alliance,
        Interlaken Alliance,
        \textit{"Interlaken Interoperability Recommendations"}
        \textit{"Interlaken Interoperability Recommendations"}
        [On-line] Available:
        [On-line] Available:
        \url{http://www.interlakenalliance.com/interlaken-interoperability-recommendations-v1.10.pdf} [Apr. 03, 2018]
        \url{http://www.interlakenalliance.com/interlaken-interoperability-recommendations-v1.10.pdf} [Apr. 03, 2018]
 
 
%Traditional CERN Protocols
%Traditional CERN Protocols
\bibitem{S-Link}
\bibitem{S-Link}
        Erik van der Bij,
        Erik van der Bij,
        \textit{"S-Link Overview"}
        \textit{"S-Link Overview"}
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        [On-line] Available:
        \url{http://hsi.web.cern.ch/HSI/s-link/introduc/overview.htm} [Feb. 08, 2018]
        \url{http://hsi.web.cern.ch/HSI/s-link/introduc/overview.htm} [Feb. 08, 2018]
 
 
\bibitem{GBT_Frame}
\bibitem{GBT_Frame}
        CERN,
        CERN,
        \textit{"GBT ASIC presentation"}
        \textit{"GBT ASIC presentation"}
        [On-line] Available:
        [On-line] Available:
        \url{https://indico.cern.ch/event/49682/contributions/1175873/attachments/961783/1365381/2009_09_25_Implementing_the_GBT_data_transmission_protocol_in_FPGAs.pdf} [Feb. 08, 2018]
        \url{https://indico.cern.ch/event/49682/contributions/1175873/attachments/961783/1365381/2009_09_25_Implementing_the_GBT_data_transmission_protocol_in_FPGAs.pdf} [Feb. 08, 2018]
 
 
 
 
%Hardware part
%Hardware part
\bibitem{Virtex-7}
\bibitem{Virtex-7}
        Xilinx.
        Xilinx.
        \textit{"7 Series FPGAs Data Sheet: Overview"}
        \textit{"7 Series FPGAs Data Sheet: Overview"}
        [On-line] Available:
        [On-line] Available:
        \url{https://www.xilinx.com/support/documentation/data_sheets/ds180_7Series_Overview.pdf} [Feb. 19, 2018]
        \url{https://www.xilinx.com/support/documentation/data_sheets/ds180_7Series_Overview.pdf} [Feb. 19, 2018]
 
 
\bibitem{VC707}
\bibitem{VC707}
        Xilinx.
        Xilinx.
        \textit{"VC707 Evaluation Board for the Virtex-7 FPGA - User Guide"}
        \textit{"VC707 Evaluation Board for the Virtex-7 FPGA - User Guide"}
        [On-line] Available:
        [On-line] Available:
        \url{https://www.xilinx.com/support/documentation/boards_and_kits/vc707/ug885_VC707_Eval_Bd.pdf} [Feb. 19, 2018]
        \url{https://www.xilinx.com/support/documentation/boards_and_kits/vc707/ug885_VC707_Eval_Bd.pdf} [Feb. 19, 2018]
 
 
\bibitem{GTXT}
\bibitem{GTXT}
        Xilinx.
        Xilinx.
        \textit{"7 Series FPGAs GTX/GTH Transceivers - User Guide"}
        \textit{"7 Series FPGAs GTX/GTH Transceivers - User Guide"}
        [On-line] Available:
        [On-line] Available:
        \url{https://www.xilinx.com/support/documentation/user_guides/ug476_7Series_Transceivers.pdf} [Feb. 19, 2018]
        \url{https://www.xilinx.com/support/documentation/user_guides/ug476_7Series_Transceivers.pdf} [Feb. 19, 2018]
 
 
\bibitem{CRC32}
\bibitem{CRC32}
        Mathlab.
        Mathlab.
        \textit{"CRC-N Generator"}
        \textit{"CRC-N Generator"}
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        [On-line] Available:
        \url{https://nl.mathworks.com/help/comm/ref/crcngenerator.html} [Feb. 21, 2018]
        \url{https://nl.mathworks.com/help/comm/ref/crcngenerator.html} [Feb. 21, 2018]
 
 
\bibitem{CRCpaper}
\bibitem{CRCpaper}
        Evgeni Stavinov.
        Evgeni Stavinov.
        \textit{"A Practical Parallel CRC Generation Method"}
        \textit{"A Practical Parallel CRC Generation Method"}
        [On-line] Available:
        [On-line] Available:
        \url{http://outputlogic.com/my-stuff/circuit-cellar-january-2010-crc.pdf} [Feb. 22, 2018]
        \url{http://outputlogic.com/my-stuff/circuit-cellar-january-2010-crc.pdf} [Feb. 22, 2018]
 
 
\bibitem{CRCgen}
\bibitem{CRCgen}
        Evgeni Stavinov.
        Evgeni Stavinov.
        \textit{"CRC Generator"}
        \textit{"CRC Generator"}
        [On-line] Available:
        [On-line] Available:
        \url{http://outputlogic.com/?page_id=321} [Feb. 22, 2018]
        \url{http://outputlogic.com/?page_id=321} [Feb. 22, 2018]
 
 
\bibitem{Scramblergen}
\bibitem{Scramblergen}
        Evgeni Stavinov.
        Evgeni Stavinov.
        \textit{"Scrambler Generator"}
        \textit{"Scrambler Generator"}
        [On-line] Available:
        [On-line] Available:
        \url{http://outputlogic.com/?page_id=205} [Feb. 23, 2018]
        \url{http://outputlogic.com/?page_id=205} [Feb. 23, 2018]
 
 
 
\bibitem{VC707_Schematic}
 
        Xilinx.
 
        \textit{"VC707 EVALUATION PLATFORM HW-V7-VC707 (XC7VX485T-FF1761)"}
 
        [On-Line] Available:
 
        \url{https://www.xilinx.com/support/documentation/boards_and_kits/vc707_Schematic_xtp135_rev1_0.pdf} [Feb. 19, 2018]
 
 
\end{thebibliography}
\end{thebibliography}
 
 

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