//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// Low Pass Filter FIR IP Core ////
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//// Low Pass Filter FIR IP Core ////
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//// ////
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//// ////
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//// This file is part of the LPFFIR project ////
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//// This file is part of the LPFFIR project ////
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//// https://opencores.org/projects/lpffir ////
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//// https://opencores.org/projects/lpffir ////
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//// ////
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//// ////
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//// Description ////
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//// Description ////
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//// Implementation of LPFFIR IP core according to ////
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//// Implementation of LPFFIR IP core according to ////
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//// LPFFIR IP core specification document. ////
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//// LPFFIR IP core specification document. ////
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//// ////
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//// ////
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//// To Do: ////
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//// To Do: ////
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//// - ////
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//// - ////
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//// ////
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//// ////
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//// Author: ////
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//// Author: ////
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//// - Vladimir Armstrong, vladimirarmstrong@opencores.org ////
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//// - Vladimir Armstrong, vladimirarmstrong@opencores.org ////
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//// ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// Copyright (C) 2019 Authors and OPENCORES.ORG ////
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//// Copyright (C) 2019 Authors and OPENCORES.ORG ////
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//// ////
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//// ////
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//// This source file may be used and distributed without ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
|
//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer. ////
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//// the original copyright notice and the associated disclaimer. ////
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//// ////
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//// ////
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//// This source file is free software; you can redistribute it ////
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//// This source file is free software; you can redistribute it ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// Public License as published by the Free Software Foundation; ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any ////
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//// either version 2.1 of the License, or (at your option) any ////
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//// later version. ////
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//// later version. ////
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//// ////
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//// ////
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//// This source is distributed in the hope that it will be ////
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//// This source is distributed in the hope that it will be ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// PURPOSE. See the GNU Lesser General Public License for more ////
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//// PURPOSE. See the GNU Lesser General Public License for more ////
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//// details. ////
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//// details. ////
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//// ////
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//// ////
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//// You should have received a copy of the GNU Lesser General ////
|
//// You should have received a copy of the GNU Lesser General ////
|
//// Public License along with this source; if not, download it ////
|
//// Public License along with this source; if not, download it ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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// SystemC Test Bench
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// SystemC Test Bench
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#include "systemc.h"
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#include "systemc.h"
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#include "verilated_vcd_sc.h"
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#include "verilated_vcd_sc.h"
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#include "Vbench.h"
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#include "Vbench.h"
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#define TRACE
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#define TRACE
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int sc_main(int argc, char * argv[])
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int sc_main(int argc, char * argv[])
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{
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{
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#ifdef TRACE
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#ifdef TRACE
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// Verilator trace file
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// Verilator trace file
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Verilated::traceEverOn(true);
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Verilated::traceEverOn(true);
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VerilatedVcdSc* tfp = new VerilatedVcdSc;
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VerilatedVcdSc* tfp = new VerilatedVcdSc;
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#endif
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#endif
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sc_time T(10,SC_NS);
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sc_time T(10,SC_NS);
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sc_time Tsim = T * 15 ;
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sc_time Tsim = T * 15 ;
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sc_clock clk("clk",T);
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sc_clock clk("clk",T);
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sc_signal<bool> rst("rst");
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sc_signal<bool> rstn("rstn");
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Vbench uut("top");
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Vbench uut("top");
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uut.clk (clk);
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uut.clk (clk);
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uut.rst(rst);
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uut.rstn(rstn);
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|
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#ifdef TRACE
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#ifdef TRACE
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// Verilator trace file, depth
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// Verilator trace file, depth
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uut.trace(tfp, 10);
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uut.trace(tfp, 10);
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tfp->open("simu.vcd");
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tfp->open("simu.vcd");
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#endif
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#endif
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|
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rst = 1;
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rstn = 0;
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sc_start(10*T);
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sc_start(10*T);
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rst = 0;
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rstn = 1;
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sc_start(Tsim);
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sc_start(Tsim);
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|
|
#ifdef TRACE
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#ifdef TRACE
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tfp->close();
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tfp->close();
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#endif
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#endif
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return 0;
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return 0;
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}
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}
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