| Line 65... |
Line 65... |
);
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);
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end neo430_imem;
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end neo430_imem;
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architecture neo430_imem_rtl of neo430_imem is
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architecture neo430_imem_rtl of neo430_imem is
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-- advanced configuration ------------------------------------------------------------------------------------
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constant spram_sleep_mode_en_c : boolean := false; -- put IMEM into sleep mode when idle (for low power)
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-- -------------------------------------------------------------------------------------------------------
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-- ROM types --
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-- ROM types --
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type imem_file8_t is array (0 to IMEM_SIZE/2-1) of std_ulogic_vector(07 downto 0);
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type imem_file8_t is array (0 to IMEM_SIZE/2-1) of std_ulogic_vector(07 downto 0);
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-- init function and split 1x16-bit memory into 2x8-bit memories --
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-- init function and split 1x16-bit memory into 2x8-bit memories --
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impure function init_imem(hilo : std_ulogic; init : application_init_image_t) return imem_file8_t is
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impure function init_imem(hilo : std_ulogic; init : application_init_image_t) return imem_file8_t is
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| Line 84... |
Line 88... |
return mem_v;
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return mem_v;
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end function init_imem;
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end function init_imem;
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-- local signals --
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-- local signals --
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signal acc_en : std_ulogic;
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signal acc_en : std_ulogic;
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signal mem_cs : std_ulogic;
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signal rdata : std_ulogic_vector(15 downto 0);
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signal rdata : std_ulogic_vector(15 downto 0);
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signal rden : std_ulogic;
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signal rden : std_ulogic;
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signal mem_sel : std_ulogic;
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signal addr : integer;
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signal addr : integer;
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-- internal "RAM" type - implemented if bootloader is used and IMEM is RAM and initialized with app code --
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-- internal "RAM" type - implemented if bootloader is used and IMEM is RAM and initialized with app code --
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signal imem_file_init_ram_l : imem_file8_t := init_imem('0', application_init_image);
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signal imem_file_init_ram_l : imem_file8_t := init_imem('0', application_init_image);
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signal imem_file_init_ram_h : imem_file8_t := init_imem('1', application_init_image);
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signal imem_file_init_ram_h : imem_file8_t := init_imem('1', application_init_image);
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| Line 118... |
Line 124... |
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-- SPRAM signals --
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-- SPRAM signals --
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signal spram_clk : std_logic;
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signal spram_clk : std_logic;
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signal spram_addr : std_logic_vector(13 downto 0);
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signal spram_addr : std_logic_vector(13 downto 0);
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signal spram_di : std_logic_vector(15 downto 0);
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signal spram_di : std_logic_vector(15 downto 0);
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signal spram_do : std_logic_vector(15 downto 0);
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signal spram_do_lo : std_logic_vector(15 downto 0);
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signal spram_do_hi : std_logic_vector(15 downto 0);
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signal spram_be : std_logic_vector(03 downto 0);
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signal spram_be : std_logic_vector(03 downto 0);
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signal spram_we : std_logic;
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signal spram_we : std_logic;
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signal spram_pwr_n : std_logic;
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signal spram_cs : std_logic_vector(01 downto 0);
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begin
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begin
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-- Access Control -----------------------------------------------------------
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-- Access Control -----------------------------------------------------------
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-- -----------------------------------------------------------------------------
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-- -----------------------------------------------------------------------------
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acc_en <= '1' when (addr_i >= imem_base_c) and (addr_i < std_ulogic_vector(unsigned(imem_base_c) + IMEM_SIZE)) else '0';
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acc_en <= '1' when (addr_i >= imem_base_c) and (addr_i < std_ulogic_vector(unsigned(imem_base_c) + IMEM_SIZE)) else '0';
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addr <= to_integer(unsigned(addr_i(index_size_f(IMEM_SIZE/2) downto 1))); -- word aligned
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addr <= to_integer(unsigned(addr_i(index_size_f(IMEM_SIZE/2) downto 1))); -- word aligned
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mem_cs <= acc_en and (rden_i or wren_i(1) or wren_i(0));
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-- Memory Access ------------------------------------------------------------
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-- Memory Access ------------------------------------------------------------
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-- -----------------------------------------------------------------------------
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-- -----------------------------------------------------------------------------
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imem_spram_lo_inst : SP256K
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imem_spram_lo_inst : SP256K
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port map (
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port map (
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AD => spram_addr, -- I
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AD => spram_addr, -- I
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DI => spram_di, -- I
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DI => spram_di, -- I
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MASKWE => spram_be, -- I
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MASKWE => spram_be, -- I
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WE => spram_we, -- I
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WE => spram_we, -- I
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CS => '1', -- I
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CS => spram_cs(0), -- I
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CK => spram_clk, -- I
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STDBY => '0', -- I
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SLEEP => spram_pwr_n, -- I
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PWROFF_N => '1', -- I
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DO => spram_do_lo -- O
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);
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-- instantiate second SPRAM if IMEM size > 32kB --
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imem_spram_hi_bank:
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if (IMEM_SIZE > 32*1024) generate
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imem_spram_hi_inst : SP256K
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port map (
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AD => spram_addr, -- I
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DI => spram_di, -- I
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MASKWE => spram_be, -- I
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WE => spram_we, -- I
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CS => spram_cs(1), -- I
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CK => spram_clk, -- I
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CK => spram_clk, -- I
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STDBY => '0', -- I
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STDBY => '0', -- I
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SLEEP => '0', -- I
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SLEEP => spram_pwr_n, -- I
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PWROFF_N => '1', -- I
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PWROFF_N => '1', -- I
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DO => spram_do -- O
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DO => spram_do_hi -- O
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);
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);
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end generate;
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-- signal type conversion --
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-- access logic and signal type conversion --
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spram_clk <= std_logic(clk_i);
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spram_clk <= std_logic(clk_i);
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spram_addr <= std_logic_vector(addr_i(13+1 downto 0+1));
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spram_addr <= std_logic_vector(addr_i(13+1 downto 0+1));
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spram_di <= std_logic_vector(data_i(15 downto 0));
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spram_di <= std_logic_vector(data_i(15 downto 0));
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spram_we <= '1' when ((acc_en and upen_i and (wren_i(0) or wren_i(1))) = '1') else '0'; -- global write enable
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spram_we <= '1' when ((acc_en and upen_i and (wren_i(0) or wren_i(1))) = '1') else '0'; -- global write enable
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rdata <= std_ulogic_vector(spram_do);
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rdata <= std_ulogic_vector(spram_do_lo) when (mem_sel = '0') else std_ulogic_vector(spram_do_hi); -- lo/hi memory bank
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spram_cs(0) <= '1' when (addr_i(15) = '0') else '0'; -- low memory bank
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spram_cs(1) <= '1' when (addr_i(15) = '1') else '0'; -- high memory bank
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spram_be(1 downto 0) <= "11" when (wren_i(0) = '1') else "00"; -- low byte write enable
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spram_be(1 downto 0) <= "11" when (wren_i(0) = '1') else "00"; -- low byte write enable
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spram_be(3 downto 2) <= "11" when (wren_i(1) = '1') else "00"; -- high byte write enable
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spram_be(3 downto 2) <= "11" when (wren_i(1) = '1') else "00"; -- high byte write enable
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spram_pwr_n <= '0' when ((spram_sleep_mode_en_c = false) or (mem_cs = '1')) else '1'; -- LP mode disabled or IMEM selected
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|
buffer_ff: process(clk_i)
|
buffer_ff: process(clk_i)
|
begin
|
begin
|
-- sanity check --
|
-- sanity check --
|
if (IMEM_AS_ROM = true) or (BOOTLD_USE = false) then
|
if (IMEM_AS_ROM = true) or (BOOTLD_USE = false) then
|
assert false report "ICE40 Ultra Plus SPRAM cannot be initialized by bitstream!" severity error;
|
assert false report "ICE40 Ultra Plus SPRAM cannot be initialized by bitstream!" severity error;
|
end if;
|
end if;
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if (IMEM_SIZE > 32*1024) then
|
if (IMEM_SIZE > 48*1024) then
|
assert false report "I-mem size out of range! Max 32kB!" severity error;
|
assert false report "I-mem size out of range! Max 48kB!" severity error;
|
end if;
|
end if;
|
-- buffer --
|
-- buffer --
|
if rising_edge(clk_i) then
|
if rising_edge(clk_i) then
|
|
mem_sel <= addr_i(15);
|
rden <= rden_i and acc_en;
|
rden <= rden_i and acc_en;
|
end if;
|
end if;
|
end process buffer_ff;
|
end process buffer_ff;
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|
-- output gate --
|
-- output gate --
|
