| Line 23... |
Line 23... |
//
|
//
|
//
|
//
|
// Registers
|
// Registers
|
// 00 -------- ffffffff ffffffff ffffffff freq [23:0]
|
// 00 -------- ffffffff ffffffff ffffffff freq [23:0]
|
// 04 -------- -------- pppppppp pppppppp pulse width
|
// 04 -------- -------- pppppppp pppppppp pulse width
|
// 08 -------- -------- trsg--fo -vvvvv-- test, ringmod, sync, gate, filter, output, voice type
|
// 08 -------- -------- trsg-efo vvvvvv-- test, ringmod, sync, gate, filter, output, voice type
|
// 0C aaaaaaaa aaaaaaaa dddddddd dddddddd attack, decay
|
// 0C -------- aaaaaaaa aaaaaaaa aaaaaaaa attack
|
// 10 -------- ssssssss rrrrrrrr rrrrrrrr sustain, release
|
// 10 -------- dddddddd dddddddd dddddddd decay
|
// 14 -------- -------- --aaaaaa aaaaaaa- wave table base address
|
// 14 -------- -------- -------- ssssssss sustain
|
|
// 18 -------- rrrrrrrr rrrrrrrr rrrrrrrr release
|
|
// 1C -------- -------- --aaaaaa aaaaaaa- wave table base address
|
// vvvvv
|
// vvvvv
|
// wnpst
|
// wnpst
|
// 18-2C Voice #2
|
// 20-3C Voice #2
|
// 30-44 Voice #3
|
// 40-5C Voice #3
|
// 48-5C Voice #4
|
// 60-7C Voice #4
|
//
|
//
|
// ...
|
// ...
|
// B0 -------- -------- -------- vvvvvvvv volume (0-255)
|
// B0 -------- -------- -------- ----vvvv volume (0-255)
|
// B4 nnnnnnnn nnnnnnnn nnnnnnnn nnnnnnnn osc3 oscillator 3
|
// B4 nnnnnnnn nnnnnnnn nnnnnnnn nnnnnnnn osc3 oscillator 3
|
// B8 -------- -------- -------- nnnnnnnn env3 envelope 3
|
// B8 -------- -------- -------- nnnnnnnn env3 envelope 3
|
|
// BC -------- -------- -sss-sss -sss-sss env state
|
//
|
//
|
// C0-DC -------- -------- s---kkkk kkkkkkkk filter coefficients
|
// C0-DC -------- -------- s---kkkk kkkkkkkk filter coefficients
|
// E0-FC -------- -------- -------- -------- reserved for more filter coefficients
|
// E0-FC -------- -------- -------- -------- reserved for more filter coefficients
|
//
|
//
|
//=============================================================================
|
//=============================================================================
|
| Line 73... |
Line 76... |
// I/O registers
|
// I/O registers
|
reg [31:0] dat_o;
|
reg [31:0] dat_o;
|
reg [13:0] m_adr_o;
|
reg [13:0] m_adr_o;
|
|
|
reg [3:0] test; // test (enable note generator)
|
reg [3:0] test; // test (enable note generator)
|
reg [4:0] vt [3:0]; // voice type
|
reg [5:0] vt [3:0]; // voice type
|
reg [23:0] freq0, freq1, freq2, freq3; // frequency control
|
reg [23:0] freq0, freq1, freq2, freq3; // frequency control
|
reg [15:0] pw0, pw1, pw2, pw3; // pulse width control
|
reg [15:0] pw0, pw1, pw2, pw3; // pulse width control
|
reg [3:0] gate;
|
reg [3:0] gate;
|
reg [15:0] attack0, attack1, attack2, attack3;
|
reg [23:0] attack0, attack1, attack2, attack3;
|
reg [15:0] decay0, decay1, decay2, decay3;
|
reg [23:0] decay0, decay1, decay2, decay3;
|
reg [7:0] sustain0, sustain1, sustain2, sustain3;
|
reg [7:0] sustain0, sustain1, sustain2, sustain3;
|
reg [15:0] relese0, relese1, relese2, relese3;
|
reg [23:0] relese0, relese1, relese2, relese3;
|
reg [13:0] wtadr0, wtadr1, wtadr2, wtadr3;
|
reg [13:0] wtadr0, wtadr1, wtadr2, wtadr3;
|
reg [3:0] sync;
|
reg [3:0] sync;
|
reg [3:0] ringmod;
|
reg [3:0] ringmod;
|
reg [3:0] outctrl;
|
reg [3:0] outctrl;
|
reg [3:0] filt; // 1 = output goes to filter
|
reg [3:0] filt; // 1 = output goes to filter
|
|
reg [3:0] eg; // 1 = output goes through envelope generator
|
wire [31:0] acc0, acc1, acc2, acc3;
|
wire [31:0] acc0, acc1, acc2, acc3;
|
reg [7:0] volume; // master volume
|
reg [3:0] volume; // master volume
|
wire [11:0] tg1_o,tg2_o,tg3_o,tg4_o; // tone generator output
|
wire [11:0] tg1_o,tg2_o,tg3_o,tg4_o; // tone generator output
|
wire [7:0] env; // envelope generator output
|
wire [7:0] env; // envelope generator output
|
wire [7:0] env3;
|
wire [7:0] env0, env1, env2, env3;
|
wire [19:0] out0,out1,out2,out3;
|
wire [19:0] out0,out1,out2,out3;
|
wire [2:0] es0,es1,es2,es3;
|
wire [2:0] es0,es1,es2,es3;
|
wire [29:0] out4;
|
wire [29:0] out4;
|
reg [21:0] sum,fsum;
|
reg [21:0] sum,fsum;
|
reg [21:0] sum2;
|
reg [21:0] sum2;
|
| Line 168... |
Line 172... |
case(adr_i[7:2])
|
case(adr_i[7:2])
|
//---------------------------------------------------------
|
//---------------------------------------------------------
|
6'd00: freq0 <= dat_i[23:0];
|
6'd00: freq0 <= dat_i[23:0];
|
6'd01: pw0 <= dat_i[15:0];
|
6'd01: pw0 <= dat_i[15:0];
|
6'd02: begin
|
6'd02: begin
|
vt[0] <= dat_i[6:2];
|
vt[0] <= dat_i[7:2];
|
outctrl[0] <= dat_i[8];
|
outctrl[0] <= dat_i[8];
|
filt[0] <= dat_i[9];
|
filt[0] <= dat_i[9];
|
|
eg[0] <= dat_i[10];
|
gate[0] <= dat_i[12];
|
gate[0] <= dat_i[12];
|
sync[0] <= dat_i[13];
|
sync[0] <= dat_i[13];
|
ringmod[0] <= dat_i[14];
|
ringmod[0] <= dat_i[14];
|
test[0] <= dat_i[15];
|
test[0] <= dat_i[15];
|
end
|
end
|
6'd03: begin
|
6'd03: attack0 <= dat_i[23:0];
|
attack0 <= dat_i[31:16];
|
6'd04: decay0 <= dat_i[23:0];
|
decay0 <= dat_i[15:0];
|
6'd05: sustain0 <= dat_i[7:0];
|
end
|
6'd06: relese0 <= dat_i[23:0];
|
6'd04: begin
|
6'd07: wtadr0 <= {dat_i[13:1],1'b0};
|
relese0 <= dat_i[15:0];
|
|
sustain0 <= dat_i[23:16];
|
|
end
|
|
6'd05: wtadr0 <= {dat_i[13:1],1'b0};
|
|
|
|
//---------------------------------------------------------
|
//---------------------------------------------------------
|
6'd06: freq1 <= dat_i[23:0];
|
6'd08: freq1 <= dat_i[23:0];
|
6'd07: pw1 <= dat_i[15:0];
|
6'd09: pw1 <= dat_i[15:0];
|
6'd08: begin
|
6'd10: begin
|
vt[1] <= dat_i[6:2];
|
vt[1] <= dat_i[7:2];
|
outctrl[1] <= dat_i[8];
|
outctrl[1] <= dat_i[8];
|
filt[1] <= dat_i[9];
|
filt[1] <= dat_i[9];
|
|
eg[1] <= dat_i[10];
|
gate[1] <= dat_i[12];
|
gate[1] <= dat_i[12];
|
sync[1] <= dat_i[13];
|
sync[1] <= dat_i[13];
|
ringmod[1] <= dat_i[14];
|
ringmod[1] <= dat_i[14];
|
test[1] <= dat_i[15];
|
test[1] <= dat_i[15];
|
end
|
end
|
6'd09: begin
|
6'd11: attack1 <= dat_i[23:0];
|
attack1 <= dat_i[31:16];
|
6'd12: decay1 <= dat_i[23:0];
|
decay1 <= dat_i[15:0];
|
6'd13: sustain1 <= dat_i[7:0];
|
end
|
6'd14: relese1 <= dat_i[23:0];
|
6'd10:
|
6'd15: wtadr1 <= {dat_i[13:1],1'b0};
|
begin
|
|
relese1 <= dat_i[15:0];
|
|
sustain1 <= dat_i[23:16];
|
|
end
|
|
6'd11: wtadr1 <= {dat_i[13:1],1'b0};
|
|
|
|
//---------------------------------------------------------
|
//---------------------------------------------------------
|
6'd12: freq2 <= dat_i[23:0];
|
6'd16: freq2 <= dat_i[23:0];
|
6'd13: pw2 <= dat_i[15:0];
|
6'd17: pw2 <= dat_i[15:0];
|
6'd14: begin
|
6'd18: begin
|
vt[2] <= dat_i[6:2];
|
vt[2] <= dat_i[7:2];
|
outctrl[2] <= dat_i[8];
|
outctrl[2] <= dat_i[8];
|
filt[2] <= dat_i[9];
|
filt[2] <= dat_i[9];
|
|
eg[2] <= dat_i[10];
|
gate[2] <= dat_i[12];
|
gate[2] <= dat_i[12];
|
sync[2] <= dat_i[5];
|
sync[2] <= dat_i[5];
|
outctrl[0] <= dat_i[13];
|
outctrl[0] <= dat_i[13];
|
ringmod[2] <= dat_i[14];
|
ringmod[2] <= dat_i[14];
|
test[2] <= dat_i[15];
|
test[2] <= dat_i[15];
|
end
|
end
|
6'd15: begin
|
6'd19: attack2 <= dat_i[23:0];
|
attack2 <= dat_i[31:16];
|
6'd20: decay2 <= dat_i[23:0];
|
decay2 <= dat_i[15:0];
|
6'd21: sustain2 <= dat_i[7:0];
|
end
|
6'd22: relese2 <= dat_i[23:0];
|
6'd16: begin
|
6'd23: wtadr2 <= {dat_i[13:1],1'b0};
|
relese2 <= dat_i[15:0];
|
|
sustain2 <= dat_i[23:16];
|
|
end
|
|
6'd17: wtadr1 <= {dat_i[13:1],1'b0};
|
|
|
|
//---------------------------------------------------------
|
//---------------------------------------------------------
|
6'd18: freq3 <= dat_i[23:0];
|
6'd24: freq3 <= dat_i[23:0];
|
6'd19: pw3 <= dat_i[15:0];
|
6'd25: pw3 <= dat_i[15:0];
|
6'd20: begin
|
6'd26: begin
|
vt[3] <= dat_i[6:2];
|
vt[3] <= dat_i[7:2];
|
outctrl[3] <= dat_i[8];
|
outctrl[3] <= dat_i[8];
|
filt[3] <= dat_i[9];
|
filt[3] <= dat_i[9];
|
|
eg[3] <= dat_i[10];
|
gate[3] <= dat_i[12];
|
gate[3] <= dat_i[12];
|
sync[3] <= dat_i[13];
|
sync[3] <= dat_i[13];
|
ringmod[3] <= dat_i[14];
|
ringmod[3] <= dat_i[14];
|
test[3] <= dat_i[15];
|
test[3] <= dat_i[15];
|
end
|
end
|
6'd21: begin
|
6'd27: attack3 <= dat_i[23:0];
|
attack3 <= dat_i[31:16];
|
6'd28: decay3 <= dat_i[23:0];
|
decay3 <= dat_i[15:0];
|
6'd29: sustain3 <= dat_i[7:0];
|
relese3 <= dat_i[15:0];
|
6'd30: relese3 <= dat_i[23:0];
|
sustain3 <= dat_i[23:16];
|
6'd31: wtadr3 <= {dat_i[13:1],1'b0};
|
end
|
|
6'd22: wtadr1 <= {dat_i[13:1],1'b0};
|
|
|
|
//---------------------------------------------------------
|
//---------------------------------------------------------
|
6'd44: volume <= dat_i[7:0];
|
6'd44: volume <= dat_i[3:0];
|
|
|
default: ;
|
default: ;
|
endcase
|
endcase
|
end
|
end
|
end
|
end
|
| Line 267... |
Line 260... |
always @(posedge clk_i)
|
always @(posedge clk_i)
|
case(adr_i[7:2])
|
case(adr_i[7:2])
|
6'd45: begin
|
6'd45: begin
|
dat_o <= acc3;
|
dat_o <= acc3;
|
end
|
end
|
6'd45: begin
|
6'd46: begin
|
dat_o <= {24'h0,env3};
|
dat_o <= {24'h0,env3};
|
end
|
end
|
6'd46: dat_o <= {17'h0,es3,1'b0,es2,1'b0,es1,1'b0,es0};
|
6'd47: dat_o <= {17'h0,es3,1'b0,es2,1'b0,es1,1'b0,es0};
|
default: begin
|
default: begin
|
dat_o <= reg_shadow_o;
|
dat_o <= reg_shadow_o;
|
end
|
end
|
endcase
|
endcase
|
|
|
| Line 289... |
Line 282... |
.i3(wtadr3 + {acc3[27:17],1'b0}),
|
.i3(wtadr3 + {acc3[27:17],1'b0}),
|
.z(madr)
|
.z(madr)
|
);
|
);
|
always @(posedge clk_i)
|
always @(posedge clk_i)
|
m_adr_o <= madr;
|
m_adr_o <= madr;
|
|
wire [11:0] wave_i = m_dat_i;
|
|
|
// This counter controls channel multiplexing for the wave table
|
// This counter controls channel multiplexing for the wave table
|
always @(posedge clk_i)
|
always @(posedge clk_i)
|
if (rst_i)
|
if (rst_i)
|
cnt <= 2'd0;
|
cnt <= 2'd0;
|
| Line 424... |
Line 418... |
PSGShaper u5a
|
PSGShaper u5a
|
(
|
(
|
.clk_i(clk_i),
|
.clk_i(clk_i),
|
.ce(1'b1),
|
.ce(1'b1),
|
.tgi(tg1_o),
|
.tgi(tg1_o),
|
.env(env0),
|
.env(eg[0] ? env0 : 8'hFF),
|
.o(out0)
|
.o(out0)
|
);
|
);
|
|
|
PSGShaper u5b
|
PSGShaper u5b
|
(
|
(
|
.clk_i(clk_i),
|
.clk_i(clk_i),
|
.ce(1'b1),
|
.ce(1'b1),
|
.tgi(tg2_o),
|
.tgi(tg2_o),
|
.env(env1),
|
.env(eg[1] ? env1 : 8'hFF),
|
.o(out1)
|
.o(out1)
|
);
|
);
|
|
|
PSGShaper u5c
|
PSGShaper u5c
|
(
|
(
|
.clk_i(clk_i),
|
.clk_i(clk_i),
|
.ce(1'b1),
|
.ce(1'b1),
|
.tgi(tg3_o),
|
.tgi(tg3_o),
|
.env(env2),
|
.env(eg[2] ? env2 : 8'hFF),
|
.o(out2)
|
.o(out2)
|
);
|
);
|
|
|
PSGShaper u5d
|
PSGShaper u5d
|
(
|
(
|
.clk_i(clk_i),
|
.clk_i(clk_i),
|
.ce(1'b1),
|
.ce(1'b1),
|
.tgi(tg4_o),
|
.tgi(tg4_o),
|
.env(env3),
|
.env(eg[3] ? env3 : 8'hFF),
|
.o(out3)
|
.o(out3)
|
);
|
);
|
|
|
always @(posedge clk_i)
|
always @(posedge clk_i)
|
cnt1 <= cnt;
|
cnt1 <= cnt;
|
