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| Rev 238 |
Rev 239 |
| Line 48... |
Line 48... |
p0: out std_logic_vector(31 downto 0);
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p0: out std_logic_vector(31 downto 0);
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p1: out std_logic_vector(31 downto 0);
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p1: out std_logic_vector(31 downto 0);
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p2: out std_logic_vector(31 downto 0);
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p2: out std_logic_vector(31 downto 0);
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p3: out std_logic_vector(31 downto 0);
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p3: out std_logic_vector(31 downto 0);
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p4: out std_logic_vector(31 downto 0);
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p4: out std_logic_vector(31 downto 0);
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p5: out std_logic_vector(31 downto 0);
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p5: out std_logic_vector(31 downto 0)
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);
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);
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end entity;
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end entity;
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architecture fmul32_arch of fmul32 is
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architecture fmul32_arch of fmul32 is
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