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use_sys_sim: true
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use_sys_sim: true
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use_mod_sim: true
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use_mod_sim: true
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type: vhdl
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type: vhdl
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path: rtl/verilog/or1200_xcv_ram32x8d.v
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path: rtl/verilog/or1200_xcv_ram32x8d.v
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:defines: SOCM_HDL_FILE
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# Please note: the defines is automatically created
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use_syn: true
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# see or1200_defines.v.in
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use_sys_sim: true
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use_mod_sim: true
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# :defines: SOCM_HDL_FILE
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type: vhdl
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# use_syn: true
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path: rtl/verilog/or1200_defines.v
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# use_sys_sim: true
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# use_mod_sim: true
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# type: vhdl
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# path: rtl/verilog/or1200_defines.v
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:ic_fsm: SOCM_HDL_FILE
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:ic_fsm: SOCM_HDL_FILE
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use_syn: true
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use_syn: true
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use_sys_sim: true
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use_sys_sim: true
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use_mod_sim: true
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use_mod_sim: true
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