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[/] [soc_maker/] [trunk/] [core_lib/] [cores/] [or1200_rel2/] [02_or1200_files.yaml] - Diff between revs 5 and 8

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Rev 5 Rev 8
Line 373... Line 373...
    use_sys_sim: true
    use_sys_sim: true
    use_mod_sim: true
    use_mod_sim: true
    type: vhdl
    type: vhdl
    path: rtl/verilog/or1200_xcv_ram32x8d.v
    path: rtl/verilog/or1200_xcv_ram32x8d.v
 
 
  :defines: SOCM_HDL_FILE
# Please note: the defines is automatically created
    use_syn: true
# see or1200_defines.v.in
    use_sys_sim: true
 
    use_mod_sim: true
# :defines: SOCM_HDL_FILE
    type: vhdl
#   use_syn: true
    path: rtl/verilog/or1200_defines.v
#   use_sys_sim: true
 
#   use_mod_sim: true
 
#   type: vhdl
 
#   path: rtl/verilog/or1200_defines.v
 
 
  :ic_fsm: SOCM_HDL_FILE
  :ic_fsm: SOCM_HDL_FILE
    use_syn: true
    use_syn: true
    use_sys_sim: true
    use_sys_sim: true
    use_mod_sim: true
    use_mod_sim: true

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