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[/] [spacewiresystemc/] [trunk/] [altera_work/] [spw_fifo_ulight/] [output_files/] [spw_fifo_ulight.fit.summary] - Diff between revs 35 and 40

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Rev 35 Rev 40
Line 1... Line 1...
Fitter Status : Successful - Fri Sep 15 08:17:49 2017
Fitter Status : Successful - Mon Feb  5 00:57:17 2018
Quartus Prime Version : 17.0.1 Build 598 06/07/2017 SJ Lite Edition
Quartus Prime Version : 17.1.1 Internal Build 593 12/11/2017 SJ Lite Edition
Revision Name : spw_fifo_ulight
Revision Name : spw_fifo_ulight
Top-level Entity Name : SPW_ULIGHT_FIFO
Top-level Entity Name : SPW_ULIGHT_FIFO
Family : Cyclone V
Family : Cyclone V
Device : 5CSEMA4U23C6
Device : 5CSEMA4U23C6
Timing Models : Final
Timing Models : Final
Logic utilization (in ALMs) : 3,209 / 15,880 ( 20 % )
Logic utilization (in ALMs) : 3,362 / 15,880 ( 21 % )
Total registers : 4692
Total registers : 4633
Total pins : 19 / 314 ( 6 % )
Total pins : 19 / 314 ( 6 % )
Total virtual pins : 0
Total virtual pins : 0
Total block memory bits : 0 / 2,764,800 ( 0 % )
Total block memory bits : 0 / 2,764,800 ( 0 % )
Total RAM Blocks : 0 / 270 ( 0 % )
Total RAM Blocks : 0 / 270 ( 0 % )
Total DSP Blocks : 0 / 84 ( 0 % )
Total DSP Blocks : 0 / 84 ( 0 % )

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