OpenCores
URL https://opencores.org/ocsvn/spacewiresystemc/spacewiresystemc/trunk

Subversion Repositories spacewiresystemc

[/] [spacewiresystemc/] [trunk/] [altera_work/] [spw_fifo_ulight/] [ulight_fifo/] [synthesis/] [submodules/] [hps_sdram_p0.sv] - Diff between revs 32 and 40

Show entire file | Details | Blame | View Log

Rev 32 Rev 40
Line 1... Line 1...
// (C) 2001-2017 Intel Corporation. All rights reserved.
// (C) 2001-2017 Intel Corporation. All rights reserved.
// Your use of Intel Corporation's design tools, logic functions and other
// Your use of Intel Corporation's design tools, logic functions and other
// software and tools, and its AMPP partner logic functions, and any output
// software and tools, and its AMPP partner logic functions, and any output
// files any of the foregoing (including device programming or simulation
// files from any of the foregoing (including device programming or simulation
// files), and any associated documentation or information are expressly subject
// files), and any associated documentation or information are expressly subject
// to the terms and conditions of the Intel Program License Subscription
// to the terms and conditions of the Intel Program License Subscription
// Agreement, Intel MegaCore Function License Agreement, or other applicable
// Agreement, Intel FPGA IP License Agreement, or other applicable
// license agreement, including, without limitation, that your use is for the
// license agreement, including, without limitation, that your use is for the
// sole purpose of programming logic devices manufactured by Intel and sold by
// sole purpose of programming logic devices manufactured by Intel and sold by
// Intel or its authorized distributors.  Please refer to the applicable
// Intel or its authorized distributors.  Please refer to the applicable
// agreement for further details.
// agreement for further details.
 
 
 
 
 
 
`timescale 1 ps / 1 ps
`timescale 1 ps / 1 ps
 
 
(* altera_attribute = "-name IP_TOOL_NAME altera_mem_if_ddr3_hard_phy_core; -name IP_TOOL_VERSION 17.0; -name FITTER_ADJUST_HC_SHORT_PATH_GUARDBAND 100" *)
(* altera_attribute = "-name IP_TOOL_NAME altera_mem_if_ddr3_hard_phy_core; -name IP_TOOL_VERSION 17.1; -name FITTER_ADJUST_HC_SHORT_PATH_GUARDBAND 100" *)
module hps_sdram_p0 (
module hps_sdram_p0 (
    global_reset_n,
    global_reset_n,
    soft_reset_n,
    soft_reset_n,
        csr_soft_reset_req,
        csr_soft_reset_req,
    parallelterminationcontrol,
    parallelterminationcontrol,

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.