OpenCores
URL https://opencores.org/ocsvn/spacewiresystemc/spacewiresystemc/trunk

Subversion Repositories spacewiresystemc

[/] [spacewiresystemc/] [trunk/] [altera_work/] [spw_fifo_ulight/] [ulight_fifo/] [synthesis/] [submodules/] [ulight_fifo_mm_interconnect_0_avalon_st_adapter.v] - Diff between revs 32 and 40

Show entire file | Details | Blame | View Log

Rev 32 Rev 40
Line 1... Line 1...
// ulight_fifo_mm_interconnect_0_avalon_st_adapter.v
// ulight_fifo_mm_interconnect_0_avalon_st_adapter.v
 
 
// This file was auto-generated from altera_avalon_st_adapter_hw.tcl.  If you edit it your changes
// This file was auto-generated from altera_avalon_st_adapter_hw.tcl.  If you edit it your changes
// will probably be lost.
// will probably be lost.
// 
// 
// Generated using ACDS version 17.0 598
// Generated using ACDS version 17.1 593
 
 
`timescale 1 ps / 1 ps
`timescale 1 ps / 1 ps
module ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
module ulight_fifo_mm_interconnect_0_avalon_st_adapter #(
                parameter inBitsPerSymbol = 34,
                parameter inBitsPerSymbol = 34,
                parameter inUsePackets    = 0,
                parameter inUsePackets    = 0,

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.