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functions, and any output files from any of the foregoing
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functions, and any output files from any of the foregoing
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(including device programming or simulation files), and any
|
(including device programming or simulation files), and any
|
associated documentation or information are expressly subject
|
associated documentation or information are expressly subject
|
to the terms and conditions of the Intel Program License
|
to the terms and conditions of the Intel Program License
|
Subscription Agreement, the Intel Quartus Prime License Agreement,
|
Subscription Agreement, the Intel Quartus Prime License Agreement,
|
the Intel MegaCore Function License Agreement, or other
|
the Intel FPGA IP License Agreement, or other applicable license
|
applicable license agreement, including, without limitation,
|
agreement, including, without limitation, that your use is for
|
that your use is for the sole purpose of programming logic
|
the sole purpose of programming logic devices manufactured by
|
devices manufactured by Intel and sold by Intel or its
|
Intel and sold by Intel or its authorized distributors. Please
|
authorized distributors. Please refer to the applicable
|
refer to the applicable agreement for further details.
|
agreement for further details.
|
|
*/
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*/
|
(header "symbol" (version "1.1"))
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(header "symbol" (version "1.1"))
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(symbol
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(symbol
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(rect 0 0 656 1024)
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(rect 0 0 656 1024)
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(text "ulight_fifo" (rect 299 -1 336 11)(font "Arial" (font_size 10)))
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(text "ulight_fifo" (rect 299 -1 336 11)(font "Arial" (font_size 10)))
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