URL
https://opencores.org/ocsvn/t6507lp/t6507lp/trunk
[/] [t6507lp/] [trunk/] [rtl/] [verilog/] [test_top.v] - Diff between revs 224 and 225
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
| Rev 224 |
Rev 225 |
| Line 54... |
Line 54... |
output [3:0] VGA_B;
|
output [3:0] VGA_B;
|
output [9:0] LEDR;
|
output [9:0] LEDR;
|
output VGA_VS;
|
output VGA_VS;
|
output VGA_HS;
|
output VGA_HS;
|
|
|
wire [479:0] line;
|
//wire [479:0] line;
|
wire [4:0] vert_counter;
|
//wire [4:0] vert_counter;
|
|
|
vga_controller vga_controller (
|
vga_controller vga_controller (
|
.reset(reset),
|
.reset(reset),
|
.clk_50(clk_50),
|
.clk_50(clk_50),
|
.line(line),
|
.line(line),
|
|
.vert_counter(vert_counter),
|
.SW(SW),
|
.SW(SW),
|
.VGA_R(VGA_R),
|
.VGA_R(VGA_R),
|
.VGA_G(VGA_G),
|
.VGA_G(VGA_G),
|
.VGA_B(VGA_B),
|
.VGA_B(VGA_B),
|
.LEDR(LEDR),
|
.LEDR(LEDR),
|
.VGA_VS(VGA_VS),
|
.VGA_VS(VGA_VS),
|
.VGA_HS(VGA_HS)
|
.VGA_HS(VGA_HS)
|
);
|
);
|
|
|
controller_test controller_test (
|
controller_test controller_test (
|
|
.reset(reset),
|
|
.clk_50(clk_50),
|
.line(line),
|
.line(line),
|
.vert_counter(vert_counter)
|
.vert_counter(vert_counter)
|
);
|
);
|
|
|
endmodule
|
endmodule
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.