URL https://opencores.org/ocsvn/t6507lp/t6507lp/trunk

Subversion Repositories t6507lp

[/] [t6507lp/] [trunk/] [rtl/] [verilog/] [test_top.v] - Diff between revs 226 and 230

Rev 226	Rev 230
Line 54...	Line 54...
`output [3:0] VGA_B;`	`output [3:0] VGA_B;`
`output [9:0] LEDR;`	`output [9:0] LEDR;`
`output VGA_VS;`	`output VGA_VS;`
`output VGA_HS;`	`output VGA_HS;`

`wire [479:0] line;`	`//wire [11:0] pixel;`
`wire [4:0] vert_counter;`	`wire [8:0] vert_counter;`

`vga_controller vga_controller (`	`vga_controller vga_controller (`
`.reset_n(reset_n),`	`.reset_n(reset_n),`
`.clk_50(clk_50),`	`.clk_50(clk_50),`
`.line(line),`	`.pixel(pixel),`
`.SW(SW),`	`.SW(SW),`
`.VGA_R(VGA_R),`	`.VGA_R(VGA_R),`
`.VGA_G(VGA_G),`	`.VGA_G(VGA_G),`
`.VGA_B(VGA_B),`	`.VGA_B(VGA_B),`
`.LEDR(LEDR),`	`.LEDR(LEDR),`
Line 74...	Line 74...
`);`	`);`

`controller_test controller_test (`	`controller_test controller_test (`
`.reset_n(reset_n),`	`.reset_n(reset_n),`
`.clk_50(clk_50),`	`.clk_50(clk_50),`
`.line(line),`	`.pixel(pixel),`
`.vert_counter(vert_counter)`	`.vert_counter(vert_counter)`
`);`	`);`

`endmodule`	`endmodule`

`No newline at end of file`	`No newline at end of file`