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[/] [xilinx_virtex_fp_library/] [trunk/] [GeneralPrecMAF/] [leading_zeros.v] - Diff between revs 3 and 5

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`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Company: 
// Engineer: 
// Engineer: 
// 
// 
// Create Date:    18:50:09 10/17/2013 
// Create Date:    18:50:09 10/17/2013 
// Design Name: 
// Design Name: 
// Module Name:    leading_zeros 
// Module Name:    leading_zeros 
// Project Name: 
// Project Name: 
// Target Devices: 
// Target Devices: 
// Tool versions: 
// Tool versions: 
// Description: 
// Description: 
//
//
// Dependencies: 
// Dependencies: 
//
//
// Revision: 
// Revision: 
// Revision 0.01 - File Created
// Revision 0.01 - File Created
// Additional Comments: 
// Additional Comments: 
//
//
//////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////////
module leading_zeros #( parameter SIZE_INT = 24,        //mantissa bits
module leading_zeros #( parameter SIZE_INT = 24,        //mantissa bits
                                                                parameter SIZE_COUNTER  = 5,    //log2(size_mantissa) + 1 = 5)
                                                                parameter SIZE_COUNTER  = 5,    //log2(size_mantissa) + 1 = 5)
                                                                parameter PIPELINE = 2)
                                                                parameter PIPELINE = 2)
                                                        (a, ovf, lz);
                                                        (a, ovf, lz);
 
 
        input [SIZE_INT-1:0]    a;
        input [SIZE_INT-1:0]    a;
        input                   ovf;
        input                   ovf;
        output [SIZE_COUNTER-1:0] lz;
        output [SIZE_COUNTER-1:0] lz;
 
 
 
 
        parameter       nr_levels = SIZE_COUNTER - 1;
        parameter       nr_levels = SIZE_COUNTER - 1;
        parameter       max_pow_2 = 2 ** SIZE_COUNTER;
        parameter       max_pow_2 = 2 ** SIZE_COUNTER;
        parameter       size_lz = SIZE_COUNTER;
        parameter       size_lz = SIZE_COUNTER;
 
 
        wire [max_pow_2-1:0] a_complete;
        wire [max_pow_2-1:0] a_complete;
        wire [max_pow_2-1:0] v_d[nr_levels-1:0];
        wire [max_pow_2-1:0] v_d[nr_levels-1:0];
        wire [max_pow_2-1:0] v_q[nr_levels-1:0];
        wire [max_pow_2-1:0] v_q[nr_levels-1:0];
        wire [max_pow_2-1:0] p_d[nr_levels-1:0];
        wire [max_pow_2-1:0] p_d[nr_levels-1:0];
        wire [max_pow_2-1:0] p_q[nr_levels-1:0];
        wire [max_pow_2-1:0] p_q[nr_levels-1:0];
        wire [size_lz-1:0]   lzc;
        wire [size_lz-1:0]   lzc;
 
 
        assign a_complete[max_pow_2 - 1 : max_pow_2 - 1 - SIZE_INT + 1] = a;
        assign a_complete[max_pow_2 - 1 : max_pow_2 - 1 - SIZE_INT + 1] = a;
        generate
        generate
                if (max_pow_2 != SIZE_INT)
                if (max_pow_2 != SIZE_INT)
                begin : gen_if
                begin : gen_if
                        assign a_complete[max_pow_2 - 1 - SIZE_INT : 0] = 0;
                        assign a_complete[max_pow_2 - 1 - SIZE_INT : 0] = 0;
                end
                end
        endgenerate
        endgenerate
 
 
        generate
        generate
                begin : level_0
                begin : level_0
                        genvar i;
                        genvar i;
                        for (i = max_pow_2/4 - 1; i >= 0; i = i - 1)
                        for (i = max_pow_2/4 - 1; i >= 0; i = i - 1)
                        begin : level_0
                        begin : level_0
                                assign v_d[0][i] = (a_complete[4 * i + 3 : 4 * i] == 4'b0000) ? 1'b0 : 1'b1;
                                assign v_d[0][i] = (a_complete[4 * i + 3 : 4 * i] == 4'b0000) ? 1'b0 : 1'b1;
                                assign p_d[0][2*i+1:2*i] = (a_complete[4 * i + 3] == 1'b1) ? 2'b00 :
                                assign p_d[0][2*i+1:2*i] = (a_complete[4 * i + 3] == 1'b1) ? 2'b00 :
                                                                (a_complete[4 * i + 2] == 1'b1) ? 2'b01 :
                                                                (a_complete[4 * i + 2] == 1'b1) ? 2'b01 :
                                                                (a_complete[4 * i + 1] == 1'b1) ? 2'b10 : 2'b11;
                                                                (a_complete[4 * i + 1] == 1'b1) ? 2'b10 : 2'b11;
                        end
                        end
                end
                end
        endgenerate
        endgenerate
 
 
        generate
        generate
                begin : level_generation_begin
                begin : level_generation_begin
                        genvar i;
                        genvar i;
                        for (i = 1; i <= nr_levels - 1; i = i + 1)
                        for (i = 1; i <= nr_levels - 1; i = i + 1)
                        begin : level_generation
                        begin : level_generation
                                //begin : v_levels_begin
 
                                        genvar j;
                                        genvar j;
                                        for (j = 0; j <= max_pow_2/(2 ** (i + 2)) - 1; j = j + 1)
                                for (j = 0; j <= max_pow_2/(2 ** (i + 2)) - 1; j = j + 1)
                                        begin : v_levels
                                begin : v_levels
                                                assign v_d[i][j] = v_q[i - 1][2*j+1] | v_q[i - 1][2*j];
                                        assign v_d[i][j] = v_q[i - 1][2*j+1] | v_q[i - 1][2*j];
                                        end
                                        end
                                //end
 
 
 
                                //begin : p_levels_begin
 
                                //      genvar j;
 
                                        for (j = 0; j <= max_pow_2/(2 ** (i + 2)) - 1; j = j + 1)
                                        for (j = 0; j <= max_pow_2/(2 ** (i + 2)) - 1; j = j + 1)
                                        begin : p_levels
                                begin : p_levels
                                                assign p_d[i][(i+2)*j+i+1] = (~(v_q[i - 1][2*j+1]));
                                        assign p_d[i][(i+2)*j+i+1] = (~(v_q[i - 1][2*j+1]));
                                                assign p_d[i][(i+2)*j+i : (i+2)*j] = (v_q[i - 1][2*j+1] == 1'b1) ? p_q[i - 1][j*(2*i+2)+2*i+1 : j*(2*i+2) + i + 1] : p_q[i - 1][j*(2*i+2)+i : j*(2*i+2)];
                                        assign p_d[i][(i+2)*j+i : (i+2)*j] = (v_q[i - 1][2*j+1] == 1'b1) ? p_q[i - 1][j*(2*i+2)+2*i+1 : j*(2*i+2) + i + 1] : p_q[i - 1][j*(2*i+2)+i : j*(2*i+2)];
                                        end
                                        end
                                //end
 
                        end
                        end
                end
                end
        endgenerate
        endgenerate
 
 
        generate
        generate
                if (PIPELINE != 0)
                if (PIPELINE != 0)
                begin : pipeline_stages
                begin : pipeline_stages
                        //begin : INSERTION_begin
 
                                genvar i;
                                genvar i;
                                for (i = 0; i <= nr_levels - 2; i = i + 1)
                        for (i = 0; i <= nr_levels - 2; i = i + 1)
                                begin : INSERTION
                        begin : INSERTION
                                        if ((i + 1) % nr_levels/(PIPELINE + 1) == 0)
                                if ((i + 1) % nr_levels/(PIPELINE + 1) == 0)
                                        begin : INS
                                begin : INS
                                                d_ff #(max_pow_2) P_Di(.clk(clk), .rst(rst), .d(p_d[i]), .q(p_q[i]));
                                        d_ff #(max_pow_2) P_Di(.clk(clk), .rst(rst), .d(p_d[i]), .q(p_q[i]));
                                                d_ff #(max_pow_2) V_Di(.clk(clk), .rst(rst), .d(v_d[i]), .q(v_q[i]));
                                        d_ff #(max_pow_2) V_Di(.clk(clk), .rst(rst), .d(v_d[i]), .q(v_q[i]));
                                        end
                                end
 
 
                                        if ((i + 1) % nr_levels/(PIPELINE + 1) != 0)
                                if ((i + 1) % nr_levels/(PIPELINE + 1) != 0)
                                        begin : NO_INS
                                begin : NO_INS
                                                assign p_q[i] = p_d[i];
                                        assign p_q[i] = p_d[i];
                                                assign v_q[i] = v_d[i];
                                        assign v_q[i] = v_d[i];
                                        end
                                end
                                end
                                end
                        //end
 
                        assign p_q[nr_levels - 1] = p_d[nr_levels - 1];
                        assign p_q[nr_levels - 1] = p_d[nr_levels - 1];
                        assign v_q[nr_levels - 1] = v_d[nr_levels - 1];
                        assign v_q[nr_levels - 1] = v_d[nr_levels - 1];
                end
                end
        endgenerate
        endgenerate
 
 
        generate
        generate
                if (PIPELINE == 0)
                if (PIPELINE == 0)
                begin : no_pipeline
                begin : no_pipeline
                        //begin : xhdl4
 
                                genvar i;
                                genvar i;
                                for (i = 0; i <= nr_levels - 1; i = i + 1)
                        for (i = 0; i <= nr_levels - 1; i = i + 1)
                                begin : NO_INSERTION
                        begin : NO_INSERTION
                                        assign p_q[i] = p_d[i];
                                assign p_q[i] = p_d[i];
                                        assign v_q[i] = v_d[i];
                                assign v_q[i] = v_d[i];
                                end
                                end
                        //end
 
                end
                end
        endgenerate
        endgenerate
 
 
        assign lzc[size_lz - 1:0] = p_q[nr_levels - 1][size_lz - 1:0];
        assign lzc[size_lz - 1:0] = p_q[nr_levels - 1][size_lz - 1:0];
 
 
        generate
        generate
                begin : lz_ovf_begin
                begin : lz_ovf_begin
                        genvar i;
                        genvar i;
                        for (i = 0; i <= size_lz - 1; i = i + 1)
                        for (i = 0; i <= size_lz - 1; i = i + 1)
                        begin : lz_ovf
                        begin : lz_ovf
                                assign lz[i] = lzc[i] & ((~ovf));
                                assign lz[i] = lzc[i] & ((~ovf));
                        end
                        end
                end
                end
        endgenerate
        endgenerate
 
 
        //assign a_out = (a_complete[max_pow_2 - 1: max_pow_2 - SIZE_INT])<<lzc;
 
        //output [SIZE_INT-1:0]   a_out;
 
 
 
endmodule
endmodule
 
 
 
 

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